cx23885-cards.c 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945
  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. #include "netup-init.h"
  29. /* ------------------------------------------------------------------ */
  30. /* board config info */
  31. struct cx23885_board cx23885_boards[] = {
  32. [CX23885_BOARD_UNKNOWN] = {
  33. .name = "UNKNOWN/GENERIC",
  34. /* Ensure safe default for unknown boards */
  35. .clk_freq = 0,
  36. .input = {{
  37. .type = CX23885_VMUX_COMPOSITE1,
  38. .vmux = 0,
  39. }, {
  40. .type = CX23885_VMUX_COMPOSITE2,
  41. .vmux = 1,
  42. }, {
  43. .type = CX23885_VMUX_COMPOSITE3,
  44. .vmux = 2,
  45. }, {
  46. .type = CX23885_VMUX_COMPOSITE4,
  47. .vmux = 3,
  48. } },
  49. },
  50. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  51. .name = "Hauppauge WinTV-HVR1800lp",
  52. .portc = CX23885_MPEG_DVB,
  53. .input = {{
  54. .type = CX23885_VMUX_TELEVISION,
  55. .vmux = 0,
  56. .gpio0 = 0xff00,
  57. }, {
  58. .type = CX23885_VMUX_DEBUG,
  59. .vmux = 0,
  60. .gpio0 = 0xff01,
  61. }, {
  62. .type = CX23885_VMUX_COMPOSITE1,
  63. .vmux = 1,
  64. .gpio0 = 0xff02,
  65. }, {
  66. .type = CX23885_VMUX_SVIDEO,
  67. .vmux = 2,
  68. .gpio0 = 0xff02,
  69. } },
  70. },
  71. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  72. .name = "Hauppauge WinTV-HVR1800",
  73. .porta = CX23885_ANALOG_VIDEO,
  74. .portb = CX23885_MPEG_ENCODER,
  75. .portc = CX23885_MPEG_DVB,
  76. .tuner_type = TUNER_PHILIPS_TDA8290,
  77. .tuner_addr = 0x42, /* 0x84 >> 1 */
  78. .input = {{
  79. .type = CX23885_VMUX_TELEVISION,
  80. .vmux = CX25840_VIN7_CH3 |
  81. CX25840_VIN5_CH2 |
  82. CX25840_VIN2_CH1,
  83. .gpio0 = 0,
  84. }, {
  85. .type = CX23885_VMUX_COMPOSITE1,
  86. .vmux = CX25840_VIN7_CH3 |
  87. CX25840_VIN4_CH2 |
  88. CX25840_VIN6_CH1,
  89. .gpio0 = 0,
  90. }, {
  91. .type = CX23885_VMUX_SVIDEO,
  92. .vmux = CX25840_VIN7_CH3 |
  93. CX25840_VIN4_CH2 |
  94. CX25840_VIN8_CH1 |
  95. CX25840_SVIDEO_ON,
  96. .gpio0 = 0,
  97. } },
  98. },
  99. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  100. .name = "Hauppauge WinTV-HVR1250",
  101. .portc = CX23885_MPEG_DVB,
  102. .input = {{
  103. .type = CX23885_VMUX_TELEVISION,
  104. .vmux = 0,
  105. .gpio0 = 0xff00,
  106. }, {
  107. .type = CX23885_VMUX_DEBUG,
  108. .vmux = 0,
  109. .gpio0 = 0xff01,
  110. }, {
  111. .type = CX23885_VMUX_COMPOSITE1,
  112. .vmux = 1,
  113. .gpio0 = 0xff02,
  114. }, {
  115. .type = CX23885_VMUX_SVIDEO,
  116. .vmux = 2,
  117. .gpio0 = 0xff02,
  118. } },
  119. },
  120. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  121. .name = "DViCO FusionHDTV5 Express",
  122. .portb = CX23885_MPEG_DVB,
  123. },
  124. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  125. .name = "Hauppauge WinTV-HVR1500Q",
  126. .portc = CX23885_MPEG_DVB,
  127. },
  128. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  129. .name = "Hauppauge WinTV-HVR1500",
  130. .portc = CX23885_MPEG_DVB,
  131. },
  132. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  133. .name = "Hauppauge WinTV-HVR1200",
  134. .portc = CX23885_MPEG_DVB,
  135. },
  136. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  137. .name = "Hauppauge WinTV-HVR1700",
  138. .portc = CX23885_MPEG_DVB,
  139. },
  140. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  141. .name = "Hauppauge WinTV-HVR1400",
  142. .portc = CX23885_MPEG_DVB,
  143. },
  144. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  145. .name = "DViCO FusionHDTV7 Dual Express",
  146. .portb = CX23885_MPEG_DVB,
  147. .portc = CX23885_MPEG_DVB,
  148. },
  149. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  150. .name = "DViCO FusionHDTV DVB-T Dual Express",
  151. .portb = CX23885_MPEG_DVB,
  152. .portc = CX23885_MPEG_DVB,
  153. },
  154. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  155. .name = "Leadtek Winfast PxDVR3200 H",
  156. .portc = CX23885_MPEG_DVB,
  157. },
  158. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  159. .name = "Compro VideoMate E650F",
  160. .portc = CX23885_MPEG_DVB,
  161. },
  162. [CX23885_BOARD_TBS_6920] = {
  163. .name = "TurboSight TBS 6920",
  164. .portb = CX23885_MPEG_DVB,
  165. },
  166. [CX23885_BOARD_TEVII_S470] = {
  167. .name = "TeVii S470",
  168. .portb = CX23885_MPEG_DVB,
  169. },
  170. [CX23885_BOARD_DVBWORLD_2005] = {
  171. .name = "DVBWorld DVB-S2 2005",
  172. .portb = CX23885_MPEG_DVB,
  173. },
  174. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  175. .cimax = 1,
  176. .name = "NetUP Dual DVB-S2 CI",
  177. .portb = CX23885_MPEG_DVB,
  178. .portc = CX23885_MPEG_DVB,
  179. },
  180. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  181. .name = "Hauppauge WinTV-HVR1270",
  182. .portc = CX23885_MPEG_DVB,
  183. },
  184. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  185. .name = "Hauppauge WinTV-HVR1275",
  186. .portc = CX23885_MPEG_DVB,
  187. },
  188. [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
  189. .name = "Hauppauge WinTV-HVR1255",
  190. .portc = CX23885_MPEG_DVB,
  191. },
  192. [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
  193. .name = "Hauppauge WinTV-HVR1210",
  194. .portc = CX23885_MPEG_DVB,
  195. },
  196. [CX23885_BOARD_MYGICA_X8506] = {
  197. .name = "Mygica X8506 DMB-TH",
  198. .portb = CX23885_MPEG_DVB,
  199. },
  200. [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
  201. .name = "Magic-Pro ProHDTV Extreme 2",
  202. .portb = CX23885_MPEG_DVB,
  203. },
  204. [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
  205. .name = "Hauppauge WinTV-HVR1850",
  206. .portb = CX23885_MPEG_ENCODER,
  207. .portc = CX23885_MPEG_DVB,
  208. },
  209. };
  210. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  211. /* ------------------------------------------------------------------ */
  212. /* PCI subsystem IDs */
  213. struct cx23885_subid cx23885_subids[] = {
  214. {
  215. .subvendor = 0x0070,
  216. .subdevice = 0x3400,
  217. .card = CX23885_BOARD_UNKNOWN,
  218. }, {
  219. .subvendor = 0x0070,
  220. .subdevice = 0x7600,
  221. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  222. }, {
  223. .subvendor = 0x0070,
  224. .subdevice = 0x7800,
  225. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  226. }, {
  227. .subvendor = 0x0070,
  228. .subdevice = 0x7801,
  229. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  230. }, {
  231. .subvendor = 0x0070,
  232. .subdevice = 0x7809,
  233. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  234. }, {
  235. .subvendor = 0x0070,
  236. .subdevice = 0x7911,
  237. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  238. }, {
  239. .subvendor = 0x18ac,
  240. .subdevice = 0xd500,
  241. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  242. }, {
  243. .subvendor = 0x0070,
  244. .subdevice = 0x7790,
  245. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  246. }, {
  247. .subvendor = 0x0070,
  248. .subdevice = 0x7797,
  249. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  250. }, {
  251. .subvendor = 0x0070,
  252. .subdevice = 0x7710,
  253. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  254. }, {
  255. .subvendor = 0x0070,
  256. .subdevice = 0x7717,
  257. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  258. }, {
  259. .subvendor = 0x0070,
  260. .subdevice = 0x71d1,
  261. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  262. }, {
  263. .subvendor = 0x0070,
  264. .subdevice = 0x71d3,
  265. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  266. }, {
  267. .subvendor = 0x0070,
  268. .subdevice = 0x8101,
  269. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  270. }, {
  271. .subvendor = 0x0070,
  272. .subdevice = 0x8010,
  273. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  274. }, {
  275. .subvendor = 0x18ac,
  276. .subdevice = 0xd618,
  277. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  278. }, {
  279. .subvendor = 0x18ac,
  280. .subdevice = 0xdb78,
  281. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  282. }, {
  283. .subvendor = 0x107d,
  284. .subdevice = 0x6681,
  285. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  286. }, {
  287. .subvendor = 0x185b,
  288. .subdevice = 0xe800,
  289. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  290. }, {
  291. .subvendor = 0x6920,
  292. .subdevice = 0x8888,
  293. .card = CX23885_BOARD_TBS_6920,
  294. }, {
  295. .subvendor = 0xd470,
  296. .subdevice = 0x9022,
  297. .card = CX23885_BOARD_TEVII_S470,
  298. }, {
  299. .subvendor = 0x0001,
  300. .subdevice = 0x2005,
  301. .card = CX23885_BOARD_DVBWORLD_2005,
  302. }, {
  303. .subvendor = 0x1b55,
  304. .subdevice = 0x2a2c,
  305. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  306. }, {
  307. .subvendor = 0x0070,
  308. .subdevice = 0x2211,
  309. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  310. }, {
  311. .subvendor = 0x0070,
  312. .subdevice = 0x2215,
  313. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  314. }, {
  315. .subvendor = 0x0070,
  316. .subdevice = 0x2251,
  317. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  318. }, {
  319. .subvendor = 0x0070,
  320. .subdevice = 0x2291,
  321. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  322. }, {
  323. .subvendor = 0x0070,
  324. .subdevice = 0x2295,
  325. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  326. }, {
  327. .subvendor = 0x14f1,
  328. .subdevice = 0x8651,
  329. .card = CX23885_BOARD_MYGICA_X8506,
  330. }, {
  331. .subvendor = 0x14f1,
  332. .subdevice = 0x8657,
  333. .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
  334. }, {
  335. .subvendor = 0x0070,
  336. .subdevice = 0x8541,
  337. .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
  338. },
  339. };
  340. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  341. void cx23885_card_list(struct cx23885_dev *dev)
  342. {
  343. int i;
  344. if (0 == dev->pci->subsystem_vendor &&
  345. 0 == dev->pci->subsystem_device) {
  346. printk(KERN_INFO
  347. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  348. "%s: be autodetected. Pass card=<n> insmod option\n"
  349. "%s: to workaround that. Redirect complaints to the\n"
  350. "%s: vendor of the TV card. Best regards,\n"
  351. "%s: -- tux\n",
  352. dev->name, dev->name, dev->name, dev->name, dev->name);
  353. } else {
  354. printk(KERN_INFO
  355. "%s: Your board isn't known (yet) to the driver.\n"
  356. "%s: Try to pick one of the existing card configs via\n"
  357. "%s: card=<n> insmod option. Updating to the latest\n"
  358. "%s: version might help as well.\n",
  359. dev->name, dev->name, dev->name, dev->name);
  360. }
  361. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  362. dev->name);
  363. for (i = 0; i < cx23885_bcount; i++)
  364. printk(KERN_INFO "%s: card=%d -> %s\n",
  365. dev->name, i, cx23885_boards[i].name);
  366. }
  367. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  368. {
  369. struct tveeprom tv;
  370. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  371. eeprom_data);
  372. /* Make sure we support the board model */
  373. switch (tv.model) {
  374. case 22001:
  375. /* WinTV-HVR1270 (PCIe, Retail, half height)
  376. * ATSC/QAM and basic analog, IR Blast */
  377. case 22009:
  378. /* WinTV-HVR1210 (PCIe, Retail, half height)
  379. * DVB-T and basic analog, IR Blast */
  380. case 22011:
  381. /* WinTV-HVR1270 (PCIe, Retail, half height)
  382. * ATSC/QAM and basic analog, IR Recv */
  383. case 22019:
  384. /* WinTV-HVR1210 (PCIe, Retail, half height)
  385. * DVB-T and basic analog, IR Recv */
  386. case 22021:
  387. /* WinTV-HVR1275 (PCIe, Retail, half height)
  388. * ATSC/QAM and basic analog, IR Recv */
  389. case 22029:
  390. /* WinTV-HVR1210 (PCIe, Retail, half height)
  391. * DVB-T and basic analog, IR Recv */
  392. case 22101:
  393. /* WinTV-HVR1270 (PCIe, Retail, full height)
  394. * ATSC/QAM and basic analog, IR Blast */
  395. case 22109:
  396. /* WinTV-HVR1210 (PCIe, Retail, full height)
  397. * DVB-T and basic analog, IR Blast */
  398. case 22111:
  399. /* WinTV-HVR1270 (PCIe, Retail, full height)
  400. * ATSC/QAM and basic analog, IR Recv */
  401. case 22119:
  402. /* WinTV-HVR1210 (PCIe, Retail, full height)
  403. * DVB-T and basic analog, IR Recv */
  404. case 22121:
  405. /* WinTV-HVR1275 (PCIe, Retail, full height)
  406. * ATSC/QAM and basic analog, IR Recv */
  407. case 22129:
  408. /* WinTV-HVR1210 (PCIe, Retail, full height)
  409. * DVB-T and basic analog, IR Recv */
  410. case 71009:
  411. /* WinTV-HVR1200 (PCIe, Retail, full height)
  412. * DVB-T and basic analog */
  413. case 71359:
  414. /* WinTV-HVR1200 (PCIe, OEM, half height)
  415. * DVB-T and basic analog */
  416. case 71439:
  417. /* WinTV-HVR1200 (PCIe, OEM, half height)
  418. * DVB-T and basic analog */
  419. case 71449:
  420. /* WinTV-HVR1200 (PCIe, OEM, full height)
  421. * DVB-T and basic analog */
  422. case 71939:
  423. /* WinTV-HVR1200 (PCIe, OEM, half height)
  424. * DVB-T and basic analog */
  425. case 71949:
  426. /* WinTV-HVR1200 (PCIe, OEM, full height)
  427. * DVB-T and basic analog */
  428. case 71959:
  429. /* WinTV-HVR1200 (PCIe, OEM, full height)
  430. * DVB-T and basic analog */
  431. case 71979:
  432. /* WinTV-HVR1200 (PCIe, OEM, half height)
  433. * DVB-T and basic analog */
  434. case 71999:
  435. /* WinTV-HVR1200 (PCIe, OEM, full height)
  436. * DVB-T and basic analog */
  437. case 76601:
  438. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  439. channel ATSC and MPEG2 HW Encoder */
  440. case 77001:
  441. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  442. and Basic analog */
  443. case 77011:
  444. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  445. and Basic analog */
  446. case 77041:
  447. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  448. and Basic analog */
  449. case 77051:
  450. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  451. and Basic analog */
  452. case 78011:
  453. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  454. Dual channel ATSC and MPEG2 HW Encoder */
  455. case 78501:
  456. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  457. Dual channel ATSC and MPEG2 HW Encoder */
  458. case 78521:
  459. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  460. Dual channel ATSC and MPEG2 HW Encoder */
  461. case 78531:
  462. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  463. Dual channel ATSC and MPEG2 HW Encoder */
  464. case 78631:
  465. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  466. Dual channel ATSC and MPEG2 HW Encoder */
  467. case 79001:
  468. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  469. ATSC and Basic analog */
  470. case 79101:
  471. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  472. ATSC and Basic analog */
  473. case 79561:
  474. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  475. ATSC and Basic analog */
  476. case 79571:
  477. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  478. ATSC and Basic analog */
  479. case 79671:
  480. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  481. ATSC and Basic analog */
  482. case 80019:
  483. /* WinTV-HVR1400 (Express Card, Retail, IR,
  484. * DVB-T and Basic analog */
  485. case 81509:
  486. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  487. * DVB-T and MPEG2 HW Encoder */
  488. case 81519:
  489. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  490. * DVB-T and MPEG2 HW Encoder */
  491. break;
  492. case 85021:
  493. /* WinTV-HVR1850 (PCIe, OEM, RCA in, IR, FM,
  494. Dual channel ATSC and MPEG2 HW Encoder */
  495. break;
  496. default:
  497. printk(KERN_WARNING "%s: warning: "
  498. "unknown hauppauge model #%d\n",
  499. dev->name, tv.model);
  500. break;
  501. }
  502. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  503. dev->name, tv.model);
  504. }
  505. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  506. {
  507. struct cx23885_tsport *port = priv;
  508. struct cx23885_dev *dev = port->dev;
  509. u32 bitmask = 0;
  510. if (command == XC2028_RESET_CLK)
  511. return 0;
  512. if (command != 0) {
  513. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  514. __func__, command);
  515. return -EINVAL;
  516. }
  517. switch (dev->board) {
  518. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  519. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  520. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  521. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  522. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  523. /* Tuner Reset Command */
  524. bitmask = 0x04;
  525. break;
  526. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  527. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  528. /* Two identical tuners on two different i2c buses,
  529. * we need to reset the correct gpio. */
  530. if (port->nr == 1)
  531. bitmask = 0x01;
  532. else if (port->nr == 2)
  533. bitmask = 0x04;
  534. break;
  535. }
  536. if (bitmask) {
  537. /* Drive the tuner into reset and back out */
  538. cx_clear(GP0_IO, bitmask);
  539. mdelay(200);
  540. cx_set(GP0_IO, bitmask);
  541. }
  542. return 0;
  543. }
  544. void cx23885_gpio_setup(struct cx23885_dev *dev)
  545. {
  546. switch (dev->board) {
  547. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  548. /* GPIO-0 cx24227 demodulator reset */
  549. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  550. break;
  551. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  552. /* GPIO-0 cx24227 demodulator */
  553. /* GPIO-2 xc3028 tuner */
  554. /* Put the parts into reset */
  555. cx_set(GP0_IO, 0x00050000);
  556. cx_clear(GP0_IO, 0x00000005);
  557. msleep(5);
  558. /* Bring the parts out of reset */
  559. cx_set(GP0_IO, 0x00050005);
  560. break;
  561. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  562. /* GPIO-0 cx24227 demodulator reset */
  563. /* GPIO-2 xc5000 tuner reset */
  564. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  565. break;
  566. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  567. /* GPIO-0 656_CLK */
  568. /* GPIO-1 656_D0 */
  569. /* GPIO-2 8295A Reset */
  570. /* GPIO-3-10 cx23417 data0-7 */
  571. /* GPIO-11-14 cx23417 addr0-3 */
  572. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  573. /* GPIO-19 IR_RX */
  574. /* CX23417 GPIO's */
  575. /* EIO15 Zilog Reset */
  576. /* EIO14 S5H1409/CX24227 Reset */
  577. mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
  578. /* Put the demod into reset and protect the eeprom */
  579. mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
  580. mdelay(100);
  581. /* Bring the demod and blaster out of reset */
  582. mc417_gpio_set(dev, GPIO_15 | GPIO_14);
  583. mdelay(100);
  584. /* Force the TDA8295A into reset and back */
  585. cx23885_gpio_enable(dev, GPIO_2, 1);
  586. cx23885_gpio_set(dev, GPIO_2);
  587. mdelay(20);
  588. cx23885_gpio_clear(dev, GPIO_2);
  589. mdelay(20);
  590. cx23885_gpio_set(dev, GPIO_2);
  591. mdelay(20);
  592. break;
  593. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  594. /* GPIO-0 tda10048 demodulator reset */
  595. /* GPIO-2 tda18271 tuner reset */
  596. /* Put the parts into reset and back */
  597. cx_set(GP0_IO, 0x00050000);
  598. mdelay(20);
  599. cx_clear(GP0_IO, 0x00000005);
  600. mdelay(20);
  601. cx_set(GP0_IO, 0x00050005);
  602. break;
  603. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  604. /* GPIO-0 TDA10048 demodulator reset */
  605. /* GPIO-2 TDA8295A Reset */
  606. /* GPIO-3-10 cx23417 data0-7 */
  607. /* GPIO-11-14 cx23417 addr0-3 */
  608. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  609. /* The following GPIO's are on the interna AVCore (cx25840) */
  610. /* GPIO-19 IR_RX */
  611. /* GPIO-20 IR_TX 416/DVBT Select */
  612. /* GPIO-21 IIS DAT */
  613. /* GPIO-22 IIS WCLK */
  614. /* GPIO-23 IIS BCLK */
  615. /* Put the parts into reset and back */
  616. cx_set(GP0_IO, 0x00050000);
  617. mdelay(20);
  618. cx_clear(GP0_IO, 0x00000005);
  619. mdelay(20);
  620. cx_set(GP0_IO, 0x00050005);
  621. break;
  622. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  623. /* GPIO-0 Dibcom7000p demodulator reset */
  624. /* GPIO-2 xc3028L tuner reset */
  625. /* GPIO-13 LED */
  626. /* Put the parts into reset and back */
  627. cx_set(GP0_IO, 0x00050000);
  628. mdelay(20);
  629. cx_clear(GP0_IO, 0x00000005);
  630. mdelay(20);
  631. cx_set(GP0_IO, 0x00050005);
  632. break;
  633. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  634. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  635. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  636. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  637. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  638. /* Put the parts into reset and back */
  639. cx_set(GP0_IO, 0x000f0000);
  640. mdelay(20);
  641. cx_clear(GP0_IO, 0x0000000f);
  642. mdelay(20);
  643. cx_set(GP0_IO, 0x000f000f);
  644. break;
  645. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  646. /* GPIO-0 portb xc3028 reset */
  647. /* GPIO-1 portb zl10353 reset */
  648. /* GPIO-2 portc xc3028 reset */
  649. /* GPIO-3 portc zl10353 reset */
  650. /* Put the parts into reset and back */
  651. cx_set(GP0_IO, 0x000f0000);
  652. mdelay(20);
  653. cx_clear(GP0_IO, 0x0000000f);
  654. mdelay(20);
  655. cx_set(GP0_IO, 0x000f000f);
  656. break;
  657. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  658. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  659. /* GPIO-2 xc3028 tuner reset */
  660. /* The following GPIO's are on the internal AVCore (cx25840) */
  661. /* GPIO-? zl10353 demod reset */
  662. /* Put the parts into reset and back */
  663. cx_set(GP0_IO, 0x00040000);
  664. mdelay(20);
  665. cx_clear(GP0_IO, 0x00000004);
  666. mdelay(20);
  667. cx_set(GP0_IO, 0x00040004);
  668. break;
  669. case CX23885_BOARD_TBS_6920:
  670. case CX23885_BOARD_TEVII_S470:
  671. cx_write(MC417_CTL, 0x00000036);
  672. cx_write(MC417_OEN, 0x00001000);
  673. cx_write(MC417_RWD, 0x00001800);
  674. break;
  675. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  676. /* GPIO-0 INTA from CiMax1
  677. GPIO-1 INTB from CiMax2
  678. GPIO-2 reset chips
  679. GPIO-3 to GPIO-10 data/addr for CA
  680. GPIO-11 ~CS0 to CiMax1
  681. GPIO-12 ~CS1 to CiMax2
  682. GPIO-13 ADL0 load LSB addr
  683. GPIO-14 ADL1 load MSB addr
  684. GPIO-15 ~RDY from CiMax
  685. GPIO-17 ~RD to CiMax
  686. GPIO-18 ~WR to CiMax
  687. */
  688. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  689. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  690. cx_clear(GP0_IO, 0x00030004);
  691. mdelay(100);/* reset delay */
  692. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  693. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  694. /* GPIO-15 IN as ~ACK, rest as OUT */
  695. cx_write(MC417_OEN, 0x00001000);
  696. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  697. cx_write(MC417_RWD, 0x0000c300);
  698. /* enable irq */
  699. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  700. break;
  701. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  702. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  703. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  704. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  705. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  706. /* GPIO-6 I2C Gate which can isolate the demod from the bus */
  707. /* GPIO-9 Demod reset */
  708. /* Put the parts into reset and back */
  709. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  710. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  711. cx23885_gpio_clear(dev, GPIO_9);
  712. mdelay(20);
  713. cx23885_gpio_set(dev, GPIO_9);
  714. break;
  715. case CX23885_BOARD_MYGICA_X8506:
  716. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  717. /* GPIO-1 reset XC5000 */
  718. /* GPIO-2 reset LGS8GL5 / LGS8G75 */
  719. cx_set(GP0_IO, 0x00060000);
  720. cx_clear(GP0_IO, 0x00000006);
  721. mdelay(100);
  722. cx_set(GP0_IO, 0x00060006);
  723. mdelay(100);
  724. break;
  725. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  726. /* GPIO-0 656_CLK */
  727. /* GPIO-1 656_D0 */
  728. /* GPIO-2 Wake# */
  729. /* GPIO-3-10 cx23417 data0-7 */
  730. /* GPIO-11-14 cx23417 addr0-3 */
  731. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  732. /* GPIO-19 IR_RX */
  733. /* GPIO-20 C_IR_TX */
  734. /* GPIO-21 I2S DAT */
  735. /* GPIO-22 I2S WCLK */
  736. /* GPIO-23 I2S BCLK */
  737. /* ALT GPIO: EXP GPIO LATCH */
  738. /* CX23417 GPIO's */
  739. /* GPIO-14 S5H1411/CX24228 Reset */
  740. /* GPIO-13 EEPROM write protect */
  741. mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
  742. /* Put the demod into reset and protect the eeprom */
  743. mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
  744. mdelay(100);
  745. /* Bring the demod out of reset */
  746. mc417_gpio_set(dev, GPIO_14);
  747. mdelay(100);
  748. /* CX24228 GPIO */
  749. /* Connected to IF / Mux */
  750. break;
  751. }
  752. }
  753. int cx23885_ir_init(struct cx23885_dev *dev)
  754. {
  755. switch (dev->board) {
  756. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  757. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  758. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  759. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  760. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  761. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  762. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  763. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  764. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  765. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  766. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  767. /* FIXME: Implement me */
  768. break;
  769. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  770. request_module("ir-kbd-i2c");
  771. break;
  772. }
  773. return 0;
  774. }
  775. void cx23885_card_setup(struct cx23885_dev *dev)
  776. {
  777. struct cx23885_tsport *ts1 = &dev->ts1;
  778. struct cx23885_tsport *ts2 = &dev->ts2;
  779. static u8 eeprom[256];
  780. if (dev->i2c_bus[0].i2c_rc == 0) {
  781. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  782. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  783. eeprom, sizeof(eeprom));
  784. }
  785. switch (dev->board) {
  786. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  787. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  788. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  789. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  790. if (dev->i2c_bus[0].i2c_rc == 0)
  791. hauppauge_eeprom(dev, eeprom+0x80);
  792. break;
  793. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  794. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  795. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  796. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  797. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  798. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  799. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  800. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  801. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  802. if (dev->i2c_bus[0].i2c_rc == 0)
  803. hauppauge_eeprom(dev, eeprom+0xc0);
  804. break;
  805. }
  806. switch (dev->board) {
  807. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  808. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  809. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  810. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  811. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  812. /* break omitted intentionally */
  813. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  814. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  815. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  816. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  817. break;
  818. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  819. /* Defaults for VID B - Analog encoder */
  820. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  821. ts1->gen_ctrl_val = 0x10e;
  822. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  823. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  824. /* APB_TSVALERR_POL (active low)*/
  825. ts1->vld_misc_val = 0x2000;
  826. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  827. /* Defaults for VID C */
  828. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  829. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  830. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  831. break;
  832. case CX23885_BOARD_TEVII_S470:
  833. case CX23885_BOARD_TBS_6920:
  834. case CX23885_BOARD_DVBWORLD_2005:
  835. ts1->gen_ctrl_val = 0x5; /* Parallel */
  836. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  837. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  838. break;
  839. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  840. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  841. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  842. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  843. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  844. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  845. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  846. break;
  847. case CX23885_BOARD_MYGICA_X8506:
  848. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  849. ts1->gen_ctrl_val = 0x5; /* Parallel */
  850. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  851. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  852. break;
  853. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  854. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  855. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  856. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  857. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  858. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  859. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  860. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  861. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  862. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  863. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  864. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  865. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  866. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  867. default:
  868. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  869. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  870. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  871. }
  872. /* Certain boards support analog, or require the avcore to be
  873. * loaded, ensure this happens.
  874. */
  875. switch (dev->board) {
  876. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  877. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  878. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  879. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  880. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  881. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  882. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  883. &dev->i2c_bus[2].i2c_adap,
  884. "cx25840", "cx25840", 0x88 >> 1, NULL);
  885. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  886. break;
  887. }
  888. /* AUX-PLL 27MHz CLK */
  889. switch (dev->board) {
  890. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  891. netup_initialize(dev);
  892. break;
  893. }
  894. }
  895. /* ------------------------------------------------------------------ */