board-da850-evm.c 24 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/input.h>
  21. #include <linux/mfd/tps6507x.h>
  22. #include <linux/gpio.h>
  23. #include <linux/gpio_keys.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/nand.h>
  27. #include <linux/mtd/partitions.h>
  28. #include <linux/mtd/physmap.h>
  29. #include <linux/regulator/machine.h>
  30. #include <linux/regulator/tps6507x.h>
  31. #include <linux/input/tps6507x-ts.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/mach/arch.h>
  34. #include <mach/cp_intc.h>
  35. #include <mach/da8xx.h>
  36. #include <mach/nand.h>
  37. #include <mach/mux.h>
  38. #include <mach/aemif.h>
  39. #define DA850_EVM_PHY_ID "0:00"
  40. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  41. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  42. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  43. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  44. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  45. static struct mtd_partition da850_evm_norflash_partition[] = {
  46. {
  47. .name = "bootloaders + env",
  48. .offset = 0,
  49. .size = SZ_512K,
  50. .mask_flags = MTD_WRITEABLE,
  51. },
  52. {
  53. .name = "kernel",
  54. .offset = MTDPART_OFS_APPEND,
  55. .size = SZ_2M,
  56. .mask_flags = 0,
  57. },
  58. {
  59. .name = "filesystem",
  60. .offset = MTDPART_OFS_APPEND,
  61. .size = MTDPART_SIZ_FULL,
  62. .mask_flags = 0,
  63. },
  64. };
  65. static struct physmap_flash_data da850_evm_norflash_data = {
  66. .width = 2,
  67. .parts = da850_evm_norflash_partition,
  68. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  69. };
  70. static struct resource da850_evm_norflash_resource[] = {
  71. {
  72. .start = DA8XX_AEMIF_CS2_BASE,
  73. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  74. .flags = IORESOURCE_MEM,
  75. },
  76. };
  77. static struct platform_device da850_evm_norflash_device = {
  78. .name = "physmap-flash",
  79. .id = 0,
  80. .dev = {
  81. .platform_data = &da850_evm_norflash_data,
  82. },
  83. .num_resources = 1,
  84. .resource = da850_evm_norflash_resource,
  85. };
  86. static struct davinci_pm_config da850_pm_pdata = {
  87. .sleepcount = 128,
  88. };
  89. static struct platform_device da850_pm_device = {
  90. .name = "pm-davinci",
  91. .dev = {
  92. .platform_data = &da850_pm_pdata,
  93. },
  94. .id = -1,
  95. };
  96. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  97. * (128K blocks). It may be used instead of the (default) SPI flash
  98. * to boot, using TI's tools to install the secondary boot loader
  99. * (UBL) and U-Boot.
  100. */
  101. static struct mtd_partition da850_evm_nandflash_partition[] = {
  102. {
  103. .name = "u-boot env",
  104. .offset = 0,
  105. .size = SZ_128K,
  106. .mask_flags = MTD_WRITEABLE,
  107. },
  108. {
  109. .name = "UBL",
  110. .offset = MTDPART_OFS_APPEND,
  111. .size = SZ_128K,
  112. .mask_flags = MTD_WRITEABLE,
  113. },
  114. {
  115. .name = "u-boot",
  116. .offset = MTDPART_OFS_APPEND,
  117. .size = 4 * SZ_128K,
  118. .mask_flags = MTD_WRITEABLE,
  119. },
  120. {
  121. .name = "kernel",
  122. .offset = 0x200000,
  123. .size = SZ_2M,
  124. .mask_flags = 0,
  125. },
  126. {
  127. .name = "filesystem",
  128. .offset = MTDPART_OFS_APPEND,
  129. .size = MTDPART_SIZ_FULL,
  130. .mask_flags = 0,
  131. },
  132. };
  133. static struct davinci_aemif_timing da850_evm_nandflash_timing = {
  134. .wsetup = 24,
  135. .wstrobe = 21,
  136. .whold = 14,
  137. .rsetup = 19,
  138. .rstrobe = 50,
  139. .rhold = 0,
  140. .ta = 20,
  141. };
  142. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  143. .parts = da850_evm_nandflash_partition,
  144. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  145. .ecc_mode = NAND_ECC_HW,
  146. .ecc_bits = 4,
  147. .options = NAND_USE_FLASH_BBT,
  148. .timing = &da850_evm_nandflash_timing,
  149. };
  150. static struct resource da850_evm_nandflash_resource[] = {
  151. {
  152. .start = DA8XX_AEMIF_CS3_BASE,
  153. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  154. .flags = IORESOURCE_MEM,
  155. },
  156. {
  157. .start = DA8XX_AEMIF_CTL_BASE,
  158. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. };
  162. static struct platform_device da850_evm_nandflash_device = {
  163. .name = "davinci_nand",
  164. .id = 1,
  165. .dev = {
  166. .platform_data = &da850_evm_nandflash_data,
  167. },
  168. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  169. .resource = da850_evm_nandflash_resource,
  170. };
  171. static struct platform_device *da850_evm_devices[] __initdata = {
  172. &da850_evm_nandflash_device,
  173. &da850_evm_norflash_device,
  174. };
  175. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  176. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  177. static void __init da850_evm_init_nor(void)
  178. {
  179. void __iomem *aemif_addr;
  180. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  181. /* Configure data bus width of CS2 to 16 bit */
  182. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  183. DA8XX_AEMIF_ASIZE_16BIT,
  184. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  185. iounmap(aemif_addr);
  186. }
  187. static const short da850_evm_nand_pins[] = {
  188. DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
  189. DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
  190. DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
  191. DA850_NEMA_WE, DA850_NEMA_OE,
  192. -1
  193. };
  194. static const short da850_evm_nor_pins[] = {
  195. DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
  196. DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
  197. DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
  198. DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
  199. DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
  200. DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
  201. DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
  202. DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
  203. DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
  204. DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
  205. DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
  206. DA850_EMA_A_22, DA850_EMA_A_23,
  207. -1
  208. };
  209. static u32 ui_card_detected;
  210. #if defined(CONFIG_MMC_DAVINCI) || \
  211. defined(CONFIG_MMC_DAVINCI_MODULE)
  212. #define HAS_MMC 1
  213. #else
  214. #define HAS_MMC 0
  215. #endif
  216. static inline void da850_evm_setup_nor_nand(void)
  217. {
  218. int ret = 0;
  219. if (ui_card_detected & !HAS_MMC) {
  220. ret = davinci_cfg_reg_list(da850_evm_nand_pins);
  221. if (ret)
  222. pr_warning("da850_evm_init: nand mux setup failed: "
  223. "%d\n", ret);
  224. ret = davinci_cfg_reg_list(da850_evm_nor_pins);
  225. if (ret)
  226. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  227. ret);
  228. da850_evm_init_nor();
  229. platform_add_devices(da850_evm_devices,
  230. ARRAY_SIZE(da850_evm_devices));
  231. }
  232. }
  233. #ifdef CONFIG_DA850_UI_RMII
  234. static inline void da850_evm_setup_emac_rmii(int rmii_sel)
  235. {
  236. struct davinci_soc_info *soc_info = &davinci_soc_info;
  237. soc_info->emac_pdata->rmii_en = 1;
  238. gpio_set_value_cansleep(rmii_sel, 0);
  239. }
  240. #else
  241. static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
  242. #endif
  243. #define DA850_KEYS_DEBOUNCE_MS 10
  244. /*
  245. * At 200ms polling interval it is possible to miss an
  246. * event by tapping very lightly on the push button but most
  247. * pushes do result in an event; longer intervals require the
  248. * user to hold the button whereas shorter intervals require
  249. * more CPU time for polling.
  250. */
  251. #define DA850_GPIO_KEYS_POLL_MS 200
  252. enum da850_evm_ui_exp_pins {
  253. DA850_EVM_UI_EXP_SEL_C = 5,
  254. DA850_EVM_UI_EXP_SEL_B,
  255. DA850_EVM_UI_EXP_SEL_A,
  256. DA850_EVM_UI_EXP_PB8,
  257. DA850_EVM_UI_EXP_PB7,
  258. DA850_EVM_UI_EXP_PB6,
  259. DA850_EVM_UI_EXP_PB5,
  260. DA850_EVM_UI_EXP_PB4,
  261. DA850_EVM_UI_EXP_PB3,
  262. DA850_EVM_UI_EXP_PB2,
  263. DA850_EVM_UI_EXP_PB1,
  264. };
  265. static const char const *da850_evm_ui_exp[] = {
  266. [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
  267. [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
  268. [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
  269. [DA850_EVM_UI_EXP_PB8] = "pb8",
  270. [DA850_EVM_UI_EXP_PB7] = "pb7",
  271. [DA850_EVM_UI_EXP_PB6] = "pb6",
  272. [DA850_EVM_UI_EXP_PB5] = "pb5",
  273. [DA850_EVM_UI_EXP_PB4] = "pb4",
  274. [DA850_EVM_UI_EXP_PB3] = "pb3",
  275. [DA850_EVM_UI_EXP_PB2] = "pb2",
  276. [DA850_EVM_UI_EXP_PB1] = "pb1",
  277. };
  278. #define DA850_N_UI_PB 8
  279. static struct gpio_keys_button da850_evm_ui_keys[] = {
  280. [0 ... DA850_N_UI_PB - 1] = {
  281. .type = EV_KEY,
  282. .active_low = 1,
  283. .wakeup = 0,
  284. .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
  285. .code = -1, /* assigned at runtime */
  286. .gpio = -1, /* assigned at runtime */
  287. .desc = NULL, /* assigned at runtime */
  288. },
  289. };
  290. static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
  291. .buttons = da850_evm_ui_keys,
  292. .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
  293. .poll_interval = DA850_GPIO_KEYS_POLL_MS,
  294. };
  295. static struct platform_device da850_evm_ui_keys_device = {
  296. .name = "gpio-keys-polled",
  297. .id = 0,
  298. .dev = {
  299. .platform_data = &da850_evm_ui_keys_pdata
  300. },
  301. };
  302. static void da850_evm_ui_keys_init(unsigned gpio)
  303. {
  304. int i;
  305. struct gpio_keys_button *button;
  306. for (i = 0; i < DA850_N_UI_PB; i++) {
  307. button = &da850_evm_ui_keys[i];
  308. button->code = KEY_F8 - i;
  309. button->desc = (char *)
  310. da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
  311. button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
  312. }
  313. }
  314. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  315. unsigned ngpio, void *c)
  316. {
  317. int sel_a, sel_b, sel_c, ret;
  318. sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
  319. sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
  320. sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
  321. ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
  322. if (ret) {
  323. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  324. goto exp_setup_sela_fail;
  325. }
  326. ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
  327. if (ret) {
  328. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  329. goto exp_setup_selb_fail;
  330. }
  331. ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
  332. if (ret) {
  333. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  334. goto exp_setup_selc_fail;
  335. }
  336. /* deselect all functionalities */
  337. gpio_direction_output(sel_a, 1);
  338. gpio_direction_output(sel_b, 1);
  339. gpio_direction_output(sel_c, 1);
  340. da850_evm_ui_keys_init(gpio);
  341. ret = platform_device_register(&da850_evm_ui_keys_device);
  342. if (ret) {
  343. pr_warning("Could not register UI GPIO expander push-buttons");
  344. goto exp_setup_keys_fail;
  345. }
  346. ui_card_detected = 1;
  347. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  348. da850_evm_setup_nor_nand();
  349. da850_evm_setup_emac_rmii(sel_a);
  350. return 0;
  351. exp_setup_keys_fail:
  352. gpio_free(sel_c);
  353. exp_setup_selc_fail:
  354. gpio_free(sel_b);
  355. exp_setup_selb_fail:
  356. gpio_free(sel_a);
  357. exp_setup_sela_fail:
  358. return ret;
  359. }
  360. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  361. unsigned gpio, unsigned ngpio, void *c)
  362. {
  363. platform_device_unregister(&da850_evm_ui_keys_device);
  364. /* deselect all functionalities */
  365. gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
  366. gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
  367. gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
  368. gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
  369. gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
  370. gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
  371. return 0;
  372. }
  373. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  374. .gpio_base = DAVINCI_N_GPIO,
  375. .setup = da850_evm_ui_expander_setup,
  376. .teardown = da850_evm_ui_expander_teardown,
  377. .names = da850_evm_ui_exp,
  378. };
  379. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  380. {
  381. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  382. },
  383. {
  384. I2C_BOARD_INFO("tca6416", 0x20),
  385. .platform_data = &da850_evm_ui_expander_info,
  386. },
  387. };
  388. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  389. .bus_freq = 100, /* kHz */
  390. .bus_delay = 0, /* usec */
  391. };
  392. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  393. .enabled_uarts = 0x7,
  394. };
  395. /* davinci da850 evm audio machine driver */
  396. static u8 da850_iis_serializer_direction[] = {
  397. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  398. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  399. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  400. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  401. };
  402. static struct snd_platform_data da850_evm_snd_data = {
  403. .tx_dma_offset = 0x2000,
  404. .rx_dma_offset = 0x2000,
  405. .op_mode = DAVINCI_MCASP_IIS_MODE,
  406. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  407. .tdm_slots = 2,
  408. .serial_dir = da850_iis_serializer_direction,
  409. .asp_chan_q = EVENTQ_1,
  410. .version = MCASP_VERSION_2,
  411. .txnumevt = 1,
  412. .rxnumevt = 1,
  413. };
  414. static int da850_evm_mmc_get_ro(int index)
  415. {
  416. return gpio_get_value(DA850_MMCSD_WP_PIN);
  417. }
  418. static int da850_evm_mmc_get_cd(int index)
  419. {
  420. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  421. }
  422. static struct davinci_mmc_config da850_mmc_config = {
  423. .get_ro = da850_evm_mmc_get_ro,
  424. .get_cd = da850_evm_mmc_get_cd,
  425. .wires = 4,
  426. .max_freq = 50000000,
  427. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  428. .version = MMC_CTLR_VERSION_2,
  429. };
  430. static void da850_panel_power_ctrl(int val)
  431. {
  432. /* lcd backlight */
  433. gpio_set_value(DA850_LCD_BL_PIN, val);
  434. /* lcd power */
  435. gpio_set_value(DA850_LCD_PWR_PIN, val);
  436. }
  437. static int da850_lcd_hw_init(void)
  438. {
  439. int status;
  440. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  441. if (status < 0)
  442. return status;
  443. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  444. if (status < 0) {
  445. gpio_free(DA850_LCD_BL_PIN);
  446. return status;
  447. }
  448. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  449. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  450. /* Switch off panel power and backlight */
  451. da850_panel_power_ctrl(0);
  452. /* Switch on panel power and backlight */
  453. da850_panel_power_ctrl(1);
  454. return 0;
  455. }
  456. /* TPS65070 voltage regulator support */
  457. /* 3.3V */
  458. static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  459. {
  460. .supply = "usb0_vdda33",
  461. },
  462. {
  463. .supply = "usb1_vdda33",
  464. },
  465. };
  466. /* 3.3V or 1.8V */
  467. static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  468. {
  469. .supply = "dvdd3318_a",
  470. },
  471. {
  472. .supply = "dvdd3318_b",
  473. },
  474. {
  475. .supply = "dvdd3318_c",
  476. },
  477. };
  478. /* 1.2V */
  479. static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  480. {
  481. .supply = "cvdd",
  482. },
  483. };
  484. /* 1.8V LDO */
  485. static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  486. {
  487. .supply = "sata_vddr",
  488. },
  489. {
  490. .supply = "usb0_vdda18",
  491. },
  492. {
  493. .supply = "usb1_vdda18",
  494. },
  495. {
  496. .supply = "ddr_dvdd18",
  497. },
  498. };
  499. /* 1.2V LDO */
  500. static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  501. {
  502. .supply = "sata_vdd",
  503. },
  504. {
  505. .supply = "pll0_vdda",
  506. },
  507. {
  508. .supply = "pll1_vdda",
  509. },
  510. {
  511. .supply = "usbs_cvdd",
  512. },
  513. {
  514. .supply = "vddarnwa1",
  515. },
  516. };
  517. /* We take advantage of the fact that both defdcdc{2,3} are tied high */
  518. static struct tps6507x_reg_platform_data tps6507x_platform_data = {
  519. .defdcdc_default = true,
  520. };
  521. static struct regulator_init_data tps65070_regulator_data[] = {
  522. /* dcdc1 */
  523. {
  524. .constraints = {
  525. .min_uV = 3150000,
  526. .max_uV = 3450000,
  527. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  528. REGULATOR_CHANGE_STATUS),
  529. .boot_on = 1,
  530. },
  531. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  532. .consumer_supplies = tps65070_dcdc1_consumers,
  533. },
  534. /* dcdc2 */
  535. {
  536. .constraints = {
  537. .min_uV = 1710000,
  538. .max_uV = 3450000,
  539. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  540. REGULATOR_CHANGE_STATUS),
  541. .boot_on = 1,
  542. },
  543. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  544. .consumer_supplies = tps65070_dcdc2_consumers,
  545. .driver_data = &tps6507x_platform_data,
  546. },
  547. /* dcdc3 */
  548. {
  549. .constraints = {
  550. .min_uV = 950000,
  551. .max_uV = 1320000,
  552. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  553. REGULATOR_CHANGE_STATUS),
  554. .boot_on = 1,
  555. },
  556. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  557. .consumer_supplies = tps65070_dcdc3_consumers,
  558. .driver_data = &tps6507x_platform_data,
  559. },
  560. /* ldo1 */
  561. {
  562. .constraints = {
  563. .min_uV = 1710000,
  564. .max_uV = 1890000,
  565. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  566. REGULATOR_CHANGE_STATUS),
  567. .boot_on = 1,
  568. },
  569. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  570. .consumer_supplies = tps65070_ldo1_consumers,
  571. },
  572. /* ldo2 */
  573. {
  574. .constraints = {
  575. .min_uV = 1140000,
  576. .max_uV = 1320000,
  577. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  578. REGULATOR_CHANGE_STATUS),
  579. .boot_on = 1,
  580. },
  581. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  582. .consumer_supplies = tps65070_ldo2_consumers,
  583. },
  584. };
  585. static struct touchscreen_init_data tps6507x_touchscreen_data = {
  586. .poll_period = 30, /* ms between touch samples */
  587. .min_pressure = 0x30, /* minimum pressure to trigger touch */
  588. .vref = 0, /* turn off vref when not using A/D */
  589. .vendor = 0, /* /sys/class/input/input?/id/vendor */
  590. .product = 65070, /* /sys/class/input/input?/id/product */
  591. .version = 0x100, /* /sys/class/input/input?/id/version */
  592. };
  593. static struct tps6507x_board tps_board = {
  594. .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
  595. .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
  596. };
  597. static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
  598. {
  599. I2C_BOARD_INFO("tps6507x", 0x48),
  600. .platform_data = &tps_board,
  601. },
  602. };
  603. static int __init pmic_tps65070_init(void)
  604. {
  605. return i2c_register_board_info(1, da850_evm_tps65070_info,
  606. ARRAY_SIZE(da850_evm_tps65070_info));
  607. }
  608. static const short da850_evm_lcdc_pins[] = {
  609. DA850_GPIO2_8, DA850_GPIO2_15,
  610. -1
  611. };
  612. static const short da850_evm_mii_pins[] = {
  613. DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
  614. DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
  615. DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
  616. DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
  617. DA850_MDIO_D,
  618. -1
  619. };
  620. static const short da850_evm_rmii_pins[] = {
  621. DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
  622. DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
  623. DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
  624. DA850_MDIO_D,
  625. -1
  626. };
  627. static int __init da850_evm_config_emac(void)
  628. {
  629. void __iomem *cfg_chip3_base;
  630. int ret;
  631. u32 val;
  632. struct davinci_soc_info *soc_info = &davinci_soc_info;
  633. u8 rmii_en = soc_info->emac_pdata->rmii_en;
  634. if (!machine_is_davinci_da850_evm())
  635. return 0;
  636. cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
  637. val = __raw_readl(cfg_chip3_base);
  638. if (rmii_en) {
  639. val |= BIT(8);
  640. ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
  641. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  642. " functional\n");
  643. } else {
  644. val &= ~BIT(8);
  645. ret = davinci_cfg_reg_list(da850_evm_mii_pins);
  646. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  647. " functional\n");
  648. }
  649. if (ret)
  650. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  651. ret);
  652. /* configure the CFGCHIP3 register for RMII or MII */
  653. __raw_writel(val, cfg_chip3_base);
  654. ret = davinci_cfg_reg(DA850_GPIO2_6);
  655. if (ret)
  656. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  657. "failed\n");
  658. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  659. if (ret) {
  660. pr_warning("Cannot open GPIO %d\n",
  661. DA850_MII_MDIO_CLKEN_PIN);
  662. return ret;
  663. }
  664. /* Enable/Disable MII MDIO clock */
  665. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
  666. soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
  667. ret = da8xx_register_emac();
  668. if (ret)
  669. pr_warning("da850_evm_init: emac registration failed: %d\n",
  670. ret);
  671. return 0;
  672. }
  673. device_initcall(da850_evm_config_emac);
  674. /*
  675. * The following EDMA channels/slots are not being used by drivers (for
  676. * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
  677. * they are being reserved for codecs on the DSP side.
  678. */
  679. static const s16 da850_dma0_rsv_chans[][2] = {
  680. /* (offset, number) */
  681. { 8, 6},
  682. {24, 4},
  683. {30, 2},
  684. {-1, -1}
  685. };
  686. static const s16 da850_dma0_rsv_slots[][2] = {
  687. /* (offset, number) */
  688. { 8, 6},
  689. {24, 4},
  690. {30, 50},
  691. {-1, -1}
  692. };
  693. static const s16 da850_dma1_rsv_chans[][2] = {
  694. /* (offset, number) */
  695. { 0, 28},
  696. {30, 2},
  697. {-1, -1}
  698. };
  699. static const s16 da850_dma1_rsv_slots[][2] = {
  700. /* (offset, number) */
  701. { 0, 28},
  702. {30, 90},
  703. {-1, -1}
  704. };
  705. static struct edma_rsv_info da850_edma_cc0_rsv = {
  706. .rsv_chans = da850_dma0_rsv_chans,
  707. .rsv_slots = da850_dma0_rsv_slots,
  708. };
  709. static struct edma_rsv_info da850_edma_cc1_rsv = {
  710. .rsv_chans = da850_dma1_rsv_chans,
  711. .rsv_slots = da850_dma1_rsv_slots,
  712. };
  713. static struct edma_rsv_info *da850_edma_rsv[2] = {
  714. &da850_edma_cc0_rsv,
  715. &da850_edma_cc1_rsv,
  716. };
  717. static __init void da850_evm_init(void)
  718. {
  719. int ret;
  720. ret = pmic_tps65070_init();
  721. if (ret)
  722. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  723. ret);
  724. ret = da850_register_edma(da850_edma_rsv);
  725. if (ret)
  726. pr_warning("da850_evm_init: edma registration failed: %d\n",
  727. ret);
  728. ret = davinci_cfg_reg_list(da850_i2c0_pins);
  729. if (ret)
  730. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  731. ret);
  732. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  733. if (ret)
  734. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  735. ret);
  736. ret = da8xx_register_watchdog();
  737. if (ret)
  738. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  739. ret);
  740. if (HAS_MMC) {
  741. ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
  742. if (ret)
  743. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  744. " %d\n", ret);
  745. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  746. if (ret)
  747. pr_warning("da850_evm_init: can not open GPIO %d\n",
  748. DA850_MMCSD_CD_PIN);
  749. gpio_direction_input(DA850_MMCSD_CD_PIN);
  750. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  751. if (ret)
  752. pr_warning("da850_evm_init: can not open GPIO %d\n",
  753. DA850_MMCSD_WP_PIN);
  754. gpio_direction_input(DA850_MMCSD_WP_PIN);
  755. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  756. if (ret)
  757. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  758. " %d\n", ret);
  759. }
  760. davinci_serial_init(&da850_evm_uart_config);
  761. i2c_register_board_info(1, da850_evm_i2c_devices,
  762. ARRAY_SIZE(da850_evm_i2c_devices));
  763. /*
  764. * shut down uart 0 and 1; they are not used on the board and
  765. * accessing them causes endless "too much work in irq53" messages
  766. * with arago fs
  767. */
  768. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  769. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  770. ret = davinci_cfg_reg_list(da850_mcasp_pins);
  771. if (ret)
  772. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  773. ret);
  774. da8xx_register_mcasp(0, &da850_evm_snd_data);
  775. ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
  776. if (ret)
  777. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  778. ret);
  779. /* Handle board specific muxing for LCD here */
  780. ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
  781. if (ret)
  782. pr_warning("da850_evm_init: evm specific lcd mux setup "
  783. "failed: %d\n", ret);
  784. ret = da850_lcd_hw_init();
  785. if (ret)
  786. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  787. ret);
  788. sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
  789. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  790. if (ret)
  791. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  792. ret);
  793. ret = da8xx_register_rtc();
  794. if (ret)
  795. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  796. ret = da850_register_cpufreq("pll0_sysclk3");
  797. if (ret)
  798. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  799. ret);
  800. ret = da8xx_register_cpuidle();
  801. if (ret)
  802. pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
  803. ret);
  804. ret = da850_register_pm(&da850_pm_device);
  805. if (ret)
  806. pr_warning("da850_evm_init: suspend registration failed: %d\n",
  807. ret);
  808. }
  809. #ifdef CONFIG_SERIAL_8250_CONSOLE
  810. static int __init da850_evm_console_init(void)
  811. {
  812. if (!machine_is_davinci_da850_evm())
  813. return 0;
  814. return add_preferred_console("ttyS", 2, "115200");
  815. }
  816. console_initcall(da850_evm_console_init);
  817. #endif
  818. static void __init da850_evm_map_io(void)
  819. {
  820. da850_init();
  821. }
  822. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
  823. .boot_params = (DA8XX_DDR_BASE + 0x100),
  824. .map_io = da850_evm_map_io,
  825. .init_irq = cp_intc_init,
  826. .timer = &davinci_timer,
  827. .init_machine = da850_evm_init,
  828. MACHINE_END