atmel_lcdfb.c 31 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <mach/board.h>
  20. #include <mach/cpu.h>
  21. #include <mach/gpio.h>
  22. #include <video/atmel_lcdc.h>
  23. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  24. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  25. /* configurable parameters */
  26. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  27. #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
  28. #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
  29. #if defined(CONFIG_ARCH_AT91)
  30. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  31. | FBINFO_PARTIAL_PAN_OK \
  32. | FBINFO_HWACCEL_YPAN)
  33. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  34. struct fb_var_screeninfo *var)
  35. {
  36. }
  37. #elif defined(CONFIG_AVR32)
  38. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  39. | FBINFO_PARTIAL_PAN_OK \
  40. | FBINFO_HWACCEL_XPAN \
  41. | FBINFO_HWACCEL_YPAN)
  42. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  43. struct fb_var_screeninfo *var)
  44. {
  45. u32 dma2dcfg;
  46. u32 pixeloff;
  47. pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  48. dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  49. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  50. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  51. /* Update configuration */
  52. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  53. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  54. | ATMEL_LCDC_DMAUPDT);
  55. }
  56. #endif
  57. static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  58. | ATMEL_LCDC_POL_POSITIVE
  59. | ATMEL_LCDC_ENA_PWMENABLE;
  60. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  61. /* some bl->props field just changed */
  62. static int atmel_bl_update_status(struct backlight_device *bl)
  63. {
  64. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  65. int power = sinfo->bl_power;
  66. int brightness = bl->props.brightness;
  67. /* REVISIT there may be a meaningful difference between
  68. * fb_blank and power ... there seem to be some cases
  69. * this doesn't handle correctly.
  70. */
  71. if (bl->props.fb_blank != sinfo->bl_power)
  72. power = bl->props.fb_blank;
  73. else if (bl->props.power != sinfo->bl_power)
  74. power = bl->props.power;
  75. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  76. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  77. else if (power != FB_BLANK_UNBLANK)
  78. brightness = 0;
  79. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  80. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  81. brightness ? contrast_ctr : 0);
  82. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  83. return 0;
  84. }
  85. static int atmel_bl_get_brightness(struct backlight_device *bl)
  86. {
  87. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  88. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  89. }
  90. static struct backlight_ops atmel_lcdc_bl_ops = {
  91. .update_status = atmel_bl_update_status,
  92. .get_brightness = atmel_bl_get_brightness,
  93. };
  94. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  95. {
  96. struct backlight_device *bl;
  97. sinfo->bl_power = FB_BLANK_UNBLANK;
  98. if (sinfo->backlight)
  99. return;
  100. bl = backlight_device_register("backlight", &sinfo->pdev->dev,
  101. sinfo, &atmel_lcdc_bl_ops);
  102. if (IS_ERR(bl)) {
  103. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  104. PTR_ERR(bl));
  105. return;
  106. }
  107. sinfo->backlight = bl;
  108. bl->props.power = FB_BLANK_UNBLANK;
  109. bl->props.fb_blank = FB_BLANK_UNBLANK;
  110. bl->props.max_brightness = 0xff;
  111. bl->props.brightness = atmel_bl_get_brightness(bl);
  112. }
  113. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  114. {
  115. if (sinfo->backlight)
  116. backlight_device_unregister(sinfo->backlight);
  117. }
  118. #else
  119. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  120. {
  121. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  122. }
  123. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  124. {
  125. }
  126. #endif
  127. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  128. {
  129. /* have some default contrast/backlight settings */
  130. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  131. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  132. if (sinfo->lcdcon_is_backlight)
  133. init_backlight(sinfo);
  134. }
  135. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  136. .type = FB_TYPE_PACKED_PIXELS,
  137. .visual = FB_VISUAL_TRUECOLOR,
  138. .xpanstep = 0,
  139. .ypanstep = 1,
  140. .ywrapstep = 0,
  141. .accel = FB_ACCEL_NONE,
  142. };
  143. static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
  144. {
  145. unsigned long value;
  146. if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
  147. return xres;
  148. value = xres;
  149. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  150. /* STN display */
  151. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  152. value *= 3;
  153. }
  154. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  155. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  156. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  157. value = DIV_ROUND_UP(value, 4);
  158. else
  159. value = DIV_ROUND_UP(value, 8);
  160. }
  161. return value;
  162. }
  163. static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
  164. {
  165. /* Turn off the LCD controller and the DMA controller */
  166. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  167. sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  168. /* Wait for the LCDC core to become idle */
  169. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  170. msleep(10);
  171. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  172. }
  173. static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
  174. {
  175. atmel_lcdfb_stop_nowait(sinfo);
  176. /* Wait for DMA engine to become idle... */
  177. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  178. msleep(10);
  179. }
  180. static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
  181. {
  182. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
  183. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  184. (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
  185. | ATMEL_LCDC_PWR);
  186. }
  187. static void atmel_lcdfb_update_dma(struct fb_info *info,
  188. struct fb_var_screeninfo *var)
  189. {
  190. struct atmel_lcdfb_info *sinfo = info->par;
  191. struct fb_fix_screeninfo *fix = &info->fix;
  192. unsigned long dma_addr;
  193. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  194. + var->xoffset * var->bits_per_pixel / 8);
  195. dma_addr &= ~3UL;
  196. /* Set framebuffer DMA base address and pixel offset */
  197. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  198. atmel_lcdfb_update_dma2d(sinfo, var);
  199. }
  200. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  201. {
  202. struct fb_info *info = sinfo->info;
  203. dma_free_writecombine(info->device, info->fix.smem_len,
  204. info->screen_base, info->fix.smem_start);
  205. }
  206. /**
  207. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  208. * @sinfo: the frame buffer to allocate memory for
  209. */
  210. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  211. {
  212. struct fb_info *info = sinfo->info;
  213. struct fb_var_screeninfo *var = &info->var;
  214. unsigned int smem_len;
  215. smem_len = (var->xres_virtual * var->yres_virtual
  216. * ((var->bits_per_pixel + 7) / 8));
  217. mutex_lock(&info->mm_lock);
  218. info->fix.smem_len = max(smem_len, sinfo->smem_len);
  219. mutex_unlock(&info->mm_lock);
  220. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  221. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  222. if (!info->screen_base) {
  223. return -ENOMEM;
  224. }
  225. memset(info->screen_base, 0, info->fix.smem_len);
  226. return 0;
  227. }
  228. static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
  229. struct fb_info *info)
  230. {
  231. struct fb_videomode varfbmode;
  232. const struct fb_videomode *fbmode = NULL;
  233. fb_var_to_videomode(&varfbmode, var);
  234. fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
  235. if (fbmode)
  236. fb_videomode_to_var(var, fbmode);
  237. return fbmode;
  238. }
  239. /**
  240. * atmel_lcdfb_check_var - Validates a var passed in.
  241. * @var: frame buffer variable screen structure
  242. * @info: frame buffer structure that represents a single frame buffer
  243. *
  244. * Checks to see if the hardware supports the state requested by
  245. * var passed in. This function does not alter the hardware
  246. * state!!! This means the data stored in struct fb_info and
  247. * struct atmel_lcdfb_info do not change. This includes the var
  248. * inside of struct fb_info. Do NOT change these. This function
  249. * can be called on its own if we intent to only test a mode and
  250. * not actually set it. The stuff in modedb.c is a example of
  251. * this. If the var passed in is slightly off by what the
  252. * hardware can support then we alter the var PASSED in to what
  253. * we can do. If the hardware doesn't support mode change a
  254. * -EINVAL will be returned by the upper layers. You don't need
  255. * to implement this function then. If you hardware doesn't
  256. * support changing the resolution then this function is not
  257. * needed. In this case the driver would just provide a var that
  258. * represents the static state the screen is in.
  259. *
  260. * Returns negative errno on error, or zero on success.
  261. */
  262. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  263. struct fb_info *info)
  264. {
  265. struct device *dev = info->device;
  266. struct atmel_lcdfb_info *sinfo = info->par;
  267. unsigned long clk_value_khz;
  268. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  269. dev_dbg(dev, "%s:\n", __func__);
  270. if (!(var->pixclock && var->bits_per_pixel)) {
  271. /* choose a suitable mode if possible */
  272. if (!atmel_lcdfb_choose_mode(var, info)) {
  273. dev_err(dev, "needed value not specified\n");
  274. return -EINVAL;
  275. }
  276. }
  277. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  278. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  279. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  280. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  281. if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
  282. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  283. return -EINVAL;
  284. }
  285. /* Do not allow to have real resoulution larger than virtual */
  286. if (var->xres > var->xres_virtual)
  287. var->xres_virtual = var->xres;
  288. if (var->yres > var->yres_virtual)
  289. var->yres_virtual = var->yres;
  290. /* Force same alignment for each line */
  291. var->xres = (var->xres + 3) & ~3UL;
  292. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  293. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  294. var->transp.msb_right = 0;
  295. var->transp.offset = var->transp.length = 0;
  296. var->xoffset = var->yoffset = 0;
  297. if (info->fix.smem_len) {
  298. unsigned int smem_len = (var->xres_virtual * var->yres_virtual
  299. * ((var->bits_per_pixel + 7) / 8));
  300. if (smem_len > info->fix.smem_len)
  301. return -EINVAL;
  302. }
  303. /* Saturate vertical and horizontal timings at maximum values */
  304. var->vsync_len = min_t(u32, var->vsync_len,
  305. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  306. var->upper_margin = min_t(u32, var->upper_margin,
  307. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  308. var->lower_margin = min_t(u32, var->lower_margin,
  309. ATMEL_LCDC_VFP);
  310. var->right_margin = min_t(u32, var->right_margin,
  311. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  312. var->hsync_len = min_t(u32, var->hsync_len,
  313. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  314. var->left_margin = min_t(u32, var->left_margin,
  315. ATMEL_LCDC_HBP + 1);
  316. /* Some parameters can't be zero */
  317. var->vsync_len = max_t(u32, var->vsync_len, 1);
  318. var->right_margin = max_t(u32, var->right_margin, 1);
  319. var->hsync_len = max_t(u32, var->hsync_len, 1);
  320. var->left_margin = max_t(u32, var->left_margin, 1);
  321. switch (var->bits_per_pixel) {
  322. case 1:
  323. case 2:
  324. case 4:
  325. case 8:
  326. var->red.offset = var->green.offset = var->blue.offset = 0;
  327. var->red.length = var->green.length = var->blue.length
  328. = var->bits_per_pixel;
  329. break;
  330. case 15:
  331. case 16:
  332. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  333. /* RGB:565 mode */
  334. var->red.offset = 11;
  335. var->blue.offset = 0;
  336. var->green.length = 6;
  337. } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
  338. var->red.offset = 10;
  339. var->blue.offset = 0;
  340. var->green.length = 5;
  341. } else {
  342. /* BGR:555 mode */
  343. var->red.offset = 0;
  344. var->blue.offset = 10;
  345. var->green.length = 5;
  346. }
  347. var->green.offset = 5;
  348. var->red.length = var->blue.length = 5;
  349. break;
  350. case 32:
  351. var->transp.offset = 24;
  352. var->transp.length = 8;
  353. /* fall through */
  354. case 24:
  355. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  356. /* RGB:888 mode */
  357. var->red.offset = 16;
  358. var->blue.offset = 0;
  359. } else {
  360. /* BGR:888 mode */
  361. var->red.offset = 0;
  362. var->blue.offset = 16;
  363. }
  364. var->green.offset = 8;
  365. var->red.length = var->green.length = var->blue.length = 8;
  366. break;
  367. default:
  368. dev_err(dev, "color depth %d not supported\n",
  369. var->bits_per_pixel);
  370. return -EINVAL;
  371. }
  372. return 0;
  373. }
  374. /*
  375. * LCD reset sequence
  376. */
  377. static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
  378. {
  379. might_sleep();
  380. atmel_lcdfb_stop(sinfo);
  381. atmel_lcdfb_start(sinfo);
  382. }
  383. /**
  384. * atmel_lcdfb_set_par - Alters the hardware state.
  385. * @info: frame buffer structure that represents a single frame buffer
  386. *
  387. * Using the fb_var_screeninfo in fb_info we set the resolution
  388. * of the this particular framebuffer. This function alters the
  389. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  390. * not alter var in fb_info since we are using that data. This
  391. * means we depend on the data in var inside fb_info to be
  392. * supported by the hardware. atmel_lcdfb_check_var is always called
  393. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  394. * change the resolution you don't need this function.
  395. *
  396. */
  397. static int atmel_lcdfb_set_par(struct fb_info *info)
  398. {
  399. struct atmel_lcdfb_info *sinfo = info->par;
  400. unsigned long hozval_linesz;
  401. unsigned long value;
  402. unsigned long clk_value_khz;
  403. unsigned long bits_per_line;
  404. might_sleep();
  405. dev_dbg(info->device, "%s:\n", __func__);
  406. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  407. info->var.xres, info->var.yres,
  408. info->var.xres_virtual, info->var.yres_virtual);
  409. atmel_lcdfb_stop_nowait(sinfo);
  410. if (info->var.bits_per_pixel == 1)
  411. info->fix.visual = FB_VISUAL_MONO01;
  412. else if (info->var.bits_per_pixel <= 8)
  413. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  414. else
  415. info->fix.visual = FB_VISUAL_TRUECOLOR;
  416. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  417. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  418. /* Re-initialize the DMA engine... */
  419. dev_dbg(info->device, " * update DMA engine\n");
  420. atmel_lcdfb_update_dma(info, &info->var);
  421. /* ...set frame size and burst length = 8 words (?) */
  422. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  423. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  424. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  425. /* Now, the LCDC core... */
  426. /* Set pixel clock */
  427. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  428. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  429. if (value < 2) {
  430. dev_notice(info->device, "Bypassing pixel clock divider\n");
  431. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  432. } else {
  433. value = (value / 2) - 1;
  434. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
  435. value);
  436. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
  437. value << ATMEL_LCDC_CLKVAL_OFFSET);
  438. info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
  439. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  440. PICOS2KHZ(info->var.pixclock));
  441. }
  442. /* Initialize control register 2 */
  443. value = sinfo->default_lcdcon2;
  444. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  445. value |= ATMEL_LCDC_INVLINE_INVERTED;
  446. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  447. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  448. switch (info->var.bits_per_pixel) {
  449. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  450. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  451. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  452. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  453. case 15: /* fall through */
  454. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  455. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  456. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  457. default: BUG(); break;
  458. }
  459. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  460. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  461. /* Vertical timing */
  462. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  463. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  464. value |= info->var.lower_margin;
  465. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  466. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  467. /* Horizontal timing */
  468. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  469. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  470. value |= (info->var.left_margin - 1);
  471. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  472. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  473. /* Horizontal value (aka line size) */
  474. hozval_linesz = compute_hozval(info->var.xres,
  475. lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
  476. /* Display size */
  477. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  478. value |= info->var.yres - 1;
  479. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  480. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  481. /* FIFO Threshold: Use formula from data sheet */
  482. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  483. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  484. /* Toggle LCD_MODE every frame */
  485. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  486. /* Disable all interrupts */
  487. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  488. /* Enable FIFO & DMA errors */
  489. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  490. /* ...wait for DMA engine to become idle... */
  491. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  492. msleep(10);
  493. atmel_lcdfb_start(sinfo);
  494. dev_dbg(info->device, " * DONE\n");
  495. return 0;
  496. }
  497. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  498. {
  499. chan &= 0xffff;
  500. chan >>= 16 - bf->length;
  501. return chan << bf->offset;
  502. }
  503. /**
  504. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  505. * @regno: Which register in the CLUT we are programming
  506. * @red: The red value which can be up to 16 bits wide
  507. * @green: The green value which can be up to 16 bits wide
  508. * @blue: The blue value which can be up to 16 bits wide.
  509. * @transp: If supported the alpha value which can be up to 16 bits wide.
  510. * @info: frame buffer info structure
  511. *
  512. * Set a single color register. The values supplied have a 16 bit
  513. * magnitude which needs to be scaled in this function for the hardware.
  514. * Things to take into consideration are how many color registers, if
  515. * any, are supported with the current color visual. With truecolor mode
  516. * no color palettes are supported. Here a psuedo palette is created
  517. * which we store the value in pseudo_palette in struct fb_info. For
  518. * pseudocolor mode we have a limited color palette. To deal with this
  519. * we can program what color is displayed for a particular pixel value.
  520. * DirectColor is similar in that we can program each color field. If
  521. * we have a static colormap we don't need to implement this function.
  522. *
  523. * Returns negative errno on error, or zero on success. In an
  524. * ideal world, this would have been the case, but as it turns
  525. * out, the other drivers return 1 on failure, so that's what
  526. * we're going to do.
  527. */
  528. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  529. unsigned int green, unsigned int blue,
  530. unsigned int transp, struct fb_info *info)
  531. {
  532. struct atmel_lcdfb_info *sinfo = info->par;
  533. unsigned int val;
  534. u32 *pal;
  535. int ret = 1;
  536. if (info->var.grayscale)
  537. red = green = blue = (19595 * red + 38470 * green
  538. + 7471 * blue) >> 16;
  539. switch (info->fix.visual) {
  540. case FB_VISUAL_TRUECOLOR:
  541. if (regno < 16) {
  542. pal = info->pseudo_palette;
  543. val = chan_to_field(red, &info->var.red);
  544. val |= chan_to_field(green, &info->var.green);
  545. val |= chan_to_field(blue, &info->var.blue);
  546. pal[regno] = val;
  547. ret = 0;
  548. }
  549. break;
  550. case FB_VISUAL_PSEUDOCOLOR:
  551. if (regno < 256) {
  552. val = ((red >> 11) & 0x001f);
  553. val |= ((green >> 6) & 0x03e0);
  554. val |= ((blue >> 1) & 0x7c00);
  555. /*
  556. * TODO: intensity bit. Maybe something like
  557. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  558. */
  559. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  560. ret = 0;
  561. }
  562. break;
  563. case FB_VISUAL_MONO01:
  564. if (regno < 2) {
  565. val = (regno == 0) ? 0x00 : 0x1F;
  566. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  567. ret = 0;
  568. }
  569. break;
  570. }
  571. return ret;
  572. }
  573. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  574. struct fb_info *info)
  575. {
  576. dev_dbg(info->device, "%s\n", __func__);
  577. atmel_lcdfb_update_dma(info, var);
  578. return 0;
  579. }
  580. static struct fb_ops atmel_lcdfb_ops = {
  581. .owner = THIS_MODULE,
  582. .fb_check_var = atmel_lcdfb_check_var,
  583. .fb_set_par = atmel_lcdfb_set_par,
  584. .fb_setcolreg = atmel_lcdfb_setcolreg,
  585. .fb_pan_display = atmel_lcdfb_pan_display,
  586. .fb_fillrect = cfb_fillrect,
  587. .fb_copyarea = cfb_copyarea,
  588. .fb_imageblit = cfb_imageblit,
  589. };
  590. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  591. {
  592. struct fb_info *info = dev_id;
  593. struct atmel_lcdfb_info *sinfo = info->par;
  594. u32 status;
  595. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  596. if (status & ATMEL_LCDC_UFLWI) {
  597. dev_warn(info->device, "FIFO underflow %#x\n", status);
  598. /* reset DMA and FIFO to avoid screen shifting */
  599. schedule_work(&sinfo->task);
  600. }
  601. lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
  602. return IRQ_HANDLED;
  603. }
  604. /*
  605. * LCD controller task (to reset the LCD)
  606. */
  607. static void atmel_lcdfb_task(struct work_struct *work)
  608. {
  609. struct atmel_lcdfb_info *sinfo =
  610. container_of(work, struct atmel_lcdfb_info, task);
  611. atmel_lcdfb_reset(sinfo);
  612. }
  613. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  614. {
  615. struct fb_info *info = sinfo->info;
  616. int ret = 0;
  617. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  618. dev_info(info->device,
  619. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  620. (unsigned long)info->fix.smem_len / 1024,
  621. (unsigned long)info->fix.smem_start,
  622. info->screen_base);
  623. /* Allocate colormap */
  624. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  625. if (ret < 0)
  626. dev_err(info->device, "Alloc color map failed\n");
  627. return ret;
  628. }
  629. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  630. {
  631. if (sinfo->bus_clk)
  632. clk_enable(sinfo->bus_clk);
  633. clk_enable(sinfo->lcdc_clk);
  634. }
  635. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  636. {
  637. if (sinfo->bus_clk)
  638. clk_disable(sinfo->bus_clk);
  639. clk_disable(sinfo->lcdc_clk);
  640. }
  641. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  642. {
  643. struct device *dev = &pdev->dev;
  644. struct fb_info *info;
  645. struct atmel_lcdfb_info *sinfo;
  646. struct atmel_lcdfb_info *pdata_sinfo;
  647. struct fb_videomode fbmode;
  648. struct resource *regs = NULL;
  649. struct resource *map = NULL;
  650. int ret;
  651. dev_dbg(dev, "%s BEGIN\n", __func__);
  652. ret = -ENOMEM;
  653. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  654. if (!info) {
  655. dev_err(dev, "cannot allocate memory\n");
  656. goto out;
  657. }
  658. sinfo = info->par;
  659. if (dev->platform_data) {
  660. pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
  661. sinfo->default_bpp = pdata_sinfo->default_bpp;
  662. sinfo->default_dmacon = pdata_sinfo->default_dmacon;
  663. sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
  664. sinfo->default_monspecs = pdata_sinfo->default_monspecs;
  665. sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
  666. sinfo->guard_time = pdata_sinfo->guard_time;
  667. sinfo->smem_len = pdata_sinfo->smem_len;
  668. sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
  669. sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
  670. } else {
  671. dev_err(dev, "cannot get default configuration\n");
  672. goto free_info;
  673. }
  674. sinfo->info = info;
  675. sinfo->pdev = pdev;
  676. strcpy(info->fix.id, sinfo->pdev->name);
  677. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  678. info->pseudo_palette = sinfo->pseudo_palette;
  679. info->fbops = &atmel_lcdfb_ops;
  680. memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
  681. info->fix = atmel_lcdfb_fix;
  682. /* Enable LCDC Clocks */
  683. if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
  684. sinfo->bus_clk = clk_get(dev, "hck1");
  685. if (IS_ERR(sinfo->bus_clk)) {
  686. ret = PTR_ERR(sinfo->bus_clk);
  687. goto free_info;
  688. }
  689. }
  690. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  691. if (IS_ERR(sinfo->lcdc_clk)) {
  692. ret = PTR_ERR(sinfo->lcdc_clk);
  693. goto put_bus_clk;
  694. }
  695. atmel_lcdfb_start_clock(sinfo);
  696. ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
  697. info->monspecs.modedb_len, info->monspecs.modedb,
  698. sinfo->default_bpp);
  699. if (!ret) {
  700. dev_err(dev, "no suitable video mode found\n");
  701. goto stop_clk;
  702. }
  703. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  704. if (!regs) {
  705. dev_err(dev, "resources unusable\n");
  706. ret = -ENXIO;
  707. goto stop_clk;
  708. }
  709. sinfo->irq_base = platform_get_irq(pdev, 0);
  710. if (sinfo->irq_base < 0) {
  711. dev_err(dev, "unable to get irq\n");
  712. ret = sinfo->irq_base;
  713. goto stop_clk;
  714. }
  715. /* Initialize video memory */
  716. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  717. if (map) {
  718. /* use a pre-allocated memory buffer */
  719. info->fix.smem_start = map->start;
  720. info->fix.smem_len = map->end - map->start + 1;
  721. if (!request_mem_region(info->fix.smem_start,
  722. info->fix.smem_len, pdev->name)) {
  723. ret = -EBUSY;
  724. goto stop_clk;
  725. }
  726. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  727. if (!info->screen_base)
  728. goto release_intmem;
  729. /*
  730. * Don't clear the framebuffer -- someone may have set
  731. * up a splash image.
  732. */
  733. } else {
  734. /* alocate memory buffer */
  735. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  736. if (ret < 0) {
  737. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  738. goto stop_clk;
  739. }
  740. }
  741. /* LCDC registers */
  742. info->fix.mmio_start = regs->start;
  743. info->fix.mmio_len = regs->end - regs->start + 1;
  744. if (!request_mem_region(info->fix.mmio_start,
  745. info->fix.mmio_len, pdev->name)) {
  746. ret = -EBUSY;
  747. goto free_fb;
  748. }
  749. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  750. if (!sinfo->mmio) {
  751. dev_err(dev, "cannot map LCDC registers\n");
  752. goto release_mem;
  753. }
  754. /* Initialize PWM for contrast or backlight ("off") */
  755. init_contrast(sinfo);
  756. /* interrupt */
  757. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  758. if (ret) {
  759. dev_err(dev, "request_irq failed: %d\n", ret);
  760. goto unmap_mmio;
  761. }
  762. /* Some operations on the LCDC might sleep and
  763. * require a preemptible task context */
  764. INIT_WORK(&sinfo->task, atmel_lcdfb_task);
  765. ret = atmel_lcdfb_init_fbinfo(sinfo);
  766. if (ret < 0) {
  767. dev_err(dev, "init fbinfo failed: %d\n", ret);
  768. goto unregister_irqs;
  769. }
  770. /*
  771. * This makes sure that our colour bitfield
  772. * descriptors are correctly initialised.
  773. */
  774. atmel_lcdfb_check_var(&info->var, info);
  775. ret = fb_set_var(info, &info->var);
  776. if (ret) {
  777. dev_warn(dev, "unable to set display parameters\n");
  778. goto free_cmap;
  779. }
  780. dev_set_drvdata(dev, info);
  781. /*
  782. * Tell the world that we're ready to go
  783. */
  784. ret = register_framebuffer(info);
  785. if (ret < 0) {
  786. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  787. goto reset_drvdata;
  788. }
  789. /* add selected videomode to modelist */
  790. fb_var_to_videomode(&fbmode, &info->var);
  791. fb_add_videomode(&fbmode, &info->modelist);
  792. /* Power up the LCDC screen */
  793. if (sinfo->atmel_lcdfb_power_control)
  794. sinfo->atmel_lcdfb_power_control(1);
  795. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
  796. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  797. return 0;
  798. reset_drvdata:
  799. dev_set_drvdata(dev, NULL);
  800. free_cmap:
  801. fb_dealloc_cmap(&info->cmap);
  802. unregister_irqs:
  803. cancel_work_sync(&sinfo->task);
  804. free_irq(sinfo->irq_base, info);
  805. unmap_mmio:
  806. exit_backlight(sinfo);
  807. iounmap(sinfo->mmio);
  808. release_mem:
  809. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  810. free_fb:
  811. if (map)
  812. iounmap(info->screen_base);
  813. else
  814. atmel_lcdfb_free_video_memory(sinfo);
  815. release_intmem:
  816. if (map)
  817. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  818. stop_clk:
  819. atmel_lcdfb_stop_clock(sinfo);
  820. clk_put(sinfo->lcdc_clk);
  821. put_bus_clk:
  822. if (sinfo->bus_clk)
  823. clk_put(sinfo->bus_clk);
  824. free_info:
  825. framebuffer_release(info);
  826. out:
  827. dev_dbg(dev, "%s FAILED\n", __func__);
  828. return ret;
  829. }
  830. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  831. {
  832. struct device *dev = &pdev->dev;
  833. struct fb_info *info = dev_get_drvdata(dev);
  834. struct atmel_lcdfb_info *sinfo;
  835. if (!info || !info->par)
  836. return 0;
  837. sinfo = info->par;
  838. cancel_work_sync(&sinfo->task);
  839. exit_backlight(sinfo);
  840. if (sinfo->atmel_lcdfb_power_control)
  841. sinfo->atmel_lcdfb_power_control(0);
  842. unregister_framebuffer(info);
  843. atmel_lcdfb_stop_clock(sinfo);
  844. clk_put(sinfo->lcdc_clk);
  845. if (sinfo->bus_clk)
  846. clk_put(sinfo->bus_clk);
  847. fb_dealloc_cmap(&info->cmap);
  848. free_irq(sinfo->irq_base, info);
  849. iounmap(sinfo->mmio);
  850. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  851. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  852. iounmap(info->screen_base);
  853. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  854. } else {
  855. atmel_lcdfb_free_video_memory(sinfo);
  856. }
  857. dev_set_drvdata(dev, NULL);
  858. framebuffer_release(info);
  859. return 0;
  860. }
  861. #ifdef CONFIG_PM
  862. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  863. {
  864. struct fb_info *info = platform_get_drvdata(pdev);
  865. struct atmel_lcdfb_info *sinfo = info->par;
  866. /*
  867. * We don't want to handle interrupts while the clock is
  868. * stopped. It may take forever.
  869. */
  870. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  871. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  872. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  873. if (sinfo->atmel_lcdfb_power_control)
  874. sinfo->atmel_lcdfb_power_control(0);
  875. atmel_lcdfb_stop(sinfo);
  876. atmel_lcdfb_stop_clock(sinfo);
  877. return 0;
  878. }
  879. static int atmel_lcdfb_resume(struct platform_device *pdev)
  880. {
  881. struct fb_info *info = platform_get_drvdata(pdev);
  882. struct atmel_lcdfb_info *sinfo = info->par;
  883. atmel_lcdfb_start_clock(sinfo);
  884. atmel_lcdfb_start(sinfo);
  885. if (sinfo->atmel_lcdfb_power_control)
  886. sinfo->atmel_lcdfb_power_control(1);
  887. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  888. /* Enable FIFO & DMA errors */
  889. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
  890. | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  891. return 0;
  892. }
  893. #else
  894. #define atmel_lcdfb_suspend NULL
  895. #define atmel_lcdfb_resume NULL
  896. #endif
  897. static struct platform_driver atmel_lcdfb_driver = {
  898. .remove = __exit_p(atmel_lcdfb_remove),
  899. .suspend = atmel_lcdfb_suspend,
  900. .resume = atmel_lcdfb_resume,
  901. .driver = {
  902. .name = "atmel_lcdfb",
  903. .owner = THIS_MODULE,
  904. },
  905. };
  906. static int __init atmel_lcdfb_init(void)
  907. {
  908. return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
  909. }
  910. static void __exit atmel_lcdfb_exit(void)
  911. {
  912. platform_driver_unregister(&atmel_lcdfb_driver);
  913. }
  914. module_init(atmel_lcdfb_init);
  915. module_exit(atmel_lcdfb_exit);
  916. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  917. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  918. MODULE_LICENSE("GPL");