mach-armadillo5x0.c 14 KB

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  1. /*
  2. * armadillo5x0.c
  3. *
  4. * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  5. * updates in http://alberdroid.blogspot.com/
  6. *
  7. * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
  8. * Based on mx31ads.c and pcm037.c Great Work!
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  23. * MA 02110-1301, USA.
  24. */
  25. #include <linux/types.h>
  26. #include <linux/init.h>
  27. #include <linux/clk.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/gpio.h>
  30. #include <linux/smsc911x.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/irq.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/io.h>
  35. #include <linux/input.h>
  36. #include <linux/i2c.h>
  37. #include <linux/usb/otg.h>
  38. #include <linux/usb/ulpi.h>
  39. #include <linux/delay.h>
  40. #include <mach/hardware.h>
  41. #include <asm/mach-types.h>
  42. #include <asm/mach/arch.h>
  43. #include <asm/mach/time.h>
  44. #include <asm/memory.h>
  45. #include <asm/mach/map.h>
  46. #include <mach/common.h>
  47. #include <mach/iomux-mx3.h>
  48. #include <mach/ipu.h>
  49. #include <mach/mx3fb.h>
  50. #include <mach/ulpi.h>
  51. #include "devices-imx31.h"
  52. #include "devices.h"
  53. #include "crm_regs.h"
  54. static int armadillo5x0_pins[] = {
  55. /* UART1 */
  56. MX31_PIN_CTS1__CTS1,
  57. MX31_PIN_RTS1__RTS1,
  58. MX31_PIN_TXD1__TXD1,
  59. MX31_PIN_RXD1__RXD1,
  60. /* UART2 */
  61. MX31_PIN_CTS2__CTS2,
  62. MX31_PIN_RTS2__RTS2,
  63. MX31_PIN_TXD2__TXD2,
  64. MX31_PIN_RXD2__RXD2,
  65. /* LAN9118_IRQ */
  66. IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
  67. /* SDHC1 */
  68. MX31_PIN_SD1_DATA3__SD1_DATA3,
  69. MX31_PIN_SD1_DATA2__SD1_DATA2,
  70. MX31_PIN_SD1_DATA1__SD1_DATA1,
  71. MX31_PIN_SD1_DATA0__SD1_DATA0,
  72. MX31_PIN_SD1_CLK__SD1_CLK,
  73. MX31_PIN_SD1_CMD__SD1_CMD,
  74. /* Framebuffer */
  75. MX31_PIN_LD0__LD0,
  76. MX31_PIN_LD1__LD1,
  77. MX31_PIN_LD2__LD2,
  78. MX31_PIN_LD3__LD3,
  79. MX31_PIN_LD4__LD4,
  80. MX31_PIN_LD5__LD5,
  81. MX31_PIN_LD6__LD6,
  82. MX31_PIN_LD7__LD7,
  83. MX31_PIN_LD8__LD8,
  84. MX31_PIN_LD9__LD9,
  85. MX31_PIN_LD10__LD10,
  86. MX31_PIN_LD11__LD11,
  87. MX31_PIN_LD12__LD12,
  88. MX31_PIN_LD13__LD13,
  89. MX31_PIN_LD14__LD14,
  90. MX31_PIN_LD15__LD15,
  91. MX31_PIN_LD16__LD16,
  92. MX31_PIN_LD17__LD17,
  93. MX31_PIN_VSYNC3__VSYNC3,
  94. MX31_PIN_HSYNC__HSYNC,
  95. MX31_PIN_FPSHIFT__FPSHIFT,
  96. MX31_PIN_DRDY0__DRDY0,
  97. IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
  98. /* I2C2 */
  99. MX31_PIN_CSPI2_MOSI__SCL,
  100. MX31_PIN_CSPI2_MISO__SDA,
  101. /* OTG */
  102. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  103. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  104. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  105. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  106. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  107. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  108. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  109. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  110. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  111. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  112. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  113. MX31_PIN_USBOTG_STP__USBOTG_STP,
  114. /* USB host 2 */
  115. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  116. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  117. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  118. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  119. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  120. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  121. IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
  122. IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
  123. IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
  124. IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
  125. IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
  126. IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
  127. };
  128. /* USB */
  129. #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
  130. #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
  131. #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
  132. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  133. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  134. static int usbotg_init(struct platform_device *pdev)
  135. {
  136. int err;
  137. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  138. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  139. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  140. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  141. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  142. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  143. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  144. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  145. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  146. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  147. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  148. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  149. /* Chip already enabled by hardware */
  150. /* OTG phy reset*/
  151. err = gpio_request(OTG_RESET, "USB-OTG-RESET");
  152. if (err) {
  153. pr_err("Failed to request the usb otg reset gpio\n");
  154. return err;
  155. }
  156. err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
  157. if (err) {
  158. pr_err("Failed to reset the usb otg phy\n");
  159. goto otg_free_reset;
  160. }
  161. gpio_set_value(OTG_RESET, 0/*LOW*/);
  162. mdelay(5);
  163. gpio_set_value(OTG_RESET, 1/*HIGH*/);
  164. mdelay(10);
  165. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
  166. MXC_EHCI_INTERFACE_DIFF_UNI);
  167. otg_free_reset:
  168. gpio_free(OTG_RESET);
  169. return err;
  170. }
  171. static int usbh2_init(struct platform_device *pdev)
  172. {
  173. int err;
  174. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  175. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  176. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  177. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  178. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  179. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  180. mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
  181. mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
  182. mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
  183. mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
  184. mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
  185. mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
  186. mxc_iomux_set_gpr(MUX_PGP_UH2, true);
  187. /* Enable the chip */
  188. err = gpio_request(USBH2_CS, "USB-H2-CS");
  189. if (err) {
  190. pr_err("Failed to request the usb host 2 CS gpio\n");
  191. return err;
  192. }
  193. err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
  194. if (err) {
  195. pr_err("Failed to drive the usb host 2 CS gpio\n");
  196. goto h2_free_cs;
  197. }
  198. /* H2 phy reset*/
  199. err = gpio_request(USBH2_RESET, "USB-H2-RESET");
  200. if (err) {
  201. pr_err("Failed to request the usb host 2 reset gpio\n");
  202. goto h2_free_cs;
  203. }
  204. err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
  205. if (err) {
  206. pr_err("Failed to reset the usb host 2 phy\n");
  207. goto h2_free_reset;
  208. }
  209. gpio_set_value(USBH2_RESET, 0/*LOW*/);
  210. mdelay(5);
  211. gpio_set_value(USBH2_RESET, 1/*HIGH*/);
  212. mdelay(10);
  213. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
  214. MXC_EHCI_INTERFACE_DIFF_UNI);
  215. h2_free_reset:
  216. gpio_free(USBH2_RESET);
  217. h2_free_cs:
  218. gpio_free(USBH2_CS);
  219. return err;
  220. }
  221. static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
  222. .init = usbotg_init,
  223. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  224. };
  225. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  226. .init = usbh2_init,
  227. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  228. };
  229. /* RTC over I2C*/
  230. #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
  231. static struct i2c_board_info armadillo5x0_i2c_rtc = {
  232. I2C_BOARD_INFO("s35390a", 0x30),
  233. };
  234. /* GPIO BUTTONS */
  235. static struct gpio_keys_button armadillo5x0_buttons[] = {
  236. {
  237. .code = KEY_ENTER, /*28*/
  238. .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
  239. .active_low = 1,
  240. .desc = "menu",
  241. .wakeup = 1,
  242. }, {
  243. .code = KEY_BACK, /*158*/
  244. .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
  245. .active_low = 1,
  246. .desc = "back",
  247. .wakeup = 1,
  248. }
  249. };
  250. static const struct gpio_keys_platform_data
  251. armadillo5x0_button_data __initconst = {
  252. .buttons = armadillo5x0_buttons,
  253. .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
  254. };
  255. /*
  256. * NAND Flash
  257. */
  258. static const struct mxc_nand_platform_data
  259. armadillo5x0_nand_board_info __initconst = {
  260. .width = 1,
  261. .hw_ecc = 1,
  262. };
  263. /*
  264. * MTD NOR Flash
  265. */
  266. static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
  267. {
  268. .name = "nor.bootloader",
  269. .offset = 0x00000000,
  270. .size = 4*32*1024,
  271. }, {
  272. .name = "nor.kernel",
  273. .offset = MTDPART_OFS_APPEND,
  274. .size = 16*128*1024,
  275. }, {
  276. .name = "nor.userland",
  277. .offset = MTDPART_OFS_APPEND,
  278. .size = 110*128*1024,
  279. }, {
  280. .name = "nor.config",
  281. .offset = MTDPART_OFS_APPEND,
  282. .size = 1*128*1024,
  283. },
  284. };
  285. static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
  286. .width = 2,
  287. .parts = armadillo5x0_nor_flash_partitions,
  288. .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
  289. };
  290. static struct resource armadillo5x0_nor_flash_resource = {
  291. .flags = IORESOURCE_MEM,
  292. .start = MX31_CS0_BASE_ADDR,
  293. .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
  294. };
  295. static struct platform_device armadillo5x0_nor_flash = {
  296. .name = "physmap-flash",
  297. .id = -1,
  298. .num_resources = 1,
  299. .resource = &armadillo5x0_nor_flash_resource,
  300. };
  301. /*
  302. * FB support
  303. */
  304. static const struct fb_videomode fb_modedb[] = {
  305. { /* 640x480 @ 60 Hz */
  306. .name = "CRT-VGA",
  307. .refresh = 60,
  308. .xres = 640,
  309. .yres = 480,
  310. .pixclock = 39721,
  311. .left_margin = 35,
  312. .right_margin = 115,
  313. .upper_margin = 43,
  314. .lower_margin = 1,
  315. .hsync_len = 10,
  316. .vsync_len = 1,
  317. .sync = FB_SYNC_OE_ACT_HIGH,
  318. .vmode = FB_VMODE_NONINTERLACED,
  319. .flag = 0,
  320. }, {/* 800x600 @ 56 Hz */
  321. .name = "CRT-SVGA",
  322. .refresh = 56,
  323. .xres = 800,
  324. .yres = 600,
  325. .pixclock = 30000,
  326. .left_margin = 30,
  327. .right_margin = 108,
  328. .upper_margin = 13,
  329. .lower_margin = 10,
  330. .hsync_len = 10,
  331. .vsync_len = 1,
  332. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
  333. FB_SYNC_VERT_HIGH_ACT,
  334. .vmode = FB_VMODE_NONINTERLACED,
  335. .flag = 0,
  336. },
  337. };
  338. static struct ipu_platform_data mx3_ipu_data = {
  339. .irq_base = MXC_IPU_IRQ_START,
  340. };
  341. static struct mx3fb_platform_data mx3fb_pdata = {
  342. .dma_dev = &mx3_ipu.dev,
  343. .name = "CRT-VGA",
  344. .mode = fb_modedb,
  345. .num_modes = ARRAY_SIZE(fb_modedb),
  346. };
  347. /*
  348. * SDHC 1
  349. * MMC support
  350. */
  351. static int armadillo5x0_sdhc1_get_ro(struct device *dev)
  352. {
  353. return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  354. }
  355. static int armadillo5x0_sdhc1_init(struct device *dev,
  356. irq_handler_t detect_irq, void *data)
  357. {
  358. int ret;
  359. int gpio_det, gpio_wp;
  360. gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
  361. gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
  362. ret = gpio_request(gpio_det, "sdhc-card-detect");
  363. if (ret)
  364. return ret;
  365. gpio_direction_input(gpio_det);
  366. ret = gpio_request(gpio_wp, "sdhc-write-protect");
  367. if (ret)
  368. goto err_gpio_free;
  369. gpio_direction_input(gpio_wp);
  370. /* When supported the trigger type have to be BOTH */
  371. ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
  372. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  373. "sdhc-detect", data);
  374. if (ret)
  375. goto err_gpio_free_2;
  376. return 0;
  377. err_gpio_free_2:
  378. gpio_free(gpio_wp);
  379. err_gpio_free:
  380. gpio_free(gpio_det);
  381. return ret;
  382. }
  383. static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
  384. {
  385. free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
  386. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
  387. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  388. }
  389. static const struct imxmmc_platform_data sdhc_pdata __initconst = {
  390. .get_ro = armadillo5x0_sdhc1_get_ro,
  391. .init = armadillo5x0_sdhc1_init,
  392. .exit = armadillo5x0_sdhc1_exit,
  393. };
  394. /*
  395. * SMSC 9118
  396. * Network support
  397. */
  398. static struct resource armadillo5x0_smc911x_resources[] = {
  399. {
  400. .start = MX31_CS3_BASE_ADDR,
  401. .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
  402. .flags = IORESOURCE_MEM,
  403. }, {
  404. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  405. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  406. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  407. },
  408. };
  409. static struct smsc911x_platform_config smsc911x_info = {
  410. .flags = SMSC911X_USE_16BIT,
  411. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  412. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  413. };
  414. static struct platform_device armadillo5x0_smc911x_device = {
  415. .name = "smsc911x",
  416. .id = -1,
  417. .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
  418. .resource = armadillo5x0_smc911x_resources,
  419. .dev = {
  420. .platform_data = &smsc911x_info,
  421. },
  422. };
  423. /* UART device data */
  424. static const struct imxuart_platform_data uart_pdata __initconst = {
  425. .flags = IMXUART_HAVE_RTSCTS,
  426. };
  427. static struct platform_device *devices[] __initdata = {
  428. &armadillo5x0_smc911x_device,
  429. };
  430. /*
  431. * Perform board specific initializations
  432. */
  433. static void __init armadillo5x0_init(void)
  434. {
  435. mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
  436. ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
  437. platform_add_devices(devices, ARRAY_SIZE(devices));
  438. imx_add_gpio_keys(&armadillo5x0_button_data);
  439. imx31_add_imx_i2c1(NULL);
  440. /* Register UART */
  441. imx31_add_imx_uart0(&uart_pdata);
  442. imx31_add_imx_uart1(&uart_pdata);
  443. /* SMSC9118 IRQ pin */
  444. gpio_direction_input(MX31_PIN_GPIO1_0);
  445. /* Register SDHC */
  446. imx31_add_mxc_mmc(0, &sdhc_pdata);
  447. /* Register FB */
  448. mxc_register_device(&mx3_ipu, &mx3_ipu_data);
  449. mxc_register_device(&mx3_fb, &mx3fb_pdata);
  450. /* Register NOR Flash */
  451. mxc_register_device(&armadillo5x0_nor_flash,
  452. &armadillo5x0_nor_flash_pdata);
  453. /* Register NAND Flash */
  454. imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
  455. /* set NAND page size to 2k if not configured via boot mode pins */
  456. __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
  457. /* RTC */
  458. /* Get RTC IRQ and register the chip */
  459. if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
  460. if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
  461. armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
  462. else
  463. gpio_free(ARMADILLO5X0_RTC_GPIO);
  464. }
  465. if (armadillo5x0_i2c_rtc.irq == 0)
  466. pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
  467. i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
  468. /* USB */
  469. usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  470. ULPI_OTG_DRVVBUS_EXT);
  471. if (usbotg_pdata.otg)
  472. imx31_add_mxc_ehci_otg(&usbotg_pdata);
  473. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  474. ULPI_OTG_DRVVBUS_EXT);
  475. if (usbh2_pdata.otg)
  476. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  477. }
  478. static void __init armadillo5x0_timer_init(void)
  479. {
  480. mx31_clocks_init(26000000);
  481. }
  482. static struct sys_timer armadillo5x0_timer = {
  483. .init = armadillo5x0_timer_init,
  484. };
  485. MACHINE_START(ARMADILLO5X0, "Armadillo-500")
  486. /* Maintainer: Alberto Panizzo */
  487. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  488. .map_io = mx31_map_io,
  489. .init_early = imx31_init_early,
  490. .init_irq = mx31_init_irq,
  491. .timer = &armadillo5x0_timer,
  492. .init_machine = armadillo5x0_init,
  493. MACHINE_END