rt2800pci.c 14 KB

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  1. /*
  2. Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
  4. Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
  5. Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
  6. Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
  7. Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
  8. Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
  9. Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
  10. <http://rt2x00.serialmonkey.com>
  11. This program is free software; you can redistribute it and/or modify
  12. it under the terms of the GNU General Public License as published by
  13. the Free Software Foundation; either version 2 of the License, or
  14. (at your option) any later version.
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. GNU General Public License for more details.
  19. You should have received a copy of the GNU General Public License
  20. along with this program; if not, write to the
  21. Free Software Foundation, Inc.,
  22. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23. */
  24. /*
  25. Module: rt2800pci
  26. Abstract: rt2800pci device specific routines.
  27. Supported chipsets: RT2800E & RT2800ED.
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/init.h>
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/pci.h>
  35. #include <linux/eeprom_93cx6.h>
  36. #include "rt2x00.h"
  37. #include "rt2x00mmio.h"
  38. #include "rt2x00pci.h"
  39. #include "rt2800lib.h"
  40. #include "rt2800mmio.h"
  41. #include "rt2800.h"
  42. #include "rt2800pci.h"
  43. /*
  44. * Allow hardware encryption to be disabled.
  45. */
  46. static bool modparam_nohwcrypt = false;
  47. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  48. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  49. static bool rt2800pci_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
  50. {
  51. return modparam_nohwcrypt;
  52. }
  53. static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
  54. {
  55. unsigned int i;
  56. u32 reg;
  57. /*
  58. * SOC devices don't support MCU requests.
  59. */
  60. if (rt2x00_is_soc(rt2x00dev))
  61. return;
  62. for (i = 0; i < 200; i++) {
  63. rt2x00mmio_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
  64. if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
  65. (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
  66. (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD2) == token) ||
  67. (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD3) == token))
  68. break;
  69. udelay(REGISTER_BUSY_DELAY);
  70. }
  71. if (i == 200)
  72. rt2x00_err(rt2x00dev, "MCU request failed, no response from hardware\n");
  73. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
  74. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
  75. }
  76. static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
  77. {
  78. struct rt2x00_dev *rt2x00dev = eeprom->data;
  79. u32 reg;
  80. rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR, &reg);
  81. eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
  82. eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
  83. eeprom->reg_data_clock =
  84. !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK);
  85. eeprom->reg_chip_select =
  86. !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT);
  87. }
  88. static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
  89. {
  90. struct rt2x00_dev *rt2x00dev = eeprom->data;
  91. u32 reg = 0;
  92. rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
  93. rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
  94. rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK,
  95. !!eeprom->reg_data_clock);
  96. rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
  97. !!eeprom->reg_chip_select);
  98. rt2x00mmio_register_write(rt2x00dev, E2PROM_CSR, reg);
  99. }
  100. static int rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
  101. {
  102. struct eeprom_93cx6 eeprom;
  103. u32 reg;
  104. rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR, &reg);
  105. eeprom.data = rt2x00dev;
  106. eeprom.register_read = rt2800pci_eepromregister_read;
  107. eeprom.register_write = rt2800pci_eepromregister_write;
  108. switch (rt2x00_get_field32(reg, E2PROM_CSR_TYPE))
  109. {
  110. case 0:
  111. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  112. break;
  113. case 1:
  114. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  115. break;
  116. default:
  117. eeprom.width = PCI_EEPROM_WIDTH_93C86;
  118. break;
  119. }
  120. eeprom.reg_data_in = 0;
  121. eeprom.reg_data_out = 0;
  122. eeprom.reg_data_clock = 0;
  123. eeprom.reg_chip_select = 0;
  124. eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom,
  125. EEPROM_SIZE / sizeof(u16));
  126. return 0;
  127. }
  128. static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
  129. {
  130. return rt2800_efuse_detect(rt2x00dev);
  131. }
  132. static inline int rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
  133. {
  134. return rt2800_read_eeprom_efuse(rt2x00dev);
  135. }
  136. /*
  137. * Firmware functions
  138. */
  139. static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
  140. {
  141. /*
  142. * Chip rt3290 use specific 4KB firmware named rt3290.bin.
  143. */
  144. if (rt2x00_rt(rt2x00dev, RT3290))
  145. return FIRMWARE_RT3290;
  146. else
  147. return FIRMWARE_RT2860;
  148. }
  149. static int rt2800pci_write_firmware(struct rt2x00_dev *rt2x00dev,
  150. const u8 *data, const size_t len)
  151. {
  152. u32 reg;
  153. /*
  154. * enable Host program ram write selection
  155. */
  156. reg = 0;
  157. rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
  158. rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
  159. /*
  160. * Write firmware to device.
  161. */
  162. rt2x00mmio_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
  163. data, len);
  164. rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
  165. rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
  166. rt2x00mmio_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
  167. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
  168. return 0;
  169. }
  170. /*
  171. * Device state switch handlers.
  172. */
  173. static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
  174. {
  175. int retval;
  176. retval = rt2800mmio_enable_radio(rt2x00dev);
  177. if (retval)
  178. return retval;
  179. /* After resume MCU_BOOT_SIGNAL will trash these. */
  180. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
  181. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
  182. rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_RADIO_OFF, 0xff, 0x02);
  183. rt2800pci_mcu_status(rt2x00dev, TOKEN_RADIO_OFF);
  184. rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP, 0, 0);
  185. rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
  186. return retval;
  187. }
  188. static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
  189. enum dev_state state)
  190. {
  191. if (state == STATE_AWAKE) {
  192. rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP,
  193. 0, 0x02);
  194. rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
  195. } else if (state == STATE_SLEEP) {
  196. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS,
  197. 0xffffffff);
  198. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID,
  199. 0xffffffff);
  200. rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_SLEEP,
  201. 0xff, 0x01);
  202. }
  203. return 0;
  204. }
  205. static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
  206. enum dev_state state)
  207. {
  208. int retval = 0;
  209. switch (state) {
  210. case STATE_RADIO_ON:
  211. retval = rt2800pci_enable_radio(rt2x00dev);
  212. break;
  213. case STATE_RADIO_OFF:
  214. /*
  215. * After the radio has been disabled, the device should
  216. * be put to sleep for powersaving.
  217. */
  218. rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
  219. break;
  220. case STATE_RADIO_IRQ_ON:
  221. case STATE_RADIO_IRQ_OFF:
  222. rt2800mmio_toggle_irq(rt2x00dev, state);
  223. break;
  224. case STATE_DEEP_SLEEP:
  225. case STATE_SLEEP:
  226. case STATE_STANDBY:
  227. case STATE_AWAKE:
  228. retval = rt2800pci_set_state(rt2x00dev, state);
  229. break;
  230. default:
  231. retval = -ENOTSUPP;
  232. break;
  233. }
  234. if (unlikely(retval))
  235. rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
  236. state, retval);
  237. return retval;
  238. }
  239. /*
  240. * Device probe functions.
  241. */
  242. static int rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev)
  243. {
  244. int retval;
  245. if (rt2800pci_efuse_detect(rt2x00dev))
  246. retval = rt2800pci_read_eeprom_efuse(rt2x00dev);
  247. else
  248. retval = rt2800pci_read_eeprom_pci(rt2x00dev);
  249. return retval;
  250. }
  251. static const struct ieee80211_ops rt2800pci_mac80211_ops = {
  252. .tx = rt2x00mac_tx,
  253. .start = rt2x00mac_start,
  254. .stop = rt2x00mac_stop,
  255. .add_interface = rt2x00mac_add_interface,
  256. .remove_interface = rt2x00mac_remove_interface,
  257. .config = rt2x00mac_config,
  258. .configure_filter = rt2x00mac_configure_filter,
  259. .set_key = rt2x00mac_set_key,
  260. .sw_scan_start = rt2x00mac_sw_scan_start,
  261. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  262. .get_stats = rt2x00mac_get_stats,
  263. .get_tkip_seq = rt2800_get_tkip_seq,
  264. .set_rts_threshold = rt2800_set_rts_threshold,
  265. .sta_add = rt2x00mac_sta_add,
  266. .sta_remove = rt2x00mac_sta_remove,
  267. .bss_info_changed = rt2x00mac_bss_info_changed,
  268. .conf_tx = rt2800_conf_tx,
  269. .get_tsf = rt2800_get_tsf,
  270. .rfkill_poll = rt2x00mac_rfkill_poll,
  271. .ampdu_action = rt2800_ampdu_action,
  272. .flush = rt2x00mac_flush,
  273. .get_survey = rt2800_get_survey,
  274. .get_ringparam = rt2x00mac_get_ringparam,
  275. .tx_frames_pending = rt2x00mac_tx_frames_pending,
  276. };
  277. static const struct rt2800_ops rt2800pci_rt2800_ops = {
  278. .register_read = rt2x00mmio_register_read,
  279. .register_read_lock = rt2x00mmio_register_read, /* same for PCI */
  280. .register_write = rt2x00mmio_register_write,
  281. .register_write_lock = rt2x00mmio_register_write, /* same for PCI */
  282. .register_multiread = rt2x00mmio_register_multiread,
  283. .register_multiwrite = rt2x00mmio_register_multiwrite,
  284. .regbusy_read = rt2x00mmio_regbusy_read,
  285. .read_eeprom = rt2800pci_read_eeprom,
  286. .hwcrypt_disabled = rt2800pci_hwcrypt_disabled,
  287. .drv_write_firmware = rt2800pci_write_firmware,
  288. .drv_init_registers = rt2800mmio_init_registers,
  289. .drv_get_txwi = rt2800mmio_get_txwi,
  290. };
  291. static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
  292. .irq_handler = rt2800mmio_interrupt,
  293. .txstatus_tasklet = rt2800mmio_txstatus_tasklet,
  294. .pretbtt_tasklet = rt2800mmio_pretbtt_tasklet,
  295. .tbtt_tasklet = rt2800mmio_tbtt_tasklet,
  296. .rxdone_tasklet = rt2800mmio_rxdone_tasklet,
  297. .autowake_tasklet = rt2800mmio_autowake_tasklet,
  298. .probe_hw = rt2800_probe_hw,
  299. .get_firmware_name = rt2800pci_get_firmware_name,
  300. .check_firmware = rt2800_check_firmware,
  301. .load_firmware = rt2800_load_firmware,
  302. .initialize = rt2x00mmio_initialize,
  303. .uninitialize = rt2x00mmio_uninitialize,
  304. .get_entry_state = rt2800mmio_get_entry_state,
  305. .clear_entry = rt2800mmio_clear_entry,
  306. .set_device_state = rt2800pci_set_device_state,
  307. .rfkill_poll = rt2800_rfkill_poll,
  308. .link_stats = rt2800_link_stats,
  309. .reset_tuner = rt2800_reset_tuner,
  310. .link_tuner = rt2800_link_tuner,
  311. .gain_calibration = rt2800_gain_calibration,
  312. .vco_calibration = rt2800_vco_calibration,
  313. .start_queue = rt2800mmio_start_queue,
  314. .kick_queue = rt2800mmio_kick_queue,
  315. .stop_queue = rt2800mmio_stop_queue,
  316. .flush_queue = rt2x00mmio_flush_queue,
  317. .write_tx_desc = rt2800mmio_write_tx_desc,
  318. .write_tx_data = rt2800_write_tx_data,
  319. .write_beacon = rt2800_write_beacon,
  320. .clear_beacon = rt2800_clear_beacon,
  321. .fill_rxdone = rt2800mmio_fill_rxdone,
  322. .config_shared_key = rt2800_config_shared_key,
  323. .config_pairwise_key = rt2800_config_pairwise_key,
  324. .config_filter = rt2800_config_filter,
  325. .config_intf = rt2800_config_intf,
  326. .config_erp = rt2800_config_erp,
  327. .config_ant = rt2800_config_ant,
  328. .config = rt2800_config,
  329. .sta_add = rt2800_sta_add,
  330. .sta_remove = rt2800_sta_remove,
  331. };
  332. static const struct rt2x00_ops rt2800pci_ops = {
  333. .name = KBUILD_MODNAME,
  334. .drv_data_size = sizeof(struct rt2800_drv_data),
  335. .max_ap_intf = 8,
  336. .eeprom_size = EEPROM_SIZE,
  337. .rf_size = RF_SIZE,
  338. .tx_queues = NUM_TX_QUEUES,
  339. .queue_init = rt2800mmio_queue_init,
  340. .lib = &rt2800pci_rt2x00_ops,
  341. .drv = &rt2800pci_rt2800_ops,
  342. .hw = &rt2800pci_mac80211_ops,
  343. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  344. .debugfs = &rt2800_rt2x00debug,
  345. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  346. };
  347. /*
  348. * RT2800pci module information.
  349. */
  350. static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
  351. { PCI_DEVICE(0x1814, 0x0601) },
  352. { PCI_DEVICE(0x1814, 0x0681) },
  353. { PCI_DEVICE(0x1814, 0x0701) },
  354. { PCI_DEVICE(0x1814, 0x0781) },
  355. { PCI_DEVICE(0x1814, 0x3090) },
  356. { PCI_DEVICE(0x1814, 0x3091) },
  357. { PCI_DEVICE(0x1814, 0x3092) },
  358. { PCI_DEVICE(0x1432, 0x7708) },
  359. { PCI_DEVICE(0x1432, 0x7727) },
  360. { PCI_DEVICE(0x1432, 0x7728) },
  361. { PCI_DEVICE(0x1432, 0x7738) },
  362. { PCI_DEVICE(0x1432, 0x7748) },
  363. { PCI_DEVICE(0x1432, 0x7758) },
  364. { PCI_DEVICE(0x1432, 0x7768) },
  365. { PCI_DEVICE(0x1462, 0x891a) },
  366. { PCI_DEVICE(0x1a3b, 0x1059) },
  367. #ifdef CONFIG_RT2800PCI_RT3290
  368. { PCI_DEVICE(0x1814, 0x3290) },
  369. #endif
  370. #ifdef CONFIG_RT2800PCI_RT33XX
  371. { PCI_DEVICE(0x1814, 0x3390) },
  372. #endif
  373. #ifdef CONFIG_RT2800PCI_RT35XX
  374. { PCI_DEVICE(0x1432, 0x7711) },
  375. { PCI_DEVICE(0x1432, 0x7722) },
  376. { PCI_DEVICE(0x1814, 0x3060) },
  377. { PCI_DEVICE(0x1814, 0x3062) },
  378. { PCI_DEVICE(0x1814, 0x3562) },
  379. { PCI_DEVICE(0x1814, 0x3592) },
  380. { PCI_DEVICE(0x1814, 0x3593) },
  381. { PCI_DEVICE(0x1814, 0x359f) },
  382. #endif
  383. #ifdef CONFIG_RT2800PCI_RT53XX
  384. { PCI_DEVICE(0x1814, 0x5360) },
  385. { PCI_DEVICE(0x1814, 0x5362) },
  386. { PCI_DEVICE(0x1814, 0x5390) },
  387. { PCI_DEVICE(0x1814, 0x5392) },
  388. { PCI_DEVICE(0x1814, 0x539a) },
  389. { PCI_DEVICE(0x1814, 0x539b) },
  390. { PCI_DEVICE(0x1814, 0x539f) },
  391. #endif
  392. { 0, }
  393. };
  394. MODULE_AUTHOR(DRV_PROJECT);
  395. MODULE_VERSION(DRV_VERSION);
  396. MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
  397. MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards");
  398. MODULE_FIRMWARE(FIRMWARE_RT2860);
  399. MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
  400. MODULE_LICENSE("GPL");
  401. static int rt2800pci_probe(struct pci_dev *pci_dev,
  402. const struct pci_device_id *id)
  403. {
  404. return rt2x00pci_probe(pci_dev, &rt2800pci_ops);
  405. }
  406. static struct pci_driver rt2800pci_driver = {
  407. .name = KBUILD_MODNAME,
  408. .id_table = rt2800pci_device_table,
  409. .probe = rt2800pci_probe,
  410. .remove = rt2x00pci_remove,
  411. .suspend = rt2x00pci_suspend,
  412. .resume = rt2x00pci_resume,
  413. };
  414. module_pci_driver(rt2800pci_driver);