rt2800mmio.h 5.2 KB

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  1. /* Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  2. * Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
  3. * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
  4. * Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
  5. * Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
  6. * Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
  7. * Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
  8. * Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
  9. * <http://rt2x00.serialmonkey.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the
  23. * Free Software Foundation, Inc.,
  24. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  25. */
  26. /* Module: rt2800mmio
  27. * Abstract: forward declarations for the rt2800mmio module.
  28. */
  29. #ifndef RT2800MMIO_H
  30. #define RT2800MMIO_H
  31. /*
  32. * Queue register offset macros
  33. */
  34. #define TX_QUEUE_REG_OFFSET 0x10
  35. #define TX_BASE_PTR(__x) (TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET))
  36. #define TX_MAX_CNT(__x) (TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET))
  37. #define TX_CTX_IDX(__x) (TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))
  38. #define TX_DTX_IDX(__x) (TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))
  39. /*
  40. * DMA descriptor defines.
  41. */
  42. #define TXD_DESC_SIZE (4 * sizeof(__le32))
  43. #define RXD_DESC_SIZE (4 * sizeof(__le32))
  44. /*
  45. * TX descriptor format for TX, PRIO and Beacon Ring.
  46. */
  47. /*
  48. * Word0
  49. */
  50. #define TXD_W0_SD_PTR0 FIELD32(0xffffffff)
  51. /*
  52. * Word1
  53. */
  54. #define TXD_W1_SD_LEN1 FIELD32(0x00003fff)
  55. #define TXD_W1_LAST_SEC1 FIELD32(0x00004000)
  56. #define TXD_W1_BURST FIELD32(0x00008000)
  57. #define TXD_W1_SD_LEN0 FIELD32(0x3fff0000)
  58. #define TXD_W1_LAST_SEC0 FIELD32(0x40000000)
  59. #define TXD_W1_DMA_DONE FIELD32(0x80000000)
  60. /*
  61. * Word2
  62. */
  63. #define TXD_W2_SD_PTR1 FIELD32(0xffffffff)
  64. /*
  65. * Word3
  66. * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
  67. * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
  68. * 0:MGMT, 1:HCCA 2:EDCA
  69. */
  70. #define TXD_W3_WIV FIELD32(0x01000000)
  71. #define TXD_W3_QSEL FIELD32(0x06000000)
  72. #define TXD_W3_TCO FIELD32(0x20000000)
  73. #define TXD_W3_UCO FIELD32(0x40000000)
  74. #define TXD_W3_ICO FIELD32(0x80000000)
  75. /*
  76. * RX descriptor format for RX Ring.
  77. */
  78. /*
  79. * Word0
  80. */
  81. #define RXD_W0_SDP0 FIELD32(0xffffffff)
  82. /*
  83. * Word1
  84. */
  85. #define RXD_W1_SDL1 FIELD32(0x00003fff)
  86. #define RXD_W1_SDL0 FIELD32(0x3fff0000)
  87. #define RXD_W1_LS0 FIELD32(0x40000000)
  88. #define RXD_W1_DMA_DONE FIELD32(0x80000000)
  89. /*
  90. * Word2
  91. */
  92. #define RXD_W2_SDP1 FIELD32(0xffffffff)
  93. /*
  94. * Word3
  95. * AMSDU: RX with 802.3 header, not 802.11 header.
  96. * DECRYPTED: This frame is being decrypted.
  97. */
  98. #define RXD_W3_BA FIELD32(0x00000001)
  99. #define RXD_W3_DATA FIELD32(0x00000002)
  100. #define RXD_W3_NULLDATA FIELD32(0x00000004)
  101. #define RXD_W3_FRAG FIELD32(0x00000008)
  102. #define RXD_W3_UNICAST_TO_ME FIELD32(0x00000010)
  103. #define RXD_W3_MULTICAST FIELD32(0x00000020)
  104. #define RXD_W3_BROADCAST FIELD32(0x00000040)
  105. #define RXD_W3_MY_BSS FIELD32(0x00000080)
  106. #define RXD_W3_CRC_ERROR FIELD32(0x00000100)
  107. #define RXD_W3_CIPHER_ERROR FIELD32(0x00000600)
  108. #define RXD_W3_AMSDU FIELD32(0x00000800)
  109. #define RXD_W3_HTC FIELD32(0x00001000)
  110. #define RXD_W3_RSSI FIELD32(0x00002000)
  111. #define RXD_W3_L2PAD FIELD32(0x00004000)
  112. #define RXD_W3_AMPDU FIELD32(0x00008000)
  113. #define RXD_W3_DECRYPTED FIELD32(0x00010000)
  114. #define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000)
  115. #define RXD_W3_PLCP_RSSI FIELD32(0x00040000)
  116. /* TX descriptor initialization */
  117. __le32 *rt2800mmio_get_txwi(struct queue_entry *entry);
  118. void rt2800mmio_write_tx_desc(struct queue_entry *entry,
  119. struct txentry_desc *txdesc);
  120. /* RX control handlers */
  121. void rt2800mmio_fill_rxdone(struct queue_entry *entry,
  122. struct rxdone_entry_desc *rxdesc);
  123. /* Interrupt functions */
  124. void rt2800mmio_txstatus_tasklet(unsigned long data);
  125. void rt2800mmio_pretbtt_tasklet(unsigned long data);
  126. void rt2800mmio_tbtt_tasklet(unsigned long data);
  127. void rt2800mmio_rxdone_tasklet(unsigned long data);
  128. void rt2800mmio_autowake_tasklet(unsigned long data);
  129. irqreturn_t rt2800mmio_interrupt(int irq, void *dev_instance);
  130. void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev,
  131. enum dev_state state);
  132. /* Queue handlers */
  133. void rt2800mmio_start_queue(struct data_queue *queue);
  134. void rt2800mmio_kick_queue(struct data_queue *queue);
  135. void rt2800mmio_stop_queue(struct data_queue *queue);
  136. void rt2800mmio_queue_init(struct data_queue *queue);
  137. /* Initialization functions */
  138. bool rt2800mmio_get_entry_state(struct queue_entry *entry);
  139. void rt2800mmio_clear_entry(struct queue_entry *entry);
  140. int rt2800mmio_init_queues(struct rt2x00_dev *rt2x00dev);
  141. int rt2800mmio_init_registers(struct rt2x00_dev *rt2x00dev);
  142. /* Device state switch handlers. */
  143. int rt2800mmio_enable_radio(struct rt2x00_dev *rt2x00dev);
  144. #endif /* RT2800MMIO_H */