pmac_setup.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476
  1. /*
  2. * arch/ppc/platforms/setup.c
  3. *
  4. * PowerPC version
  5. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  6. *
  7. * Adapted for Power Macintosh by Paul Mackerras
  8. * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
  9. *
  10. * Derived from "arch/alpha/kernel/setup.c"
  11. * Copyright (C) 1995 Linus Torvalds
  12. *
  13. * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. *
  20. */
  21. /*
  22. * bootup setup stuff..
  23. */
  24. #undef DEBUG
  25. #include <linux/config.h>
  26. #include <linux/init.h>
  27. #include <linux/errno.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/mm.h>
  31. #include <linux/stddef.h>
  32. #include <linux/unistd.h>
  33. #include <linux/ptrace.h>
  34. #include <linux/slab.h>
  35. #include <linux/user.h>
  36. #include <linux/a.out.h>
  37. #include <linux/tty.h>
  38. #include <linux/string.h>
  39. #include <linux/delay.h>
  40. #include <linux/ioport.h>
  41. #include <linux/major.h>
  42. #include <linux/initrd.h>
  43. #include <linux/vt_kern.h>
  44. #include <linux/console.h>
  45. #include <linux/ide.h>
  46. #include <linux/pci.h>
  47. #include <linux/adb.h>
  48. #include <linux/cuda.h>
  49. #include <linux/pmu.h>
  50. #include <linux/irq.h>
  51. #include <linux/seq_file.h>
  52. #include <linux/root_dev.h>
  53. #include <linux/bitops.h>
  54. #include <asm/processor.h>
  55. #include <asm/sections.h>
  56. #include <asm/prom.h>
  57. #include <asm/system.h>
  58. #include <asm/io.h>
  59. #include <asm/pci-bridge.h>
  60. #include <asm/iommu.h>
  61. #include <asm/machdep.h>
  62. #include <asm/dma.h>
  63. #include <asm/btext.h>
  64. #include <asm/cputable.h>
  65. #include <asm/pmac_feature.h>
  66. #include <asm/time.h>
  67. #include <asm/of_device.h>
  68. #include <asm/lmb.h>
  69. #include <asm/smu.h>
  70. #include <asm/pmc.h>
  71. #include <asm/mpic.h>
  72. #include <asm/udbg.h>
  73. #include "pmac.h"
  74. #ifdef DEBUG
  75. #define DBG(fmt...) udbg_printf(fmt)
  76. #else
  77. #define DBG(fmt...)
  78. #endif
  79. static int current_root_goodness = -1;
  80. #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
  81. extern int powersave_nap;
  82. int sccdbg;
  83. sys_ctrler_t sys_ctrler;
  84. EXPORT_SYMBOL(sys_ctrler);
  85. #ifdef CONFIG_PMAC_SMU
  86. unsigned long smu_cmdbuf_abs;
  87. EXPORT_SYMBOL(smu_cmdbuf_abs);
  88. #endif
  89. extern void udbg_init_scc(struct device_node *np);
  90. static void pmac_show_cpuinfo(struct seq_file *m)
  91. {
  92. struct device_node *np;
  93. char *pp;
  94. int plen;
  95. char* mbname;
  96. int mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
  97. PMAC_MB_INFO_MODEL, 0);
  98. unsigned int mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
  99. PMAC_MB_INFO_FLAGS, 0);
  100. if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
  101. (long)&mbname) != 0)
  102. mbname = "Unknown";
  103. /* find motherboard type */
  104. seq_printf(m, "machine\t\t: ");
  105. np = find_devices("device-tree");
  106. if (np != NULL) {
  107. pp = (char *) get_property(np, "model", NULL);
  108. if (pp != NULL)
  109. seq_printf(m, "%s\n", pp);
  110. else
  111. seq_printf(m, "PowerMac\n");
  112. pp = (char *) get_property(np, "compatible", &plen);
  113. if (pp != NULL) {
  114. seq_printf(m, "motherboard\t:");
  115. while (plen > 0) {
  116. int l = strlen(pp) + 1;
  117. seq_printf(m, " %s", pp);
  118. plen -= l;
  119. pp += l;
  120. }
  121. seq_printf(m, "\n");
  122. }
  123. } else
  124. seq_printf(m, "PowerMac\n");
  125. /* print parsed model */
  126. seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
  127. seq_printf(m, "pmac flags\t: %08x\n", mbflags);
  128. /* Indicate newworld */
  129. seq_printf(m, "pmac-generation\t: NewWorld\n");
  130. }
  131. static void __init pmac_setup_arch(void)
  132. {
  133. /* init to some ~sane value until calibrate_delay() runs */
  134. loops_per_jiffy = 50000000;
  135. /* Probe motherboard chipset */
  136. pmac_feature_init();
  137. #if 0
  138. /* Lock-enable the SCC channel used for debug */
  139. if (sccdbg) {
  140. np = of_find_node_by_name(NULL, "escc");
  141. if (np)
  142. pmac_call_feature(PMAC_FTR_SCC_ENABLE, np,
  143. PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
  144. }
  145. #endif
  146. /* We can NAP */
  147. powersave_nap = 1;
  148. #ifdef CONFIG_ADB_PMU
  149. /* Initialize the PMU if any */
  150. find_via_pmu();
  151. #endif
  152. #ifdef CONFIG_PMAC_SMU
  153. /* Initialize the SMU if any */
  154. smu_init();
  155. #endif
  156. /* Init NVRAM access */
  157. pmac_nvram_init();
  158. /* Setup SMP callback */
  159. #ifdef CONFIG_SMP
  160. pmac_setup_smp();
  161. #endif
  162. /* Lookup PCI hosts */
  163. pmac_pci_init();
  164. #ifdef CONFIG_DUMMY_CONSOLE
  165. conswitchp = &dummy_con;
  166. #endif
  167. printk(KERN_INFO "Using native/NAP idle loop\n");
  168. }
  169. #ifdef CONFIG_SCSI
  170. void note_scsi_host(struct device_node *node, void *host)
  171. {
  172. /* Obsolete */
  173. }
  174. #endif
  175. static int initializing = 1;
  176. static int pmac_late_init(void)
  177. {
  178. initializing = 0;
  179. return 0;
  180. }
  181. late_initcall(pmac_late_init);
  182. /* can't be __init - can be called whenever a disk is first accessed */
  183. void note_bootable_part(dev_t dev, int part, int goodness)
  184. {
  185. extern dev_t boot_dev;
  186. char *p;
  187. if (!initializing)
  188. return;
  189. if ((goodness <= current_root_goodness) &&
  190. ROOT_DEV != DEFAULT_ROOT_DEVICE)
  191. return;
  192. p = strstr(saved_command_line, "root=");
  193. if (p != NULL && (p == saved_command_line || p[-1] == ' '))
  194. return;
  195. if (!boot_dev || dev == boot_dev) {
  196. ROOT_DEV = dev + part;
  197. boot_dev = 0;
  198. current_root_goodness = goodness;
  199. }
  200. }
  201. static void pmac_restart(char *cmd)
  202. {
  203. switch(sys_ctrler) {
  204. #ifdef CONFIG_ADB_PMU
  205. case SYS_CTRLER_PMU:
  206. pmu_restart();
  207. break;
  208. #endif
  209. #ifdef CONFIG_PMAC_SMU
  210. case SYS_CTRLER_SMU:
  211. smu_restart();
  212. break;
  213. #endif
  214. default:
  215. ;
  216. }
  217. }
  218. static void pmac_power_off(void)
  219. {
  220. switch(sys_ctrler) {
  221. #ifdef CONFIG_ADB_PMU
  222. case SYS_CTRLER_PMU:
  223. pmu_shutdown();
  224. break;
  225. #endif
  226. #ifdef CONFIG_PMAC_SMU
  227. case SYS_CTRLER_SMU:
  228. smu_shutdown();
  229. break;
  230. #endif
  231. default:
  232. ;
  233. }
  234. }
  235. static void pmac_halt(void)
  236. {
  237. pmac_power_off();
  238. }
  239. /*
  240. * Early initialization.
  241. */
  242. static void __init pmac_init_early(void)
  243. {
  244. DBG(" -> pmac_init_early\n");
  245. /* Initialize hash table, from now on, we can take hash faults
  246. * and call ioremap
  247. */
  248. hpte_init_native();
  249. /* Init SCC */
  250. if (strstr(cmd_line, "sccdbg")) {
  251. sccdbg = 1;
  252. udbg_init_scc(NULL);
  253. }
  254. /* Setup interrupt mapping options */
  255. ppc64_interrupt_controller = IC_OPEN_PIC;
  256. iommu_init_early_u3();
  257. DBG(" <- pmac_init_early\n");
  258. }
  259. static int pmac_u3_cascade(struct pt_regs *regs, void *data)
  260. {
  261. return mpic_get_one_irq((struct mpic *)data, regs);
  262. }
  263. static __init void pmac_init_IRQ(void)
  264. {
  265. struct device_node *irqctrler = NULL;
  266. struct device_node *irqctrler2 = NULL;
  267. struct device_node *np = NULL;
  268. struct mpic *mpic1, *mpic2;
  269. /* We first try to detect Apple's new Core99 chipset, since mac-io
  270. * is quite different on those machines and contains an IBM MPIC2.
  271. */
  272. while ((np = of_find_node_by_type(np, "open-pic")) != NULL) {
  273. struct device_node *parent = of_get_parent(np);
  274. if (parent && !strcmp(parent->name, "u3"))
  275. irqctrler2 = of_node_get(np);
  276. else
  277. irqctrler = of_node_get(np);
  278. of_node_put(parent);
  279. }
  280. if (irqctrler != NULL && irqctrler->n_addrs > 0) {
  281. unsigned char senses[128];
  282. printk(KERN_INFO "PowerMac using OpenPIC irq controller at 0x%08x\n",
  283. (unsigned int)irqctrler->addrs[0].address);
  284. prom_get_irq_senses(senses, 0, 128);
  285. mpic1 = mpic_alloc(irqctrler->addrs[0].address,
  286. MPIC_PRIMARY | MPIC_WANTS_RESET,
  287. 0, 0, 128, 256, senses, 128, " K2-MPIC ");
  288. BUG_ON(mpic1 == NULL);
  289. mpic_init(mpic1);
  290. if (irqctrler2 != NULL && irqctrler2->n_intrs > 0 &&
  291. irqctrler2->n_addrs > 0) {
  292. printk(KERN_INFO "Slave OpenPIC at 0x%08x hooked on IRQ %d\n",
  293. (u32)irqctrler2->addrs[0].address,
  294. irqctrler2->intrs[0].line);
  295. pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0);
  296. prom_get_irq_senses(senses, 128, 128 + 128);
  297. /* We don't need to set MPIC_BROKEN_U3 here since we don't have
  298. * hypertransport interrupts routed to it
  299. */
  300. mpic2 = mpic_alloc(irqctrler2->addrs[0].address,
  301. MPIC_BIG_ENDIAN | MPIC_WANTS_RESET,
  302. 0, 128, 128, 0, senses, 128, " U3-MPIC ");
  303. BUG_ON(mpic2 == NULL);
  304. mpic_init(mpic2);
  305. mpic_setup_cascade(irqctrler2->intrs[0].line,
  306. pmac_u3_cascade, mpic2);
  307. }
  308. }
  309. of_node_put(irqctrler);
  310. of_node_put(irqctrler2);
  311. }
  312. static void __init pmac_progress(char *s, unsigned short hex)
  313. {
  314. if (sccdbg) {
  315. udbg_puts(s);
  316. udbg_puts("\n");
  317. }
  318. #ifdef CONFIG_BOOTX_TEXT
  319. else if (boot_text_mapped) {
  320. btext_drawstring(s);
  321. btext_drawstring("\n");
  322. }
  323. #endif /* CONFIG_BOOTX_TEXT */
  324. }
  325. /*
  326. * pmac has no legacy IO, anything calling this function has to
  327. * fail or bad things will happen
  328. */
  329. static int pmac_check_legacy_ioport(unsigned int baseport)
  330. {
  331. return -ENODEV;
  332. }
  333. static int __init pmac_declare_of_platform_devices(void)
  334. {
  335. struct device_node *np, *npp;
  336. npp = of_find_node_by_name(NULL, "u3");
  337. if (npp) {
  338. for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
  339. if (strncmp(np->name, "i2c", 3) == 0) {
  340. of_platform_device_create(np, "u3-i2c", NULL);
  341. of_node_put(np);
  342. break;
  343. }
  344. }
  345. of_node_put(npp);
  346. }
  347. npp = of_find_node_by_type(NULL, "smu");
  348. if (npp) {
  349. of_platform_device_create(npp, "smu", NULL);
  350. of_node_put(npp);
  351. }
  352. return 0;
  353. }
  354. device_initcall(pmac_declare_of_platform_devices);
  355. /*
  356. * Called very early, MMU is off, device-tree isn't unflattened
  357. */
  358. static int __init pmac_probe(int platform)
  359. {
  360. if (platform != PLATFORM_POWERMAC)
  361. return 0;
  362. /*
  363. * On U3, the DART (iommu) must be allocated now since it
  364. * has an impact on htab_initialize (due to the large page it
  365. * occupies having to be broken up so the DART itself is not
  366. * part of the cacheable linar mapping
  367. */
  368. alloc_u3_dart_table();
  369. #ifdef CONFIG_PMAC_SMU
  370. /*
  371. * SMU based G5s need some memory below 2Gb, at least the current
  372. * driver needs that. We have to allocate it now. We allocate 4k
  373. * (1 small page) for now.
  374. */
  375. smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
  376. #endif /* CONFIG_PMAC_SMU */
  377. return 1;
  378. }
  379. static int pmac_probe_mode(struct pci_bus *bus)
  380. {
  381. struct device_node *node = bus->sysdata;
  382. /* We need to use normal PCI probing for the AGP bus,
  383. since the device for the AGP bridge isn't in the tree. */
  384. if (bus->self == NULL && device_is_compatible(node, "u3-agp"))
  385. return PCI_PROBE_NORMAL;
  386. return PCI_PROBE_DEVTREE;
  387. }
  388. struct machdep_calls __initdata pmac_md = {
  389. #ifdef CONFIG_HOTPLUG_CPU
  390. .cpu_die = generic_mach_cpu_die,
  391. #endif
  392. .probe = pmac_probe,
  393. .setup_arch = pmac_setup_arch,
  394. .init_early = pmac_init_early,
  395. .show_cpuinfo = pmac_show_cpuinfo,
  396. .init_IRQ = pmac_init_IRQ,
  397. .get_irq = mpic_get_irq,
  398. .pcibios_fixup = pmac_pcibios_fixup,
  399. .pci_probe_mode = pmac_probe_mode,
  400. .restart = pmac_restart,
  401. .power_off = pmac_power_off,
  402. .halt = pmac_halt,
  403. .get_boot_time = pmac_get_boot_time,
  404. .set_rtc_time = pmac_set_rtc_time,
  405. .get_rtc_time = pmac_get_rtc_time,
  406. .calibrate_decr = pmac_calibrate_decr,
  407. .feature_call = pmac_do_feature_call,
  408. .progress = pmac_progress,
  409. .check_legacy_ioport = pmac_check_legacy_ioport,
  410. .idle_loop = native_idle,
  411. .enable_pmcs = power4_enable_pmcs,
  412. };