io.c 8.1 KB

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  1. /*
  2. * linux/arch/sh/kernel/io_r7780rp.c
  3. *
  4. * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
  5. * Based largely on io_se.c.
  6. *
  7. * I/O routine for Renesas Solutions Highlander R7780RP-1
  8. *
  9. * Initial version only to support LAN access; some
  10. * placeholder code from io_r7780rp.c left in with the
  11. * expectation of later SuperIO and PCMCIA access.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <asm/r7780rp/r7780rp.h>
  16. #include <asm/addrspace.h>
  17. #include <asm/io.h>
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include "../../../drivers/pci/pci-sh7780.h"
  21. /*
  22. * The 7780 R7780RP-1 uses the built-in PCI controller (PCIC)
  23. * of the 7780 processor, and has a SuperIO accessible via the PCI.
  24. * The board also includes a PCMCIA controller on its memory bus,
  25. * like the other Solution Engine boards.
  26. */
  27. #define SH7780_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */
  28. #define PCIIOBR (volatile long *)PCI_REG(SH7780_PCIIOBR)
  29. #define PCIMBR (volatile long *)PCI_REG(SH7780_PCIMBR)
  30. #define PCI_IO_AREA SH7780_PCI_IO_BASE
  31. #define PCI_MEM_AREA SH7780_PCI_CONFIG_BASE
  32. #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7780_PCIIOBR_MASK))
  33. static inline void delay(void)
  34. {
  35. ctrl_inw(0xa0000000);
  36. }
  37. static inline unsigned long port2adr(unsigned int port)
  38. {
  39. if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
  40. if (port == 0x3f6)
  41. return (PA_AREA5_IO + 0x80c);
  42. else
  43. return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
  44. else
  45. maybebadio((unsigned long)port);
  46. return port;
  47. }
  48. static inline unsigned long port88796l(unsigned int port, int flag)
  49. {
  50. unsigned long addr;
  51. if (flag)
  52. addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
  53. else
  54. addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
  55. return addr;
  56. }
  57. /* The 7780 R7780RP-1 seems to have everything hooked */
  58. /* up pretty normally (nothing on high-bytes only...) so this */
  59. /* shouldn't be needed */
  60. static inline int shifted_port(unsigned long port)
  61. {
  62. /* For IDE registers, value is not shifted */
  63. if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
  64. return 0;
  65. else
  66. return 1;
  67. }
  68. /* In case someone configures the kernel w/o PCI support: in that */
  69. /* scenario, don't ever bother to check for PCI-window addresses */
  70. /* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
  71. #if defined(CONFIG_PCI)
  72. #define CHECK_SH7780_PCIIO(port) \
  73. ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7780_PCI_IO_SIZE)))
  74. #else
  75. #define CHECK_SH7780_PCIIO(port) (0)
  76. #endif
  77. #if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
  78. #define CHECK_AX88796L_PORT(port) \
  79. ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
  80. #else
  81. #define CHECK_AX88796L_PORT(port) (0)
  82. #endif
  83. /*
  84. * General outline: remap really low stuff [eventually] to SuperIO,
  85. * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
  86. * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
  87. * should be way beyond the window, and is used w/o translation for
  88. * compatibility.
  89. */
  90. u8 r7780rp_inb(unsigned long port)
  91. {
  92. if (CHECK_AX88796L_PORT(port))
  93. return ctrl_inw(port88796l(port, 0)) & 0xff;
  94. else if (PXSEG(port))
  95. return ctrl_inb(port);
  96. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  97. return ctrl_inb(PCI_IOMAP(port));
  98. return ctrl_inw(port2adr(port)) & 0xff;
  99. }
  100. u8 r7780rp_inb_p(unsigned long port)
  101. {
  102. u8 v;
  103. if (CHECK_AX88796L_PORT(port))
  104. v = ctrl_inw(port88796l(port, 0)) & 0xff;
  105. else if (PXSEG(port))
  106. v = ctrl_inb(port);
  107. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  108. v = ctrl_inb(PCI_IOMAP(port));
  109. else
  110. v = ctrl_inw(port2adr(port)) & 0xff;
  111. delay();
  112. return v;
  113. }
  114. u16 r7780rp_inw(unsigned long port)
  115. {
  116. if (CHECK_AX88796L_PORT(port))
  117. maybebadio(port);
  118. else if (PXSEG(port))
  119. return ctrl_inw(port);
  120. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  121. return ctrl_inw(PCI_IOMAP(port));
  122. else
  123. maybebadio(port);
  124. return 0;
  125. }
  126. u32 r7780rp_inl(unsigned long port)
  127. {
  128. if (CHECK_AX88796L_PORT(port))
  129. maybebadio(port);
  130. else if (PXSEG(port))
  131. return ctrl_inl(port);
  132. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  133. return ctrl_inl(PCI_IOMAP(port));
  134. else
  135. maybebadio(port);
  136. return 0;
  137. }
  138. void r7780rp_outb(u8 value, unsigned long port)
  139. {
  140. if (CHECK_AX88796L_PORT(port))
  141. ctrl_outw(value, port88796l(port, 0));
  142. else if (PXSEG(port))
  143. ctrl_outb(value, port);
  144. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  145. ctrl_outb(value, PCI_IOMAP(port));
  146. else
  147. ctrl_outw(value, port2adr(port));
  148. }
  149. void r7780rp_outb_p(u8 value, unsigned long port)
  150. {
  151. if (CHECK_AX88796L_PORT(port))
  152. ctrl_outw(value, port88796l(port, 0));
  153. else if (PXSEG(port))
  154. ctrl_outb(value, port);
  155. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  156. ctrl_outb(value, PCI_IOMAP(port));
  157. else
  158. ctrl_outw(value, port2adr(port));
  159. delay();
  160. }
  161. void r7780rp_outw(u16 value, unsigned long port)
  162. {
  163. if (CHECK_AX88796L_PORT(port))
  164. maybebadio(port);
  165. else if (PXSEG(port))
  166. ctrl_outw(value, port);
  167. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  168. ctrl_outw(value, PCI_IOMAP(port));
  169. else
  170. maybebadio(port);
  171. }
  172. void r7780rp_outl(u32 value, unsigned long port)
  173. {
  174. if (CHECK_AX88796L_PORT(port))
  175. maybebadio(port);
  176. else if (PXSEG(port))
  177. ctrl_outl(value, port);
  178. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  179. ctrl_outl(value, PCI_IOMAP(port));
  180. else
  181. maybebadio(port);
  182. }
  183. void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
  184. {
  185. volatile u16 *p;
  186. u8 *buf = dst;
  187. if (CHECK_AX88796L_PORT(port)) {
  188. p = (volatile u16 *)port88796l(port, 0);
  189. while (count--)
  190. *buf++ = *p & 0xff;
  191. } else if (PXSEG(port)) {
  192. while (count--)
  193. *buf++ = *(volatile u8 *)port;
  194. } else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
  195. volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
  196. while (count--)
  197. *buf++ = *bp;
  198. } else {
  199. p = (volatile u16 *)port2adr(port);
  200. while (count--)
  201. *buf++ = *p & 0xff;
  202. }
  203. }
  204. void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
  205. {
  206. volatile u16 *p;
  207. u16 *buf = dst;
  208. if (CHECK_AX88796L_PORT(port))
  209. p = (volatile u16 *)port88796l(port, 1);
  210. else if (PXSEG(port))
  211. p = (volatile u16 *)port;
  212. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  213. p = (volatile u16 *)PCI_IOMAP(port);
  214. else
  215. p = (volatile u16 *)port2adr(port);
  216. while (count--)
  217. *buf++ = *p;
  218. }
  219. void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
  220. {
  221. u32 *buf = dst;
  222. if (CHECK_AX88796L_PORT(port))
  223. maybebadio(port);
  224. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
  225. volatile u32 *p = (volatile u32 *)PCI_IOMAP(port);
  226. while (count--)
  227. *buf++ = *p;
  228. } else
  229. maybebadio(port);
  230. }
  231. void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
  232. {
  233. volatile u16 *p;
  234. const u8 *buf = src;
  235. if (CHECK_AX88796L_PORT(port)) {
  236. p = (volatile u16 *)port88796l(port, 0);
  237. while (count--)
  238. *p = *buf++;
  239. } else if (PXSEG(port))
  240. while (count--)
  241. ctrl_outb(*buf++, port);
  242. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
  243. volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
  244. while (count--)
  245. *bp = *buf++;
  246. } else {
  247. p = (volatile u16 *)port2adr(port);
  248. while (count--)
  249. *p = *buf++;
  250. }
  251. }
  252. void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
  253. {
  254. volatile u16 *p;
  255. const u16 *buf = src;
  256. if (CHECK_AX88796L_PORT(port))
  257. p = (volatile u16 *)port88796l(port, 1);
  258. else if (PXSEG(port))
  259. p = (volatile u16 *)port;
  260. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  261. p = (volatile u16 *)PCI_IOMAP(port);
  262. else
  263. p = (volatile u16 *)port2adr(port);
  264. while (count--)
  265. *p = *buf++;
  266. }
  267. void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
  268. {
  269. const u32 *buf = src;
  270. if (CHECK_AX88796L_PORT(port))
  271. maybebadio(port);
  272. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
  273. volatile u32 *p = (volatile u32 *)PCI_IOMAP(port);
  274. while (count--)
  275. *p = *buf++;
  276. } else
  277. maybebadio(port);
  278. }
  279. void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
  280. {
  281. if (CHECK_AX88796L_PORT(port))
  282. return (void __iomem *)port88796l(port, size > 1);
  283. else if (PXSEG(port))
  284. return (void __iomem *)port;
  285. else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
  286. return (void __iomem *)PCI_IOMAP(port);
  287. return (void __iomem *)port2adr(port);
  288. }