events.c 25 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072
  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <asm/desc.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/irq.h>
  33. #include <asm/idle.h>
  34. #include <asm/sync_bitops.h>
  35. #include <asm/xen/hypercall.h>
  36. #include <asm/xen/hypervisor.h>
  37. #include <xen/xen.h>
  38. #include <xen/hvm.h>
  39. #include <xen/xen-ops.h>
  40. #include <xen/events.h>
  41. #include <xen/interface/xen.h>
  42. #include <xen/interface/event_channel.h>
  43. #include <xen/interface/hvm/hvm_op.h>
  44. #include <xen/interface/hvm/params.h>
  45. /*
  46. * This lock protects updates to the following mapping and reference-count
  47. * arrays. The lock does not need to be acquired to read the mapping tables.
  48. */
  49. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  50. /* IRQ <-> VIRQ mapping. */
  51. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  52. /* IRQ <-> IPI mapping */
  53. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  54. /* Interrupt types. */
  55. enum xen_irq_type {
  56. IRQT_UNBOUND = 0,
  57. IRQT_PIRQ,
  58. IRQT_VIRQ,
  59. IRQT_IPI,
  60. IRQT_EVTCHN
  61. };
  62. /*
  63. * Packed IRQ information:
  64. * type - enum xen_irq_type
  65. * event channel - irq->event channel mapping
  66. * cpu - cpu this event channel is bound to
  67. * index - type-specific information:
  68. * PIRQ - vector, with MSB being "needs EIO"
  69. * VIRQ - virq number
  70. * IPI - IPI vector
  71. * EVTCHN -
  72. */
  73. struct irq_info
  74. {
  75. enum xen_irq_type type; /* type */
  76. unsigned short evtchn; /* event channel */
  77. unsigned short cpu; /* cpu bound */
  78. union {
  79. unsigned short virq;
  80. enum ipi_vector ipi;
  81. struct {
  82. unsigned short gsi;
  83. unsigned short vector;
  84. } pirq;
  85. } u;
  86. };
  87. static struct irq_info irq_info[NR_IRQS];
  88. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  89. [0 ... NR_EVENT_CHANNELS-1] = -1
  90. };
  91. struct cpu_evtchn_s {
  92. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  93. };
  94. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  95. static inline unsigned long *cpu_evtchn_mask(int cpu)
  96. {
  97. return cpu_evtchn_mask_p[cpu].bits;
  98. }
  99. /* Xen will never allocate port zero for any purpose. */
  100. #define VALID_EVTCHN(chn) ((chn) != 0)
  101. static struct irq_chip xen_dynamic_chip;
  102. static struct irq_chip xen_percpu_chip;
  103. /* Constructor for packed IRQ information. */
  104. static struct irq_info mk_unbound_info(void)
  105. {
  106. return (struct irq_info) { .type = IRQT_UNBOUND };
  107. }
  108. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  109. {
  110. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  111. .cpu = 0 };
  112. }
  113. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  114. {
  115. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  116. .cpu = 0, .u.ipi = ipi };
  117. }
  118. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  119. {
  120. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  121. .cpu = 0, .u.virq = virq };
  122. }
  123. static struct irq_info mk_pirq_info(unsigned short evtchn,
  124. unsigned short gsi, unsigned short vector)
  125. {
  126. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  127. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  128. }
  129. /*
  130. * Accessors for packed IRQ information.
  131. */
  132. static struct irq_info *info_for_irq(unsigned irq)
  133. {
  134. return &irq_info[irq];
  135. }
  136. static unsigned int evtchn_from_irq(unsigned irq)
  137. {
  138. return info_for_irq(irq)->evtchn;
  139. }
  140. unsigned irq_from_evtchn(unsigned int evtchn)
  141. {
  142. return evtchn_to_irq[evtchn];
  143. }
  144. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  145. static enum ipi_vector ipi_from_irq(unsigned irq)
  146. {
  147. struct irq_info *info = info_for_irq(irq);
  148. BUG_ON(info == NULL);
  149. BUG_ON(info->type != IRQT_IPI);
  150. return info->u.ipi;
  151. }
  152. static unsigned virq_from_irq(unsigned irq)
  153. {
  154. struct irq_info *info = info_for_irq(irq);
  155. BUG_ON(info == NULL);
  156. BUG_ON(info->type != IRQT_VIRQ);
  157. return info->u.virq;
  158. }
  159. static unsigned gsi_from_irq(unsigned irq)
  160. {
  161. struct irq_info *info = info_for_irq(irq);
  162. BUG_ON(info == NULL);
  163. BUG_ON(info->type != IRQT_PIRQ);
  164. return info->u.pirq.gsi;
  165. }
  166. static unsigned vector_from_irq(unsigned irq)
  167. {
  168. struct irq_info *info = info_for_irq(irq);
  169. BUG_ON(info == NULL);
  170. BUG_ON(info->type != IRQT_PIRQ);
  171. return info->u.pirq.vector;
  172. }
  173. static enum xen_irq_type type_from_irq(unsigned irq)
  174. {
  175. return info_for_irq(irq)->type;
  176. }
  177. static unsigned cpu_from_irq(unsigned irq)
  178. {
  179. return info_for_irq(irq)->cpu;
  180. }
  181. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  182. {
  183. int irq = evtchn_to_irq[evtchn];
  184. unsigned ret = 0;
  185. if (irq != -1)
  186. ret = cpu_from_irq(irq);
  187. return ret;
  188. }
  189. static inline unsigned long active_evtchns(unsigned int cpu,
  190. struct shared_info *sh,
  191. unsigned int idx)
  192. {
  193. return (sh->evtchn_pending[idx] &
  194. cpu_evtchn_mask(cpu)[idx] &
  195. ~sh->evtchn_mask[idx]);
  196. }
  197. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  198. {
  199. int irq = evtchn_to_irq[chn];
  200. BUG_ON(irq == -1);
  201. #ifdef CONFIG_SMP
  202. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  203. #endif
  204. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  205. __set_bit(chn, cpu_evtchn_mask(cpu));
  206. irq_info[irq].cpu = cpu;
  207. }
  208. static void init_evtchn_cpu_bindings(void)
  209. {
  210. #ifdef CONFIG_SMP
  211. struct irq_desc *desc;
  212. int i;
  213. /* By default all event channels notify CPU#0. */
  214. for_each_irq_desc(i, desc) {
  215. cpumask_copy(desc->affinity, cpumask_of(0));
  216. }
  217. #endif
  218. memset(cpu_evtchn_mask(0), ~0, sizeof(struct cpu_evtchn_s));
  219. }
  220. static inline void clear_evtchn(int port)
  221. {
  222. struct shared_info *s = HYPERVISOR_shared_info;
  223. sync_clear_bit(port, &s->evtchn_pending[0]);
  224. }
  225. static inline void set_evtchn(int port)
  226. {
  227. struct shared_info *s = HYPERVISOR_shared_info;
  228. sync_set_bit(port, &s->evtchn_pending[0]);
  229. }
  230. static inline int test_evtchn(int port)
  231. {
  232. struct shared_info *s = HYPERVISOR_shared_info;
  233. return sync_test_bit(port, &s->evtchn_pending[0]);
  234. }
  235. /**
  236. * notify_remote_via_irq - send event to remote end of event channel via irq
  237. * @irq: irq of event channel to send event to
  238. *
  239. * Unlike notify_remote_via_evtchn(), this is safe to use across
  240. * save/restore. Notifications on a broken connection are silently
  241. * dropped.
  242. */
  243. void notify_remote_via_irq(int irq)
  244. {
  245. int evtchn = evtchn_from_irq(irq);
  246. if (VALID_EVTCHN(evtchn))
  247. notify_remote_via_evtchn(evtchn);
  248. }
  249. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  250. static void mask_evtchn(int port)
  251. {
  252. struct shared_info *s = HYPERVISOR_shared_info;
  253. sync_set_bit(port, &s->evtchn_mask[0]);
  254. }
  255. static void unmask_evtchn(int port)
  256. {
  257. struct shared_info *s = HYPERVISOR_shared_info;
  258. unsigned int cpu = get_cpu();
  259. BUG_ON(!irqs_disabled());
  260. /* Slow path (hypercall) if this is a non-local port. */
  261. if (unlikely(cpu != cpu_from_evtchn(port))) {
  262. struct evtchn_unmask unmask = { .port = port };
  263. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  264. } else {
  265. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  266. sync_clear_bit(port, &s->evtchn_mask[0]);
  267. /*
  268. * The following is basically the equivalent of
  269. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  270. * the interrupt edge' if the channel is masked.
  271. */
  272. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  273. !sync_test_and_set_bit(port / BITS_PER_LONG,
  274. &vcpu_info->evtchn_pending_sel))
  275. vcpu_info->evtchn_upcall_pending = 1;
  276. }
  277. put_cpu();
  278. }
  279. static int find_unbound_irq(void)
  280. {
  281. struct irq_data *data;
  282. int irq, res;
  283. for (irq = 0; irq < nr_irqs; irq++) {
  284. data = irq_get_irq_data(irq);
  285. /* only 0->15 have init'd desc; handle irq > 16 */
  286. if (!data)
  287. break;
  288. if (data->chip == &no_irq_chip)
  289. break;
  290. if (data->chip != &xen_dynamic_chip)
  291. continue;
  292. if (irq_info[irq].type == IRQT_UNBOUND)
  293. return irq;
  294. }
  295. if (irq == nr_irqs)
  296. panic("No available IRQ to bind to: increase nr_irqs!\n");
  297. res = irq_alloc_desc_at(irq, 0);
  298. if (WARN_ON(res != irq))
  299. return -1;
  300. return irq;
  301. }
  302. int bind_evtchn_to_irq(unsigned int evtchn)
  303. {
  304. int irq;
  305. spin_lock(&irq_mapping_update_lock);
  306. irq = evtchn_to_irq[evtchn];
  307. if (irq == -1) {
  308. irq = find_unbound_irq();
  309. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  310. handle_fasteoi_irq, "event");
  311. evtchn_to_irq[evtchn] = irq;
  312. irq_info[irq] = mk_evtchn_info(evtchn);
  313. }
  314. spin_unlock(&irq_mapping_update_lock);
  315. return irq;
  316. }
  317. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  318. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  319. {
  320. struct evtchn_bind_ipi bind_ipi;
  321. int evtchn, irq;
  322. spin_lock(&irq_mapping_update_lock);
  323. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  324. if (irq == -1) {
  325. irq = find_unbound_irq();
  326. if (irq < 0)
  327. goto out;
  328. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  329. handle_percpu_irq, "ipi");
  330. bind_ipi.vcpu = cpu;
  331. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  332. &bind_ipi) != 0)
  333. BUG();
  334. evtchn = bind_ipi.port;
  335. evtchn_to_irq[evtchn] = irq;
  336. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  337. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  338. bind_evtchn_to_cpu(evtchn, cpu);
  339. }
  340. out:
  341. spin_unlock(&irq_mapping_update_lock);
  342. return irq;
  343. }
  344. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  345. {
  346. struct evtchn_bind_virq bind_virq;
  347. int evtchn, irq;
  348. spin_lock(&irq_mapping_update_lock);
  349. irq = per_cpu(virq_to_irq, cpu)[virq];
  350. if (irq == -1) {
  351. irq = find_unbound_irq();
  352. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  353. handle_percpu_irq, "virq");
  354. bind_virq.virq = virq;
  355. bind_virq.vcpu = cpu;
  356. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  357. &bind_virq) != 0)
  358. BUG();
  359. evtchn = bind_virq.port;
  360. evtchn_to_irq[evtchn] = irq;
  361. irq_info[irq] = mk_virq_info(evtchn, virq);
  362. per_cpu(virq_to_irq, cpu)[virq] = irq;
  363. bind_evtchn_to_cpu(evtchn, cpu);
  364. }
  365. spin_unlock(&irq_mapping_update_lock);
  366. return irq;
  367. }
  368. static void unbind_from_irq(unsigned int irq)
  369. {
  370. struct evtchn_close close;
  371. int evtchn = evtchn_from_irq(irq);
  372. spin_lock(&irq_mapping_update_lock);
  373. if (VALID_EVTCHN(evtchn)) {
  374. close.port = evtchn;
  375. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  376. BUG();
  377. switch (type_from_irq(irq)) {
  378. case IRQT_VIRQ:
  379. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  380. [virq_from_irq(irq)] = -1;
  381. break;
  382. case IRQT_IPI:
  383. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  384. [ipi_from_irq(irq)] = -1;
  385. break;
  386. default:
  387. break;
  388. }
  389. /* Closed ports are implicitly re-bound to VCPU0. */
  390. bind_evtchn_to_cpu(evtchn, 0);
  391. evtchn_to_irq[evtchn] = -1;
  392. }
  393. if (irq_info[irq].type != IRQT_UNBOUND) {
  394. irq_info[irq] = mk_unbound_info();
  395. irq_free_desc(irq);
  396. }
  397. spin_unlock(&irq_mapping_update_lock);
  398. }
  399. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  400. irq_handler_t handler,
  401. unsigned long irqflags,
  402. const char *devname, void *dev_id)
  403. {
  404. unsigned int irq;
  405. int retval;
  406. irq = bind_evtchn_to_irq(evtchn);
  407. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  408. if (retval != 0) {
  409. unbind_from_irq(irq);
  410. return retval;
  411. }
  412. return irq;
  413. }
  414. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  415. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  416. irq_handler_t handler,
  417. unsigned long irqflags, const char *devname, void *dev_id)
  418. {
  419. unsigned int irq;
  420. int retval;
  421. irq = bind_virq_to_irq(virq, cpu);
  422. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  423. if (retval != 0) {
  424. unbind_from_irq(irq);
  425. return retval;
  426. }
  427. return irq;
  428. }
  429. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  430. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  431. unsigned int cpu,
  432. irq_handler_t handler,
  433. unsigned long irqflags,
  434. const char *devname,
  435. void *dev_id)
  436. {
  437. int irq, retval;
  438. irq = bind_ipi_to_irq(ipi, cpu);
  439. if (irq < 0)
  440. return irq;
  441. irqflags |= IRQF_NO_SUSPEND;
  442. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  443. if (retval != 0) {
  444. unbind_from_irq(irq);
  445. return retval;
  446. }
  447. return irq;
  448. }
  449. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  450. {
  451. free_irq(irq, dev_id);
  452. unbind_from_irq(irq);
  453. }
  454. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  455. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  456. {
  457. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  458. BUG_ON(irq < 0);
  459. notify_remote_via_irq(irq);
  460. }
  461. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  462. {
  463. struct shared_info *sh = HYPERVISOR_shared_info;
  464. int cpu = smp_processor_id();
  465. unsigned long *cpu_evtchn = cpu_evtchn_mask(cpu);
  466. int i;
  467. unsigned long flags;
  468. static DEFINE_SPINLOCK(debug_lock);
  469. struct vcpu_info *v;
  470. spin_lock_irqsave(&debug_lock, flags);
  471. printk("\nvcpu %d\n ", cpu);
  472. for_each_online_cpu(i) {
  473. int pending;
  474. v = per_cpu(xen_vcpu, i);
  475. pending = (get_irq_regs() && i == cpu)
  476. ? xen_irqs_disabled(get_irq_regs())
  477. : v->evtchn_upcall_mask;
  478. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  479. pending, v->evtchn_upcall_pending,
  480. (int)(sizeof(v->evtchn_pending_sel)*2),
  481. v->evtchn_pending_sel);
  482. }
  483. v = per_cpu(xen_vcpu, cpu);
  484. printk("\npending:\n ");
  485. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  486. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  487. sh->evtchn_pending[i],
  488. i % 8 == 0 ? "\n " : " ");
  489. printk("\nglobal mask:\n ");
  490. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  491. printk("%0*lx%s",
  492. (int)(sizeof(sh->evtchn_mask[0])*2),
  493. sh->evtchn_mask[i],
  494. i % 8 == 0 ? "\n " : " ");
  495. printk("\nglobally unmasked:\n ");
  496. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  497. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  498. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  499. i % 8 == 0 ? "\n " : " ");
  500. printk("\nlocal cpu%d mask:\n ", cpu);
  501. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  502. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  503. cpu_evtchn[i],
  504. i % 8 == 0 ? "\n " : " ");
  505. printk("\nlocally unmasked:\n ");
  506. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  507. unsigned long pending = sh->evtchn_pending[i]
  508. & ~sh->evtchn_mask[i]
  509. & cpu_evtchn[i];
  510. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  511. pending, i % 8 == 0 ? "\n " : " ");
  512. }
  513. printk("\npending list:\n");
  514. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  515. if (sync_test_bit(i, sh->evtchn_pending)) {
  516. int word_idx = i / BITS_PER_LONG;
  517. printk(" %d: event %d -> irq %d%s%s%s\n",
  518. cpu_from_evtchn(i), i,
  519. evtchn_to_irq[i],
  520. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  521. ? "" : " l2-clear",
  522. !sync_test_bit(i, sh->evtchn_mask)
  523. ? "" : " globally-masked",
  524. sync_test_bit(i, cpu_evtchn)
  525. ? "" : " locally-masked");
  526. }
  527. }
  528. spin_unlock_irqrestore(&debug_lock, flags);
  529. return IRQ_HANDLED;
  530. }
  531. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  532. /*
  533. * Search the CPUs pending events bitmasks. For each one found, map
  534. * the event number to an irq, and feed it into do_IRQ() for
  535. * handling.
  536. *
  537. * Xen uses a two-level bitmap to speed searching. The first level is
  538. * a bitset of words which contain pending event bits. The second
  539. * level is a bitset of pending events themselves.
  540. */
  541. static void __xen_evtchn_do_upcall(void)
  542. {
  543. int cpu = get_cpu();
  544. struct shared_info *s = HYPERVISOR_shared_info;
  545. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  546. unsigned count;
  547. do {
  548. unsigned long pending_words;
  549. vcpu_info->evtchn_upcall_pending = 0;
  550. if (__get_cpu_var(xed_nesting_count)++)
  551. goto out;
  552. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  553. /* Clear master flag /before/ clearing selector flag. */
  554. wmb();
  555. #endif
  556. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  557. while (pending_words != 0) {
  558. unsigned long pending_bits;
  559. int word_idx = __ffs(pending_words);
  560. pending_words &= ~(1UL << word_idx);
  561. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  562. int bit_idx = __ffs(pending_bits);
  563. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  564. int irq = evtchn_to_irq[port];
  565. struct irq_desc *desc;
  566. mask_evtchn(port);
  567. clear_evtchn(port);
  568. if (irq != -1) {
  569. desc = irq_to_desc(irq);
  570. if (desc)
  571. generic_handle_irq_desc(irq, desc);
  572. }
  573. }
  574. }
  575. BUG_ON(!irqs_disabled());
  576. count = __get_cpu_var(xed_nesting_count);
  577. __get_cpu_var(xed_nesting_count) = 0;
  578. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  579. out:
  580. put_cpu();
  581. }
  582. void xen_evtchn_do_upcall(struct pt_regs *regs)
  583. {
  584. struct pt_regs *old_regs = set_irq_regs(regs);
  585. exit_idle();
  586. irq_enter();
  587. __xen_evtchn_do_upcall();
  588. irq_exit();
  589. set_irq_regs(old_regs);
  590. }
  591. void xen_hvm_evtchn_do_upcall(void)
  592. {
  593. __xen_evtchn_do_upcall();
  594. }
  595. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  596. /* Rebind a new event channel to an existing irq. */
  597. void rebind_evtchn_irq(int evtchn, int irq)
  598. {
  599. struct irq_info *info = info_for_irq(irq);
  600. /* Make sure the irq is masked, since the new event channel
  601. will also be masked. */
  602. disable_irq(irq);
  603. spin_lock(&irq_mapping_update_lock);
  604. /* After resume the irq<->evtchn mappings are all cleared out */
  605. BUG_ON(evtchn_to_irq[evtchn] != -1);
  606. /* Expect irq to have been bound before,
  607. so there should be a proper type */
  608. BUG_ON(info->type == IRQT_UNBOUND);
  609. evtchn_to_irq[evtchn] = irq;
  610. irq_info[irq] = mk_evtchn_info(evtchn);
  611. spin_unlock(&irq_mapping_update_lock);
  612. /* new event channels are always bound to cpu 0 */
  613. irq_set_affinity(irq, cpumask_of(0));
  614. /* Unmask the event channel. */
  615. enable_irq(irq);
  616. }
  617. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  618. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  619. {
  620. struct evtchn_bind_vcpu bind_vcpu;
  621. int evtchn = evtchn_from_irq(irq);
  622. /* events delivered via platform PCI interrupts are always
  623. * routed to vcpu 0 */
  624. if (!VALID_EVTCHN(evtchn) ||
  625. (xen_hvm_domain() && !xen_have_vector_callback))
  626. return -1;
  627. /* Send future instances of this interrupt to other vcpu. */
  628. bind_vcpu.port = evtchn;
  629. bind_vcpu.vcpu = tcpu;
  630. /*
  631. * If this fails, it usually just indicates that we're dealing with a
  632. * virq or IPI channel, which don't actually need to be rebound. Ignore
  633. * it, but don't do the xenlinux-level rebind in that case.
  634. */
  635. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  636. bind_evtchn_to_cpu(evtchn, tcpu);
  637. return 0;
  638. }
  639. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  640. {
  641. unsigned tcpu = cpumask_first(dest);
  642. return rebind_irq_to_cpu(irq, tcpu);
  643. }
  644. int resend_irq_on_evtchn(unsigned int irq)
  645. {
  646. int masked, evtchn = evtchn_from_irq(irq);
  647. struct shared_info *s = HYPERVISOR_shared_info;
  648. if (!VALID_EVTCHN(evtchn))
  649. return 1;
  650. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  651. sync_set_bit(evtchn, s->evtchn_pending);
  652. if (!masked)
  653. unmask_evtchn(evtchn);
  654. return 1;
  655. }
  656. static void enable_dynirq(unsigned int irq)
  657. {
  658. int evtchn = evtchn_from_irq(irq);
  659. if (VALID_EVTCHN(evtchn))
  660. unmask_evtchn(evtchn);
  661. }
  662. static void disable_dynirq(unsigned int irq)
  663. {
  664. int evtchn = evtchn_from_irq(irq);
  665. if (VALID_EVTCHN(evtchn))
  666. mask_evtchn(evtchn);
  667. }
  668. static void ack_dynirq(unsigned int irq)
  669. {
  670. int evtchn = evtchn_from_irq(irq);
  671. move_masked_irq(irq);
  672. if (VALID_EVTCHN(evtchn))
  673. unmask_evtchn(evtchn);
  674. }
  675. static int retrigger_dynirq(unsigned int irq)
  676. {
  677. int evtchn = evtchn_from_irq(irq);
  678. struct shared_info *sh = HYPERVISOR_shared_info;
  679. int ret = 0;
  680. if (VALID_EVTCHN(evtchn)) {
  681. int masked;
  682. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  683. sync_set_bit(evtchn, sh->evtchn_pending);
  684. if (!masked)
  685. unmask_evtchn(evtchn);
  686. ret = 1;
  687. }
  688. return ret;
  689. }
  690. static void restore_cpu_virqs(unsigned int cpu)
  691. {
  692. struct evtchn_bind_virq bind_virq;
  693. int virq, irq, evtchn;
  694. for (virq = 0; virq < NR_VIRQS; virq++) {
  695. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  696. continue;
  697. BUG_ON(virq_from_irq(irq) != virq);
  698. /* Get a new binding from Xen. */
  699. bind_virq.virq = virq;
  700. bind_virq.vcpu = cpu;
  701. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  702. &bind_virq) != 0)
  703. BUG();
  704. evtchn = bind_virq.port;
  705. /* Record the new mapping. */
  706. evtchn_to_irq[evtchn] = irq;
  707. irq_info[irq] = mk_virq_info(evtchn, virq);
  708. bind_evtchn_to_cpu(evtchn, cpu);
  709. /* Ready for use. */
  710. unmask_evtchn(evtchn);
  711. }
  712. }
  713. static void restore_cpu_ipis(unsigned int cpu)
  714. {
  715. struct evtchn_bind_ipi bind_ipi;
  716. int ipi, irq, evtchn;
  717. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  718. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  719. continue;
  720. BUG_ON(ipi_from_irq(irq) != ipi);
  721. /* Get a new binding from Xen. */
  722. bind_ipi.vcpu = cpu;
  723. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  724. &bind_ipi) != 0)
  725. BUG();
  726. evtchn = bind_ipi.port;
  727. /* Record the new mapping. */
  728. evtchn_to_irq[evtchn] = irq;
  729. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  730. bind_evtchn_to_cpu(evtchn, cpu);
  731. /* Ready for use. */
  732. unmask_evtchn(evtchn);
  733. }
  734. }
  735. /* Clear an irq's pending state, in preparation for polling on it */
  736. void xen_clear_irq_pending(int irq)
  737. {
  738. int evtchn = evtchn_from_irq(irq);
  739. if (VALID_EVTCHN(evtchn))
  740. clear_evtchn(evtchn);
  741. }
  742. void xen_set_irq_pending(int irq)
  743. {
  744. int evtchn = evtchn_from_irq(irq);
  745. if (VALID_EVTCHN(evtchn))
  746. set_evtchn(evtchn);
  747. }
  748. bool xen_test_irq_pending(int irq)
  749. {
  750. int evtchn = evtchn_from_irq(irq);
  751. bool ret = false;
  752. if (VALID_EVTCHN(evtchn))
  753. ret = test_evtchn(evtchn);
  754. return ret;
  755. }
  756. /* Poll waiting for an irq to become pending. In the usual case, the
  757. irq will be disabled so it won't deliver an interrupt. */
  758. void xen_poll_irq(int irq)
  759. {
  760. evtchn_port_t evtchn = evtchn_from_irq(irq);
  761. if (VALID_EVTCHN(evtchn)) {
  762. struct sched_poll poll;
  763. poll.nr_ports = 1;
  764. poll.timeout = 0;
  765. set_xen_guest_handle(poll.ports, &evtchn);
  766. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  767. BUG();
  768. }
  769. }
  770. void xen_irq_resume(void)
  771. {
  772. unsigned int cpu, irq, evtchn;
  773. init_evtchn_cpu_bindings();
  774. /* New event-channel space is not 'live' yet. */
  775. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  776. mask_evtchn(evtchn);
  777. /* No IRQ <-> event-channel mappings. */
  778. for (irq = 0; irq < nr_irqs; irq++)
  779. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  780. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  781. evtchn_to_irq[evtchn] = -1;
  782. for_each_possible_cpu(cpu) {
  783. restore_cpu_virqs(cpu);
  784. restore_cpu_ipis(cpu);
  785. }
  786. }
  787. static struct irq_chip xen_dynamic_chip __read_mostly = {
  788. .name = "xen-dyn",
  789. .disable = disable_dynirq,
  790. .mask = disable_dynirq,
  791. .unmask = enable_dynirq,
  792. .eoi = ack_dynirq,
  793. .set_affinity = set_affinity_irq,
  794. .retrigger = retrigger_dynirq,
  795. };
  796. static struct irq_chip xen_percpu_chip __read_mostly = {
  797. .name = "xen-percpu",
  798. .disable = disable_dynirq,
  799. .mask = disable_dynirq,
  800. .unmask = enable_dynirq,
  801. .ack = ack_dynirq,
  802. };
  803. int xen_set_callback_via(uint64_t via)
  804. {
  805. struct xen_hvm_param a;
  806. a.domid = DOMID_SELF;
  807. a.index = HVM_PARAM_CALLBACK_IRQ;
  808. a.value = via;
  809. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  810. }
  811. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  812. #ifdef CONFIG_XEN_PVHVM
  813. /* Vector callbacks are better than PCI interrupts to receive event
  814. * channel notifications because we can receive vector callbacks on any
  815. * vcpu and we don't need PCI support or APIC interactions. */
  816. void xen_callback_vector(void)
  817. {
  818. int rc;
  819. uint64_t callback_via;
  820. if (xen_have_vector_callback) {
  821. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  822. rc = xen_set_callback_via(callback_via);
  823. if (rc) {
  824. printk(KERN_ERR "Request for Xen HVM callback vector"
  825. " failed.\n");
  826. xen_have_vector_callback = 0;
  827. return;
  828. }
  829. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  830. "enabled\n");
  831. /* in the restore case the vector has already been allocated */
  832. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  833. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  834. }
  835. }
  836. #else
  837. void xen_callback_vector(void) {}
  838. #endif
  839. void __init xen_init_IRQ(void)
  840. {
  841. int i;
  842. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  843. GFP_KERNEL);
  844. BUG_ON(cpu_evtchn_mask_p == NULL);
  845. init_evtchn_cpu_bindings();
  846. /* No event channels are 'live' right now. */
  847. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  848. mask_evtchn(i);
  849. if (xen_hvm_domain()) {
  850. xen_callback_vector();
  851. native_init_IRQ();
  852. } else {
  853. irq_ctx_init(smp_processor_id());
  854. }
  855. }