f71805f.c 42 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
  3. * chips integrated hardware monitoring features
  4. * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * The F71872F/FG is almost the same, with two more voltages monitored,
  11. * and 6 VID inputs.
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/jiffies.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/hwmon.h>
  33. #include <linux/hwmon-sysfs.h>
  34. #include <linux/err.h>
  35. #include <linux/mutex.h>
  36. #include <linux/sysfs.h>
  37. #include <asm/io.h>
  38. static struct platform_device *pdev;
  39. #define DRVNAME "f71805f"
  40. enum kinds { f71805f, f71872f };
  41. /*
  42. * Super-I/O constants and functions
  43. */
  44. #define F71805F_LD_HWM 0x04
  45. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  46. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  47. #define SIO_REG_DEVREV 0x22 /* Device revision */
  48. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  49. #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
  50. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  51. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  52. #define SIO_FINTEK_ID 0x1934
  53. #define SIO_F71805F_ID 0x0406
  54. #define SIO_F71872F_ID 0x0341
  55. static inline int
  56. superio_inb(int base, int reg)
  57. {
  58. outb(reg, base);
  59. return inb(base + 1);
  60. }
  61. static int
  62. superio_inw(int base, int reg)
  63. {
  64. int val;
  65. outb(reg++, base);
  66. val = inb(base + 1) << 8;
  67. outb(reg, base);
  68. val |= inb(base + 1);
  69. return val;
  70. }
  71. static inline void
  72. superio_select(int base, int ld)
  73. {
  74. outb(SIO_REG_LDSEL, base);
  75. outb(ld, base + 1);
  76. }
  77. static inline void
  78. superio_enter(int base)
  79. {
  80. outb(0x87, base);
  81. outb(0x87, base);
  82. }
  83. static inline void
  84. superio_exit(int base)
  85. {
  86. outb(0xaa, base);
  87. }
  88. /*
  89. * ISA constants
  90. */
  91. #define REGION_LENGTH 2
  92. #define ADDR_REG_OFFSET 0
  93. #define DATA_REG_OFFSET 1
  94. /*
  95. * Registers
  96. */
  97. /* in nr from 0 to 10 (8-bit values) */
  98. #define F71805F_REG_IN(nr) (0x10 + (nr))
  99. #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
  100. #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
  101. /* fan nr from 0 to 2 (12-bit values, two registers) */
  102. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  103. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  104. #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
  105. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  106. #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
  107. #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
  108. /* temp nr from 0 to 2 (8-bit values) */
  109. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  110. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  111. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  112. #define F71805F_REG_TEMP_MODE 0x01
  113. #define F71805F_REG_START 0x00
  114. /* status nr from 0 to 2 */
  115. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  116. /* individual register bits */
  117. #define FAN_CTRL_SKIP 0x80
  118. #define FAN_CTRL_DC_MODE 0x10
  119. #define FAN_CTRL_LATCH_FULL 0x08
  120. #define FAN_CTRL_MODE_MASK 0x03
  121. #define FAN_CTRL_MODE_SPEED 0x00
  122. #define FAN_CTRL_MODE_TEMPERATURE 0x01
  123. #define FAN_CTRL_MODE_MANUAL 0x02
  124. /*
  125. * Data structures and manipulation thereof
  126. */
  127. struct f71805f_data {
  128. unsigned short addr;
  129. const char *name;
  130. struct mutex lock;
  131. struct class_device *class_dev;
  132. struct mutex update_lock;
  133. char valid; /* !=0 if following fields are valid */
  134. unsigned long last_updated; /* In jiffies */
  135. unsigned long last_limits; /* In jiffies */
  136. /* Register values */
  137. u8 in[11];
  138. u8 in_high[11];
  139. u8 in_low[11];
  140. u16 has_in;
  141. u16 fan[3];
  142. u16 fan_low[3];
  143. u16 fan_target[3];
  144. u8 fan_ctrl[3];
  145. u8 pwm[3];
  146. u8 pwm_freq[3];
  147. u8 temp[3];
  148. u8 temp_high[3];
  149. u8 temp_hyst[3];
  150. u8 temp_mode;
  151. unsigned long alarms;
  152. };
  153. struct f71805f_sio_data {
  154. enum kinds kind;
  155. u8 fnsel1;
  156. };
  157. static inline long in_from_reg(u8 reg)
  158. {
  159. return (reg * 8);
  160. }
  161. /* The 2 least significant bits are not used */
  162. static inline u8 in_to_reg(long val)
  163. {
  164. if (val <= 0)
  165. return 0;
  166. if (val >= 2016)
  167. return 0xfc;
  168. return (((val + 16) / 32) << 2);
  169. }
  170. /* in0 is downscaled by a factor 2 internally */
  171. static inline long in0_from_reg(u8 reg)
  172. {
  173. return (reg * 16);
  174. }
  175. static inline u8 in0_to_reg(long val)
  176. {
  177. if (val <= 0)
  178. return 0;
  179. if (val >= 4032)
  180. return 0xfc;
  181. return (((val + 32) / 64) << 2);
  182. }
  183. /* The 4 most significant bits are not used */
  184. static inline long fan_from_reg(u16 reg)
  185. {
  186. reg &= 0xfff;
  187. if (!reg || reg == 0xfff)
  188. return 0;
  189. return (1500000 / reg);
  190. }
  191. static inline u16 fan_to_reg(long rpm)
  192. {
  193. /* If the low limit is set below what the chip can measure,
  194. store the largest possible 12-bit value in the registers,
  195. so that no alarm will ever trigger. */
  196. if (rpm < 367)
  197. return 0xfff;
  198. return (1500000 / rpm);
  199. }
  200. static inline unsigned long pwm_freq_from_reg(u8 reg)
  201. {
  202. unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
  203. reg &= 0x7f;
  204. if (reg == 0)
  205. reg++;
  206. return clock / (reg << 8);
  207. }
  208. static inline u8 pwm_freq_to_reg(unsigned long val)
  209. {
  210. if (val >= 187500) /* The highest we can do */
  211. return 0x80;
  212. if (val >= 1475) /* Use 48 MHz clock */
  213. return 0x80 | (48000000UL / (val << 8));
  214. if (val < 31) /* The lowest we can do */
  215. return 0x7f;
  216. else /* Use 1 MHz clock */
  217. return 1000000UL / (val << 8);
  218. }
  219. static inline int pwm_mode_from_reg(u8 reg)
  220. {
  221. return !(reg & FAN_CTRL_DC_MODE);
  222. }
  223. static inline long temp_from_reg(u8 reg)
  224. {
  225. return (reg * 1000);
  226. }
  227. static inline u8 temp_to_reg(long val)
  228. {
  229. if (val < 0)
  230. val = 0;
  231. else if (val > 1000 * 0xff)
  232. val = 0xff;
  233. return ((val + 500) / 1000);
  234. }
  235. /*
  236. * Device I/O access
  237. */
  238. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  239. {
  240. u8 val;
  241. mutex_lock(&data->lock);
  242. outb(reg, data->addr + ADDR_REG_OFFSET);
  243. val = inb(data->addr + DATA_REG_OFFSET);
  244. mutex_unlock(&data->lock);
  245. return val;
  246. }
  247. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  248. {
  249. mutex_lock(&data->lock);
  250. outb(reg, data->addr + ADDR_REG_OFFSET);
  251. outb(val, data->addr + DATA_REG_OFFSET);
  252. mutex_unlock(&data->lock);
  253. }
  254. /* It is important to read the MSB first, because doing so latches the
  255. value of the LSB, so we are sure both bytes belong to the same value. */
  256. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  257. {
  258. u16 val;
  259. mutex_lock(&data->lock);
  260. outb(reg, data->addr + ADDR_REG_OFFSET);
  261. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  262. outb(++reg, data->addr + ADDR_REG_OFFSET);
  263. val |= inb(data->addr + DATA_REG_OFFSET);
  264. mutex_unlock(&data->lock);
  265. return val;
  266. }
  267. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  268. {
  269. mutex_lock(&data->lock);
  270. outb(reg, data->addr + ADDR_REG_OFFSET);
  271. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  272. outb(++reg, data->addr + ADDR_REG_OFFSET);
  273. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  274. mutex_unlock(&data->lock);
  275. }
  276. static struct f71805f_data *f71805f_update_device(struct device *dev)
  277. {
  278. struct f71805f_data *data = dev_get_drvdata(dev);
  279. int nr;
  280. mutex_lock(&data->update_lock);
  281. /* Limit registers cache is refreshed after 60 seconds */
  282. if (time_after(jiffies, data->last_updated + 60 * HZ)
  283. || !data->valid) {
  284. for (nr = 0; nr < 11; nr++) {
  285. if (!(data->has_in & (1 << nr)))
  286. continue;
  287. data->in_high[nr] = f71805f_read8(data,
  288. F71805F_REG_IN_HIGH(nr));
  289. data->in_low[nr] = f71805f_read8(data,
  290. F71805F_REG_IN_LOW(nr));
  291. }
  292. for (nr = 0; nr < 3; nr++) {
  293. if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
  294. continue;
  295. data->fan_low[nr] = f71805f_read16(data,
  296. F71805F_REG_FAN_LOW(nr));
  297. data->fan_target[nr] = f71805f_read16(data,
  298. F71805F_REG_FAN_TARGET(nr));
  299. data->pwm_freq[nr] = f71805f_read8(data,
  300. F71805F_REG_PWM_FREQ(nr));
  301. }
  302. for (nr = 0; nr < 3; nr++) {
  303. data->temp_high[nr] = f71805f_read8(data,
  304. F71805F_REG_TEMP_HIGH(nr));
  305. data->temp_hyst[nr] = f71805f_read8(data,
  306. F71805F_REG_TEMP_HYST(nr));
  307. }
  308. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  309. data->last_limits = jiffies;
  310. }
  311. /* Measurement registers cache is refreshed after 1 second */
  312. if (time_after(jiffies, data->last_updated + HZ)
  313. || !data->valid) {
  314. for (nr = 0; nr < 11; nr++) {
  315. if (!(data->has_in & (1 << nr)))
  316. continue;
  317. data->in[nr] = f71805f_read8(data,
  318. F71805F_REG_IN(nr));
  319. }
  320. for (nr = 0; nr < 3; nr++) {
  321. if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
  322. continue;
  323. data->fan[nr] = f71805f_read16(data,
  324. F71805F_REG_FAN(nr));
  325. data->fan_ctrl[nr] = f71805f_read8(data,
  326. F71805F_REG_FAN_CTRL(nr));
  327. data->pwm[nr] = f71805f_read8(data,
  328. F71805F_REG_PWM_DUTY(nr));
  329. }
  330. for (nr = 0; nr < 3; nr++) {
  331. data->temp[nr] = f71805f_read8(data,
  332. F71805F_REG_TEMP(nr));
  333. }
  334. data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
  335. + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
  336. + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
  337. data->last_updated = jiffies;
  338. data->valid = 1;
  339. }
  340. mutex_unlock(&data->update_lock);
  341. return data;
  342. }
  343. /*
  344. * Sysfs interface
  345. */
  346. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  347. char *buf)
  348. {
  349. struct f71805f_data *data = f71805f_update_device(dev);
  350. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  351. int nr = attr->index;
  352. return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
  353. }
  354. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  355. *devattr, char *buf)
  356. {
  357. struct f71805f_data *data = f71805f_update_device(dev);
  358. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  359. int nr = attr->index;
  360. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
  361. }
  362. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  363. *devattr, char *buf)
  364. {
  365. struct f71805f_data *data = f71805f_update_device(dev);
  366. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  367. int nr = attr->index;
  368. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
  369. }
  370. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  371. *devattr, const char *buf, size_t count)
  372. {
  373. struct f71805f_data *data = dev_get_drvdata(dev);
  374. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  375. int nr = attr->index;
  376. long val = simple_strtol(buf, NULL, 10);
  377. mutex_lock(&data->update_lock);
  378. data->in_high[nr] = in0_to_reg(val);
  379. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  380. mutex_unlock(&data->update_lock);
  381. return count;
  382. }
  383. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  384. *devattr, const char *buf, size_t count)
  385. {
  386. struct f71805f_data *data = dev_get_drvdata(dev);
  387. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  388. int nr = attr->index;
  389. long val = simple_strtol(buf, NULL, 10);
  390. mutex_lock(&data->update_lock);
  391. data->in_low[nr] = in0_to_reg(val);
  392. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  393. mutex_unlock(&data->update_lock);
  394. return count;
  395. }
  396. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  397. char *buf)
  398. {
  399. struct f71805f_data *data = f71805f_update_device(dev);
  400. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  401. int nr = attr->index;
  402. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  403. }
  404. static ssize_t show_in_max(struct device *dev, struct device_attribute
  405. *devattr, char *buf)
  406. {
  407. struct f71805f_data *data = f71805f_update_device(dev);
  408. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  409. int nr = attr->index;
  410. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  411. }
  412. static ssize_t show_in_min(struct device *dev, struct device_attribute
  413. *devattr, char *buf)
  414. {
  415. struct f71805f_data *data = f71805f_update_device(dev);
  416. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  417. int nr = attr->index;
  418. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  419. }
  420. static ssize_t set_in_max(struct device *dev, struct device_attribute
  421. *devattr, const char *buf, size_t count)
  422. {
  423. struct f71805f_data *data = dev_get_drvdata(dev);
  424. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  425. int nr = attr->index;
  426. long val = simple_strtol(buf, NULL, 10);
  427. mutex_lock(&data->update_lock);
  428. data->in_high[nr] = in_to_reg(val);
  429. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  430. mutex_unlock(&data->update_lock);
  431. return count;
  432. }
  433. static ssize_t set_in_min(struct device *dev, struct device_attribute
  434. *devattr, const char *buf, size_t count)
  435. {
  436. struct f71805f_data *data = dev_get_drvdata(dev);
  437. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  438. int nr = attr->index;
  439. long val = simple_strtol(buf, NULL, 10);
  440. mutex_lock(&data->update_lock);
  441. data->in_low[nr] = in_to_reg(val);
  442. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  443. mutex_unlock(&data->update_lock);
  444. return count;
  445. }
  446. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  447. char *buf)
  448. {
  449. struct f71805f_data *data = f71805f_update_device(dev);
  450. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  451. int nr = attr->index;
  452. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  453. }
  454. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  455. *devattr, char *buf)
  456. {
  457. struct f71805f_data *data = f71805f_update_device(dev);
  458. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  459. int nr = attr->index;
  460. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  461. }
  462. static ssize_t show_fan_target(struct device *dev, struct device_attribute
  463. *devattr, char *buf)
  464. {
  465. struct f71805f_data *data = f71805f_update_device(dev);
  466. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  467. int nr = attr->index;
  468. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
  469. }
  470. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  471. *devattr, const char *buf, size_t count)
  472. {
  473. struct f71805f_data *data = dev_get_drvdata(dev);
  474. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  475. int nr = attr->index;
  476. long val = simple_strtol(buf, NULL, 10);
  477. mutex_lock(&data->update_lock);
  478. data->fan_low[nr] = fan_to_reg(val);
  479. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  480. mutex_unlock(&data->update_lock);
  481. return count;
  482. }
  483. static ssize_t set_fan_target(struct device *dev, struct device_attribute
  484. *devattr, const char *buf, size_t count)
  485. {
  486. struct f71805f_data *data = dev_get_drvdata(dev);
  487. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  488. int nr = attr->index;
  489. long val = simple_strtol(buf, NULL, 10);
  490. mutex_lock(&data->update_lock);
  491. data->fan_target[nr] = fan_to_reg(val);
  492. f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
  493. data->fan_target[nr]);
  494. mutex_unlock(&data->update_lock);
  495. return count;
  496. }
  497. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  498. char *buf)
  499. {
  500. struct f71805f_data *data = f71805f_update_device(dev);
  501. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  502. int nr = attr->index;
  503. return sprintf(buf, "%d\n", (int)data->pwm[nr]);
  504. }
  505. static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
  506. *devattr, char *buf)
  507. {
  508. struct f71805f_data *data = f71805f_update_device(dev);
  509. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  510. int nr = attr->index;
  511. int mode;
  512. switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
  513. case FAN_CTRL_MODE_SPEED:
  514. mode = 3;
  515. break;
  516. case FAN_CTRL_MODE_TEMPERATURE:
  517. mode = 2;
  518. break;
  519. default: /* MANUAL */
  520. mode = 1;
  521. }
  522. return sprintf(buf, "%d\n", mode);
  523. }
  524. static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
  525. *devattr, char *buf)
  526. {
  527. struct f71805f_data *data = f71805f_update_device(dev);
  528. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  529. int nr = attr->index;
  530. return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
  531. }
  532. static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
  533. *devattr, char *buf)
  534. {
  535. struct f71805f_data *data = f71805f_update_device(dev);
  536. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  537. int nr = attr->index;
  538. return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
  539. }
  540. static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
  541. const char *buf, size_t count)
  542. {
  543. struct f71805f_data *data = dev_get_drvdata(dev);
  544. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  545. int nr = attr->index;
  546. unsigned long val = simple_strtoul(buf, NULL, 10);
  547. if (val > 255)
  548. return -EINVAL;
  549. mutex_lock(&data->update_lock);
  550. data->pwm[nr] = val;
  551. f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
  552. mutex_unlock(&data->update_lock);
  553. return count;
  554. }
  555. static struct attribute *f71805f_attr_pwm[];
  556. static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
  557. *devattr, const char *buf, size_t count)
  558. {
  559. struct f71805f_data *data = dev_get_drvdata(dev);
  560. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  561. int nr = attr->index;
  562. unsigned long val = simple_strtoul(buf, NULL, 10);
  563. u8 reg;
  564. if (val < 1 || val > 3)
  565. return -EINVAL;
  566. if (val > 1) { /* Automatic mode, user can't set PWM value */
  567. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  568. S_IRUGO))
  569. dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
  570. }
  571. mutex_lock(&data->update_lock);
  572. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
  573. & ~FAN_CTRL_MODE_MASK;
  574. switch (val) {
  575. case 1:
  576. reg |= FAN_CTRL_MODE_MANUAL;
  577. break;
  578. case 2:
  579. reg |= FAN_CTRL_MODE_TEMPERATURE;
  580. break;
  581. case 3:
  582. reg |= FAN_CTRL_MODE_SPEED;
  583. break;
  584. }
  585. data->fan_ctrl[nr] = reg;
  586. f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
  587. mutex_unlock(&data->update_lock);
  588. if (val == 1) { /* Manual mode, user can set PWM value */
  589. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  590. S_IRUGO | S_IWUSR))
  591. dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
  592. }
  593. return count;
  594. }
  595. static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
  596. *devattr, const char *buf, size_t count)
  597. {
  598. struct f71805f_data *data = dev_get_drvdata(dev);
  599. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  600. int nr = attr->index;
  601. unsigned long val = simple_strtoul(buf, NULL, 10);
  602. mutex_lock(&data->update_lock);
  603. data->pwm_freq[nr] = pwm_freq_to_reg(val);
  604. f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
  605. mutex_unlock(&data->update_lock);
  606. return count;
  607. }
  608. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  609. char *buf)
  610. {
  611. struct f71805f_data *data = f71805f_update_device(dev);
  612. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  613. int nr = attr->index;
  614. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  615. }
  616. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  617. *devattr, char *buf)
  618. {
  619. struct f71805f_data *data = f71805f_update_device(dev);
  620. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  621. int nr = attr->index;
  622. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  623. }
  624. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  625. *devattr, char *buf)
  626. {
  627. struct f71805f_data *data = f71805f_update_device(dev);
  628. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  629. int nr = attr->index;
  630. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  631. }
  632. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  633. *devattr, char *buf)
  634. {
  635. struct f71805f_data *data = f71805f_update_device(dev);
  636. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  637. int nr = attr->index;
  638. /* 3 is diode, 4 is thermistor */
  639. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  640. }
  641. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  642. *devattr, const char *buf, size_t count)
  643. {
  644. struct f71805f_data *data = dev_get_drvdata(dev);
  645. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  646. int nr = attr->index;
  647. long val = simple_strtol(buf, NULL, 10);
  648. mutex_lock(&data->update_lock);
  649. data->temp_high[nr] = temp_to_reg(val);
  650. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  651. mutex_unlock(&data->update_lock);
  652. return count;
  653. }
  654. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  655. *devattr, const char *buf, size_t count)
  656. {
  657. struct f71805f_data *data = dev_get_drvdata(dev);
  658. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  659. int nr = attr->index;
  660. long val = simple_strtol(buf, NULL, 10);
  661. mutex_lock(&data->update_lock);
  662. data->temp_hyst[nr] = temp_to_reg(val);
  663. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  664. mutex_unlock(&data->update_lock);
  665. return count;
  666. }
  667. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  668. *devattr, char *buf)
  669. {
  670. struct f71805f_data *data = f71805f_update_device(dev);
  671. return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
  672. }
  673. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  674. *devattr, char *buf)
  675. {
  676. struct f71805f_data *data = f71805f_update_device(dev);
  677. return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
  678. }
  679. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  680. *devattr, char *buf)
  681. {
  682. struct f71805f_data *data = f71805f_update_device(dev);
  683. return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
  684. }
  685. static ssize_t show_alarm(struct device *dev, struct device_attribute
  686. *devattr, char *buf)
  687. {
  688. struct f71805f_data *data = f71805f_update_device(dev);
  689. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  690. int bitnr = attr->index;
  691. return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
  692. }
  693. static ssize_t show_name(struct device *dev, struct device_attribute
  694. *devattr, char *buf)
  695. {
  696. struct f71805f_data *data = dev_get_drvdata(dev);
  697. return sprintf(buf, "%s\n", data->name);
  698. }
  699. static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
  700. static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR,
  701. show_in0_max, set_in0_max, 0);
  702. static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR,
  703. show_in0_min, set_in0_min, 0);
  704. static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
  705. static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
  706. show_in_max, set_in_max, 1);
  707. static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
  708. show_in_min, set_in_min, 1);
  709. static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
  710. static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
  711. show_in_max, set_in_max, 2);
  712. static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
  713. show_in_min, set_in_min, 2);
  714. static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
  715. static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
  716. show_in_max, set_in_max, 3);
  717. static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
  718. show_in_min, set_in_min, 3);
  719. static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
  720. static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
  721. show_in_max, set_in_max, 4);
  722. static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
  723. show_in_min, set_in_min, 4);
  724. static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
  725. static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
  726. show_in_max, set_in_max, 5);
  727. static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
  728. show_in_min, set_in_min, 5);
  729. static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
  730. static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
  731. show_in_max, set_in_max, 6);
  732. static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
  733. show_in_min, set_in_min, 6);
  734. static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
  735. static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
  736. show_in_max, set_in_max, 7);
  737. static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
  738. show_in_min, set_in_min, 7);
  739. static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
  740. static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
  741. show_in_max, set_in_max, 8);
  742. static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
  743. show_in_min, set_in_min, 8);
  744. static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
  745. static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
  746. show_in0_max, set_in0_max, 9);
  747. static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
  748. show_in0_min, set_in0_min, 9);
  749. static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
  750. static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
  751. show_in0_max, set_in0_max, 10);
  752. static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
  753. show_in0_min, set_in0_min, 10);
  754. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  755. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  756. show_fan_min, set_fan_min, 0);
  757. static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
  758. show_fan_target, set_fan_target, 0);
  759. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  760. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  761. show_fan_min, set_fan_min, 1);
  762. static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
  763. show_fan_target, set_fan_target, 1);
  764. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  765. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  766. show_fan_min, set_fan_min, 2);
  767. static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
  768. show_fan_target, set_fan_target, 2);
  769. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
  770. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  771. show_temp_max, set_temp_max, 0);
  772. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  773. show_temp_hyst, set_temp_hyst, 0);
  774. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
  775. static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
  776. static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  777. show_temp_max, set_temp_max, 1);
  778. static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  779. show_temp_hyst, set_temp_hyst, 1);
  780. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
  781. static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
  782. static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  783. show_temp_max, set_temp_max, 2);
  784. static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  785. show_temp_hyst, set_temp_hyst, 2);
  786. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
  787. /* pwm (value) files are created read-only, write permission is
  788. then added or removed dynamically as needed */
  789. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
  790. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
  791. show_pwm_enable, set_pwm_enable, 0);
  792. static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
  793. show_pwm_freq, set_pwm_freq, 0);
  794. static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
  795. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
  796. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  797. show_pwm_enable, set_pwm_enable, 1);
  798. static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
  799. show_pwm_freq, set_pwm_freq, 1);
  800. static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
  801. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
  802. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
  803. show_pwm_enable, set_pwm_enable, 2);
  804. static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
  805. show_pwm_freq, set_pwm_freq, 2);
  806. static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
  807. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  808. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  809. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  810. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  811. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
  812. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
  813. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
  814. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
  815. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
  816. static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
  817. static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
  818. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
  819. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
  820. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
  821. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
  822. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
  823. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
  824. static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
  825. static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
  826. static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
  827. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  828. static struct attribute *f71805f_attributes[] = {
  829. &sensor_dev_attr_in0_input.dev_attr.attr,
  830. &sensor_dev_attr_in0_max.dev_attr.attr,
  831. &sensor_dev_attr_in0_min.dev_attr.attr,
  832. &sensor_dev_attr_in1_input.dev_attr.attr,
  833. &sensor_dev_attr_in1_max.dev_attr.attr,
  834. &sensor_dev_attr_in1_min.dev_attr.attr,
  835. &sensor_dev_attr_in2_input.dev_attr.attr,
  836. &sensor_dev_attr_in2_max.dev_attr.attr,
  837. &sensor_dev_attr_in2_min.dev_attr.attr,
  838. &sensor_dev_attr_in3_input.dev_attr.attr,
  839. &sensor_dev_attr_in3_max.dev_attr.attr,
  840. &sensor_dev_attr_in3_min.dev_attr.attr,
  841. &sensor_dev_attr_in5_input.dev_attr.attr,
  842. &sensor_dev_attr_in5_max.dev_attr.attr,
  843. &sensor_dev_attr_in5_min.dev_attr.attr,
  844. &sensor_dev_attr_in6_input.dev_attr.attr,
  845. &sensor_dev_attr_in6_max.dev_attr.attr,
  846. &sensor_dev_attr_in6_min.dev_attr.attr,
  847. &sensor_dev_attr_in7_input.dev_attr.attr,
  848. &sensor_dev_attr_in7_max.dev_attr.attr,
  849. &sensor_dev_attr_in7_min.dev_attr.attr,
  850. &sensor_dev_attr_temp1_input.dev_attr.attr,
  851. &sensor_dev_attr_temp1_max.dev_attr.attr,
  852. &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
  853. &sensor_dev_attr_temp1_type.dev_attr.attr,
  854. &sensor_dev_attr_temp2_input.dev_attr.attr,
  855. &sensor_dev_attr_temp2_max.dev_attr.attr,
  856. &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
  857. &sensor_dev_attr_temp2_type.dev_attr.attr,
  858. &sensor_dev_attr_temp3_input.dev_attr.attr,
  859. &sensor_dev_attr_temp3_max.dev_attr.attr,
  860. &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
  861. &sensor_dev_attr_temp3_type.dev_attr.attr,
  862. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  863. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  864. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  865. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  866. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  867. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  868. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  869. &dev_attr_alarms_in.attr,
  870. &sensor_dev_attr_temp1_alarm.dev_attr.attr,
  871. &sensor_dev_attr_temp2_alarm.dev_attr.attr,
  872. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  873. &dev_attr_alarms_temp.attr,
  874. &dev_attr_alarms_fan.attr,
  875. &dev_attr_name.attr,
  876. NULL
  877. };
  878. static const struct attribute_group f71805f_group = {
  879. .attrs = f71805f_attributes,
  880. };
  881. static struct attribute *f71805f_attributes_optin[4][5] = {
  882. {
  883. &sensor_dev_attr_in4_input.dev_attr.attr,
  884. &sensor_dev_attr_in4_max.dev_attr.attr,
  885. &sensor_dev_attr_in4_min.dev_attr.attr,
  886. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  887. NULL
  888. }, {
  889. &sensor_dev_attr_in8_input.dev_attr.attr,
  890. &sensor_dev_attr_in8_max.dev_attr.attr,
  891. &sensor_dev_attr_in8_min.dev_attr.attr,
  892. &sensor_dev_attr_in8_alarm.dev_attr.attr,
  893. NULL
  894. }, {
  895. &sensor_dev_attr_in9_input.dev_attr.attr,
  896. &sensor_dev_attr_in9_max.dev_attr.attr,
  897. &sensor_dev_attr_in9_min.dev_attr.attr,
  898. &sensor_dev_attr_in9_alarm.dev_attr.attr,
  899. NULL
  900. }, {
  901. &sensor_dev_attr_in10_input.dev_attr.attr,
  902. &sensor_dev_attr_in10_max.dev_attr.attr,
  903. &sensor_dev_attr_in10_min.dev_attr.attr,
  904. &sensor_dev_attr_in10_alarm.dev_attr.attr,
  905. NULL
  906. }
  907. };
  908. static const struct attribute_group f71805f_group_optin[4] = {
  909. { .attrs = f71805f_attributes_optin[0] },
  910. { .attrs = f71805f_attributes_optin[1] },
  911. { .attrs = f71805f_attributes_optin[2] },
  912. { .attrs = f71805f_attributes_optin[3] },
  913. };
  914. static struct attribute *f71805f_attributes_fan[3][8] = {
  915. {
  916. &sensor_dev_attr_fan1_input.dev_attr.attr,
  917. &sensor_dev_attr_fan1_min.dev_attr.attr,
  918. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  919. &sensor_dev_attr_fan1_target.dev_attr.attr,
  920. &sensor_dev_attr_pwm1.dev_attr.attr,
  921. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  922. &sensor_dev_attr_pwm1_mode.dev_attr.attr,
  923. NULL
  924. }, {
  925. &sensor_dev_attr_fan2_input.dev_attr.attr,
  926. &sensor_dev_attr_fan2_min.dev_attr.attr,
  927. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  928. &sensor_dev_attr_fan2_target.dev_attr.attr,
  929. &sensor_dev_attr_pwm2.dev_attr.attr,
  930. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  931. &sensor_dev_attr_pwm2_mode.dev_attr.attr,
  932. NULL
  933. }, {
  934. &sensor_dev_attr_fan3_input.dev_attr.attr,
  935. &sensor_dev_attr_fan3_min.dev_attr.attr,
  936. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  937. &sensor_dev_attr_fan3_target.dev_attr.attr,
  938. &sensor_dev_attr_pwm3.dev_attr.attr,
  939. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  940. &sensor_dev_attr_pwm3_mode.dev_attr.attr,
  941. NULL
  942. }
  943. };
  944. static const struct attribute_group f71805f_group_fan[3] = {
  945. { .attrs = f71805f_attributes_fan[0] },
  946. { .attrs = f71805f_attributes_fan[1] },
  947. { .attrs = f71805f_attributes_fan[2] },
  948. };
  949. /* We don't include pwm_freq files in the arrays above, because they must be
  950. created conditionally (only if pwm_mode is 1 == PWM) */
  951. static struct attribute *f71805f_attributes_pwm_freq[] = {
  952. &sensor_dev_attr_pwm1_freq.dev_attr.attr,
  953. &sensor_dev_attr_pwm2_freq.dev_attr.attr,
  954. &sensor_dev_attr_pwm3_freq.dev_attr.attr,
  955. NULL
  956. };
  957. static const struct attribute_group f71805f_group_pwm_freq = {
  958. .attrs = f71805f_attributes_pwm_freq,
  959. };
  960. /* We also need an indexed access to pwmN files to toggle writability */
  961. static struct attribute *f71805f_attr_pwm[] = {
  962. &sensor_dev_attr_pwm1.dev_attr.attr,
  963. &sensor_dev_attr_pwm2.dev_attr.attr,
  964. &sensor_dev_attr_pwm3.dev_attr.attr,
  965. };
  966. /*
  967. * Device registration and initialization
  968. */
  969. static void __devinit f71805f_init_device(struct f71805f_data *data)
  970. {
  971. u8 reg;
  972. int i;
  973. reg = f71805f_read8(data, F71805F_REG_START);
  974. if ((reg & 0x41) != 0x01) {
  975. printk(KERN_DEBUG DRVNAME ": Starting monitoring "
  976. "operations\n");
  977. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  978. }
  979. /* Fan monitoring can be disabled. If it is, we won't be polling
  980. the register values, and won't create the related sysfs files. */
  981. for (i = 0; i < 3; i++) {
  982. data->fan_ctrl[i] = f71805f_read8(data,
  983. F71805F_REG_FAN_CTRL(i));
  984. /* Clear latch full bit, else "speed mode" fan speed control
  985. doesn't work */
  986. if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
  987. data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
  988. f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
  989. data->fan_ctrl[i]);
  990. }
  991. }
  992. }
  993. static int __devinit f71805f_probe(struct platform_device *pdev)
  994. {
  995. struct f71805f_sio_data *sio_data = pdev->dev.platform_data;
  996. struct f71805f_data *data;
  997. struct resource *res;
  998. int i, err;
  999. static const char *names[] = {
  1000. "f71805f",
  1001. "f71872f",
  1002. };
  1003. if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
  1004. err = -ENOMEM;
  1005. printk(KERN_ERR DRVNAME ": Out of memory\n");
  1006. goto exit;
  1007. }
  1008. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1009. data->addr = res->start;
  1010. mutex_init(&data->lock);
  1011. data->name = names[sio_data->kind];
  1012. mutex_init(&data->update_lock);
  1013. platform_set_drvdata(pdev, data);
  1014. /* Some voltage inputs depend on chip model and configuration */
  1015. switch (sio_data->kind) {
  1016. case f71805f:
  1017. data->has_in = 0x1ff;
  1018. break;
  1019. case f71872f:
  1020. data->has_in = 0x6ef;
  1021. if (sio_data->fnsel1 & 0x01)
  1022. data->has_in |= (1 << 4); /* in4 */
  1023. if (sio_data->fnsel1 & 0x02)
  1024. data->has_in |= (1 << 8); /* in8 */
  1025. break;
  1026. }
  1027. /* Initialize the F71805F chip */
  1028. f71805f_init_device(data);
  1029. /* Register sysfs interface files */
  1030. if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group)))
  1031. goto exit_free;
  1032. if (data->has_in & (1 << 4)) { /* in4 */
  1033. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1034. &f71805f_group_optin[0])))
  1035. goto exit_remove_files;
  1036. }
  1037. if (data->has_in & (1 << 8)) { /* in8 */
  1038. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1039. &f71805f_group_optin[1])))
  1040. goto exit_remove_files;
  1041. }
  1042. if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
  1043. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1044. &f71805f_group_optin[2])))
  1045. goto exit_remove_files;
  1046. }
  1047. if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
  1048. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1049. &f71805f_group_optin[3])))
  1050. goto exit_remove_files;
  1051. }
  1052. for (i = 0; i < 3; i++) {
  1053. if (data->fan_ctrl[i] & FAN_CTRL_SKIP)
  1054. continue;
  1055. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1056. &f71805f_group_fan[i])))
  1057. goto exit_remove_files;
  1058. /* If control mode is PWM, create pwm_freq file */
  1059. if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
  1060. if ((err = sysfs_create_file(&pdev->dev.kobj,
  1061. f71805f_attributes_pwm_freq[i])))
  1062. goto exit_remove_files;
  1063. }
  1064. /* If PWM is in manual mode, add write permission */
  1065. if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
  1066. if ((err = sysfs_chmod_file(&pdev->dev.kobj,
  1067. f71805f_attr_pwm[i],
  1068. S_IRUGO | S_IWUSR))) {
  1069. dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
  1070. i + 1);
  1071. goto exit_remove_files;
  1072. }
  1073. }
  1074. }
  1075. data->class_dev = hwmon_device_register(&pdev->dev);
  1076. if (IS_ERR(data->class_dev)) {
  1077. err = PTR_ERR(data->class_dev);
  1078. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  1079. goto exit_remove_files;
  1080. }
  1081. return 0;
  1082. exit_remove_files:
  1083. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1084. for (i = 0; i < 4; i++)
  1085. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1086. for (i = 0; i < 3; i++)
  1087. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
  1088. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1089. exit_free:
  1090. platform_set_drvdata(pdev, NULL);
  1091. kfree(data);
  1092. exit:
  1093. return err;
  1094. }
  1095. static int __devexit f71805f_remove(struct platform_device *pdev)
  1096. {
  1097. struct f71805f_data *data = platform_get_drvdata(pdev);
  1098. int i;
  1099. platform_set_drvdata(pdev, NULL);
  1100. hwmon_device_unregister(data->class_dev);
  1101. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1102. for (i = 0; i < 4; i++)
  1103. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1104. for (i = 0; i < 3; i++)
  1105. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
  1106. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1107. kfree(data);
  1108. return 0;
  1109. }
  1110. static struct platform_driver f71805f_driver = {
  1111. .driver = {
  1112. .owner = THIS_MODULE,
  1113. .name = DRVNAME,
  1114. },
  1115. .probe = f71805f_probe,
  1116. .remove = __devexit_p(f71805f_remove),
  1117. };
  1118. static int __init f71805f_device_add(unsigned short address,
  1119. const struct f71805f_sio_data *sio_data)
  1120. {
  1121. struct resource res = {
  1122. .start = address,
  1123. .end = address + REGION_LENGTH - 1,
  1124. .flags = IORESOURCE_IO,
  1125. };
  1126. int err;
  1127. pdev = platform_device_alloc(DRVNAME, address);
  1128. if (!pdev) {
  1129. err = -ENOMEM;
  1130. printk(KERN_ERR DRVNAME ": Device allocation failed\n");
  1131. goto exit;
  1132. }
  1133. res.name = pdev->name;
  1134. err = platform_device_add_resources(pdev, &res, 1);
  1135. if (err) {
  1136. printk(KERN_ERR DRVNAME ": Device resource addition failed "
  1137. "(%d)\n", err);
  1138. goto exit_device_put;
  1139. }
  1140. pdev->dev.platform_data = kmalloc(sizeof(struct f71805f_sio_data),
  1141. GFP_KERNEL);
  1142. if (!pdev->dev.platform_data) {
  1143. err = -ENOMEM;
  1144. printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
  1145. goto exit_device_put;
  1146. }
  1147. memcpy(pdev->dev.platform_data, sio_data,
  1148. sizeof(struct f71805f_sio_data));
  1149. err = platform_device_add(pdev);
  1150. if (err) {
  1151. printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
  1152. err);
  1153. goto exit_kfree_data;
  1154. }
  1155. return 0;
  1156. exit_kfree_data:
  1157. kfree(pdev->dev.platform_data);
  1158. pdev->dev.platform_data = NULL;
  1159. exit_device_put:
  1160. platform_device_put(pdev);
  1161. exit:
  1162. return err;
  1163. }
  1164. static int __init f71805f_find(int sioaddr, unsigned short *address,
  1165. struct f71805f_sio_data *sio_data)
  1166. {
  1167. int err = -ENODEV;
  1168. u16 devid;
  1169. static const char *names[] = {
  1170. "F71805F/FG",
  1171. "F71872F/FG",
  1172. };
  1173. superio_enter(sioaddr);
  1174. devid = superio_inw(sioaddr, SIO_REG_MANID);
  1175. if (devid != SIO_FINTEK_ID)
  1176. goto exit;
  1177. devid = superio_inw(sioaddr, SIO_REG_DEVID);
  1178. switch (devid) {
  1179. case SIO_F71805F_ID:
  1180. sio_data->kind = f71805f;
  1181. break;
  1182. case SIO_F71872F_ID:
  1183. sio_data->kind = f71872f;
  1184. sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
  1185. break;
  1186. default:
  1187. printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
  1188. "skipping\n");
  1189. goto exit;
  1190. }
  1191. superio_select(sioaddr, F71805F_LD_HWM);
  1192. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  1193. printk(KERN_WARNING DRVNAME ": Device not activated, "
  1194. "skipping\n");
  1195. goto exit;
  1196. }
  1197. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  1198. if (*address == 0) {
  1199. printk(KERN_WARNING DRVNAME ": Base address not set, "
  1200. "skipping\n");
  1201. goto exit;
  1202. }
  1203. err = 0;
  1204. printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %u\n",
  1205. names[sio_data->kind], *address,
  1206. superio_inb(sioaddr, SIO_REG_DEVREV));
  1207. exit:
  1208. superio_exit(sioaddr);
  1209. return err;
  1210. }
  1211. static int __init f71805f_init(void)
  1212. {
  1213. int err;
  1214. unsigned short address;
  1215. struct f71805f_sio_data sio_data;
  1216. if (f71805f_find(0x2e, &address, &sio_data)
  1217. && f71805f_find(0x4e, &address, &sio_data))
  1218. return -ENODEV;
  1219. err = platform_driver_register(&f71805f_driver);
  1220. if (err)
  1221. goto exit;
  1222. /* Sets global pdev as a side effect */
  1223. err = f71805f_device_add(address, &sio_data);
  1224. if (err)
  1225. goto exit_driver;
  1226. return 0;
  1227. exit_driver:
  1228. platform_driver_unregister(&f71805f_driver);
  1229. exit:
  1230. return err;
  1231. }
  1232. static void __exit f71805f_exit(void)
  1233. {
  1234. kfree(pdev->dev.platform_data);
  1235. pdev->dev.platform_data = NULL;
  1236. platform_device_unregister(pdev);
  1237. platform_driver_unregister(&f71805f_driver);
  1238. }
  1239. MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
  1240. MODULE_LICENSE("GPL");
  1241. MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
  1242. module_init(f71805f_init);
  1243. module_exit(f71805f_exit);