config.c 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215
  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5272/config.c
  4. *
  5. * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
  6. * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
  7. */
  8. /***************************************************************************/
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. #include <asm/mcfuart.h>
  17. /***************************************************************************/
  18. extern unsigned int mcf_timervector;
  19. extern unsigned int mcf_profilevector;
  20. extern unsigned int mcf_timerlevel;
  21. /***************************************************************************/
  22. /*
  23. * Some platforms need software versions of the GPIO data registers.
  24. */
  25. unsigned short ppdata;
  26. unsigned char ledbank = 0xff;
  27. /***************************************************************************/
  28. static struct mcf_platform_uart m5272_uart_platform[] = {
  29. {
  30. .mapbase = MCF_MBAR + MCFUART_BASE1,
  31. .irq = 73,
  32. },
  33. {
  34. .mapbase = MCF_MBAR + MCFUART_BASE2,
  35. .irq = 74,
  36. },
  37. { },
  38. };
  39. static struct platform_device m5272_uart = {
  40. .name = "mcfuart",
  41. .id = 0,
  42. .dev.platform_data = m5272_uart_platform,
  43. };
  44. static struct resource m5272_fec_resources[] = {
  45. {
  46. .start = MCF_MBAR + 0x840,
  47. .end = MCF_MBAR + 0x840 + 0x1cf,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. {
  51. .start = 86,
  52. .end = 86,
  53. .flags = IORESOURCE_IRQ,
  54. },
  55. {
  56. .start = 87,
  57. .end = 87,
  58. .flags = IORESOURCE_IRQ,
  59. },
  60. {
  61. .start = 88,
  62. .end = 88,
  63. .flags = IORESOURCE_IRQ,
  64. },
  65. };
  66. static struct platform_device m5272_fec = {
  67. .name = "fec",
  68. .id = 0,
  69. .num_resources = ARRAY_SIZE(m5272_fec_resources),
  70. .resource = m5272_fec_resources,
  71. };
  72. static struct platform_device *m5272_devices[] __initdata = {
  73. &m5272_uart,
  74. &m5272_fec,
  75. };
  76. /***************************************************************************/
  77. static void __init m5272_uart_init_line(int line, int irq)
  78. {
  79. u32 v;
  80. if ((line >= 0) && (line < 2)) {
  81. v = (line) ? 0x0e000000 : 0xe0000000;
  82. writel(v, MCF_MBAR + MCFSIM_ICR2);
  83. /* Enable the output lines for the serial ports */
  84. v = readl(MCF_MBAR + MCFSIM_PBCNT);
  85. v = (v & ~0x000000ff) | 0x00000055;
  86. writel(v, MCF_MBAR + MCFSIM_PBCNT);
  87. v = readl(MCF_MBAR + MCFSIM_PDCNT);
  88. v = (v & ~0x000003fc) | 0x000002a8;
  89. writel(v, MCF_MBAR + MCFSIM_PDCNT);
  90. }
  91. }
  92. static void __init m5272_uarts_init(void)
  93. {
  94. const int nrlines = ARRAY_SIZE(m5272_uart_platform);
  95. int line;
  96. for (line = 0; (line < nrlines); line++)
  97. m5272_uart_init_line(line, m5272_uart_platform[line].irq);
  98. }
  99. /***************************************************************************/
  100. static void __init m5272_fec_init(void)
  101. {
  102. u32 imr;
  103. /* Unmask FEC interrupts at ColdFire interrupt controller */
  104. imr = readl(MCF_MBAR + MCFSIM_ICR3);
  105. imr = (imr & ~0x00000fff) | 0x00000ddd;
  106. writel(imr, MCF_MBAR + MCFSIM_ICR3);
  107. imr = readl(MCF_MBAR + MCFSIM_ICR1);
  108. imr = (imr & ~0x0f000000) | 0x0d000000;
  109. writel(imr, MCF_MBAR + MCFSIM_ICR1);
  110. }
  111. /***************************************************************************/
  112. void mcf_disableall(void)
  113. {
  114. volatile unsigned long *icrp;
  115. icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
  116. icrp[0] = 0x88888888;
  117. icrp[1] = 0x88888888;
  118. icrp[2] = 0x88888888;
  119. icrp[3] = 0x88888888;
  120. }
  121. /***************************************************************************/
  122. void mcf_settimericr(int timer, int level)
  123. {
  124. volatile unsigned long *icrp;
  125. if ((timer >= 1 ) && (timer <= 4)) {
  126. icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
  127. *icrp = (0x8 | level) << ((4 - timer) * 4);
  128. }
  129. }
  130. /***************************************************************************/
  131. static void m5272_cpu_reset(void)
  132. {
  133. local_irq_disable();
  134. /* Set watchdog to reset, and enabled */
  135. __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
  136. __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
  137. __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
  138. for (;;)
  139. /* wait for watchdog to timeout */;
  140. }
  141. /***************************************************************************/
  142. void __init config_BSP(char *commandp, int size)
  143. {
  144. #if defined (CONFIG_MOD5272)
  145. volatile unsigned char *pivrp;
  146. /* Set base of device vectors to be 64 */
  147. pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
  148. *pivrp = 0x40;
  149. #endif
  150. mcf_disableall();
  151. #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
  152. /* Copy command line from FLASH to local buffer... */
  153. memcpy(commandp, (char *) 0xf0004000, size);
  154. commandp[size-1] = 0;
  155. #elif defined(CONFIG_CANCam)
  156. /* Copy command line from FLASH to local buffer... */
  157. memcpy(commandp, (char *) 0xf0010000, size);
  158. commandp[size-1] = 0;
  159. #endif
  160. mcf_timervector = 69;
  161. mcf_profilevector = 70;
  162. mach_reset = m5272_cpu_reset;
  163. }
  164. /***************************************************************************/
  165. static int __init init_BSP(void)
  166. {
  167. m5272_uarts_init();
  168. m5272_fec_init();
  169. platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
  170. return 0;
  171. }
  172. arch_initcall(init_BSP);
  173. /***************************************************************************/