acpi_lpss.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431
  1. /*
  2. * ACPI support for Intel Lynxpoint LPSS.
  3. *
  4. * Copyright (C) 2013, Intel Corporation
  5. * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
  6. * Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/acpi.h>
  13. #include <linux/clk.h>
  14. #include <linux/clkdev.h>
  15. #include <linux/clk-provider.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/platform_data/clk-lpss.h>
  20. #include <linux/pm_runtime.h>
  21. #include "internal.h"
  22. ACPI_MODULE_NAME("acpi_lpss");
  23. #define LPSS_CLK_SIZE 0x04
  24. #define LPSS_LTR_SIZE 0x18
  25. /* Offsets relative to LPSS_PRIVATE_OFFSET */
  26. #define LPSS_GENERAL 0x08
  27. #define LPSS_GENERAL_LTR_MODE_SW BIT(2)
  28. #define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
  29. #define LPSS_SW_LTR 0x10
  30. #define LPSS_AUTO_LTR 0x14
  31. #define LPSS_TX_INT 0x20
  32. #define LPSS_TX_INT_MASK BIT(1)
  33. struct lpss_shared_clock {
  34. const char *name;
  35. unsigned long rate;
  36. struct clk *clk;
  37. };
  38. struct lpss_private_data;
  39. struct lpss_device_desc {
  40. bool clk_required;
  41. const char *clkdev_name;
  42. bool ltr_required;
  43. unsigned int prv_offset;
  44. size_t prv_size_override;
  45. bool clk_gate;
  46. struct lpss_shared_clock *shared_clock;
  47. void (*setup)(struct lpss_private_data *pdata);
  48. };
  49. static struct lpss_device_desc lpss_dma_desc = {
  50. .clk_required = true,
  51. .clkdev_name = "hclk",
  52. };
  53. struct lpss_private_data {
  54. void __iomem *mmio_base;
  55. resource_size_t mmio_size;
  56. struct clk *clk;
  57. const struct lpss_device_desc *dev_desc;
  58. };
  59. static void lpss_uart_setup(struct lpss_private_data *pdata)
  60. {
  61. unsigned int offset;
  62. u32 reg;
  63. offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
  64. reg = readl(pdata->mmio_base + offset);
  65. writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
  66. offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
  67. reg = readl(pdata->mmio_base + offset);
  68. writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
  69. }
  70. static struct lpss_device_desc lpt_dev_desc = {
  71. .clk_required = true,
  72. .prv_offset = 0x800,
  73. .ltr_required = true,
  74. .clk_gate = true,
  75. };
  76. static struct lpss_device_desc lpt_uart_dev_desc = {
  77. .clk_required = true,
  78. .prv_offset = 0x800,
  79. .ltr_required = true,
  80. .clk_gate = true,
  81. .setup = lpss_uart_setup,
  82. };
  83. static struct lpss_device_desc lpt_sdio_dev_desc = {
  84. .prv_offset = 0x1000,
  85. .prv_size_override = 0x1018,
  86. .ltr_required = true,
  87. };
  88. static struct lpss_shared_clock uart_clock = {
  89. .name = "uart_clk",
  90. .rate = 44236800,
  91. };
  92. static struct lpss_device_desc byt_uart_dev_desc = {
  93. .clk_required = true,
  94. .prv_offset = 0x800,
  95. .clk_gate = true,
  96. .shared_clock = &uart_clock,
  97. .setup = lpss_uart_setup,
  98. };
  99. static struct lpss_shared_clock spi_clock = {
  100. .name = "spi_clk",
  101. .rate = 50000000,
  102. };
  103. static struct lpss_device_desc byt_spi_dev_desc = {
  104. .clk_required = true,
  105. .prv_offset = 0x400,
  106. .clk_gate = true,
  107. .shared_clock = &spi_clock,
  108. };
  109. static struct lpss_device_desc byt_sdio_dev_desc = {
  110. .clk_required = true,
  111. };
  112. static struct lpss_shared_clock i2c_clock = {
  113. .name = "i2c_clk",
  114. .rate = 100000000,
  115. };
  116. static struct lpss_device_desc byt_i2c_dev_desc = {
  117. .clk_required = true,
  118. .prv_offset = 0x800,
  119. .shared_clock = &i2c_clock,
  120. };
  121. static const struct acpi_device_id acpi_lpss_device_ids[] = {
  122. /* Generic LPSS devices */
  123. { "INTL9C60", (unsigned long)&lpss_dma_desc },
  124. /* Lynxpoint LPSS devices */
  125. { "INT33C0", (unsigned long)&lpt_dev_desc },
  126. { "INT33C1", (unsigned long)&lpt_dev_desc },
  127. { "INT33C2", (unsigned long)&lpt_dev_desc },
  128. { "INT33C3", (unsigned long)&lpt_dev_desc },
  129. { "INT33C4", (unsigned long)&lpt_uart_dev_desc },
  130. { "INT33C5", (unsigned long)&lpt_uart_dev_desc },
  131. { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
  132. { "INT33C7", },
  133. /* BayTrail LPSS devices */
  134. { "80860F0A", (unsigned long)&byt_uart_dev_desc },
  135. { "80860F0E", (unsigned long)&byt_spi_dev_desc },
  136. { "80860F14", (unsigned long)&byt_sdio_dev_desc },
  137. { "80860F41", (unsigned long)&byt_i2c_dev_desc },
  138. { "INT33B2", },
  139. { }
  140. };
  141. static int is_memory(struct acpi_resource *res, void *not_used)
  142. {
  143. struct resource r;
  144. return !acpi_dev_resource_memory(res, &r);
  145. }
  146. /* LPSS main clock device. */
  147. static struct platform_device *lpss_clk_dev;
  148. static inline void lpt_register_clock_device(void)
  149. {
  150. lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
  151. }
  152. static int register_device_clock(struct acpi_device *adev,
  153. struct lpss_private_data *pdata)
  154. {
  155. const struct lpss_device_desc *dev_desc = pdata->dev_desc;
  156. struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
  157. struct clk *clk = ERR_PTR(-ENODEV);
  158. struct lpss_clk_data *clk_data;
  159. const char *parent;
  160. if (!lpss_clk_dev)
  161. lpt_register_clock_device();
  162. clk_data = platform_get_drvdata(lpss_clk_dev);
  163. if (!clk_data)
  164. return -ENODEV;
  165. if (dev_desc->clkdev_name) {
  166. clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
  167. dev_name(&adev->dev));
  168. return 0;
  169. }
  170. if (!pdata->mmio_base
  171. || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
  172. return -ENODATA;
  173. parent = clk_data->name;
  174. if (shared_clock) {
  175. clk = shared_clock->clk;
  176. if (!clk) {
  177. clk = clk_register_fixed_rate(NULL, shared_clock->name,
  178. "lpss_clk", 0,
  179. shared_clock->rate);
  180. shared_clock->clk = clk;
  181. }
  182. parent = shared_clock->name;
  183. }
  184. if (dev_desc->clk_gate) {
  185. clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
  186. pdata->mmio_base + dev_desc->prv_offset,
  187. 0, 0, NULL);
  188. pdata->clk = clk;
  189. }
  190. if (IS_ERR(clk))
  191. return PTR_ERR(clk);
  192. clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
  193. return 0;
  194. }
  195. static int acpi_lpss_create_device(struct acpi_device *adev,
  196. const struct acpi_device_id *id)
  197. {
  198. struct lpss_device_desc *dev_desc;
  199. struct lpss_private_data *pdata;
  200. struct resource_list_entry *rentry;
  201. struct list_head resource_list;
  202. int ret;
  203. dev_desc = (struct lpss_device_desc *)id->driver_data;
  204. if (!dev_desc)
  205. return acpi_create_platform_device(adev, id);
  206. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  207. if (!pdata)
  208. return -ENOMEM;
  209. INIT_LIST_HEAD(&resource_list);
  210. ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
  211. if (ret < 0)
  212. goto err_out;
  213. list_for_each_entry(rentry, &resource_list, node)
  214. if (resource_type(&rentry->res) == IORESOURCE_MEM) {
  215. if (dev_desc->prv_size_override)
  216. pdata->mmio_size = dev_desc->prv_size_override;
  217. else
  218. pdata->mmio_size = resource_size(&rentry->res);
  219. pdata->mmio_base = ioremap(rentry->res.start,
  220. pdata->mmio_size);
  221. break;
  222. }
  223. acpi_dev_free_resource_list(&resource_list);
  224. pdata->dev_desc = dev_desc;
  225. if (dev_desc->clk_required) {
  226. ret = register_device_clock(adev, pdata);
  227. if (ret) {
  228. /* Skip the device, but continue the namespace scan. */
  229. ret = 0;
  230. goto err_out;
  231. }
  232. }
  233. /*
  234. * This works around a known issue in ACPI tables where LPSS devices
  235. * have _PS0 and _PS3 without _PSC (and no power resources), so
  236. * acpi_bus_init_power() will assume that the BIOS has put them into D0.
  237. */
  238. ret = acpi_device_fix_up_power(adev);
  239. if (ret) {
  240. /* Skip the device, but continue the namespace scan. */
  241. ret = 0;
  242. goto err_out;
  243. }
  244. if (dev_desc->setup)
  245. dev_desc->setup(pdata);
  246. adev->driver_data = pdata;
  247. ret = acpi_create_platform_device(adev, id);
  248. if (ret > 0)
  249. return ret;
  250. adev->driver_data = NULL;
  251. err_out:
  252. kfree(pdata);
  253. return ret;
  254. }
  255. static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
  256. {
  257. struct acpi_device *adev;
  258. struct lpss_private_data *pdata;
  259. unsigned long flags;
  260. int ret;
  261. ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
  262. if (WARN_ON(ret))
  263. return ret;
  264. spin_lock_irqsave(&dev->power.lock, flags);
  265. if (pm_runtime_suspended(dev)) {
  266. ret = -EAGAIN;
  267. goto out;
  268. }
  269. pdata = acpi_driver_data(adev);
  270. if (WARN_ON(!pdata || !pdata->mmio_base)) {
  271. ret = -ENODEV;
  272. goto out;
  273. }
  274. *val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
  275. out:
  276. spin_unlock_irqrestore(&dev->power.lock, flags);
  277. return ret;
  278. }
  279. static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
  280. char *buf)
  281. {
  282. u32 ltr_value = 0;
  283. unsigned int reg;
  284. int ret;
  285. reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
  286. ret = lpss_reg_read(dev, reg, &ltr_value);
  287. if (ret)
  288. return ret;
  289. return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
  290. }
  291. static ssize_t lpss_ltr_mode_show(struct device *dev,
  292. struct device_attribute *attr, char *buf)
  293. {
  294. u32 ltr_mode = 0;
  295. char *outstr;
  296. int ret;
  297. ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
  298. if (ret)
  299. return ret;
  300. outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
  301. return sprintf(buf, "%s\n", outstr);
  302. }
  303. static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
  304. static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
  305. static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
  306. static struct attribute *lpss_attrs[] = {
  307. &dev_attr_auto_ltr.attr,
  308. &dev_attr_sw_ltr.attr,
  309. &dev_attr_ltr_mode.attr,
  310. NULL,
  311. };
  312. static struct attribute_group lpss_attr_group = {
  313. .attrs = lpss_attrs,
  314. .name = "lpss_ltr",
  315. };
  316. static int acpi_lpss_platform_notify(struct notifier_block *nb,
  317. unsigned long action, void *data)
  318. {
  319. struct platform_device *pdev = to_platform_device(data);
  320. struct lpss_private_data *pdata;
  321. struct acpi_device *adev;
  322. const struct acpi_device_id *id;
  323. int ret = 0;
  324. id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
  325. if (!id || !id->driver_data)
  326. return 0;
  327. if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
  328. return 0;
  329. pdata = acpi_driver_data(adev);
  330. if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
  331. return 0;
  332. if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
  333. dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
  334. return 0;
  335. }
  336. if (action == BUS_NOTIFY_ADD_DEVICE)
  337. ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
  338. else if (action == BUS_NOTIFY_DEL_DEVICE)
  339. sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
  340. return ret;
  341. }
  342. static struct notifier_block acpi_lpss_nb = {
  343. .notifier_call = acpi_lpss_platform_notify,
  344. };
  345. static struct acpi_scan_handler lpss_handler = {
  346. .ids = acpi_lpss_device_ids,
  347. .attach = acpi_lpss_create_device,
  348. };
  349. void __init acpi_lpss_init(void)
  350. {
  351. if (!lpt_clk_init()) {
  352. bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
  353. acpi_scan_add_handler(&lpss_handler);
  354. }
  355. }