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- * Synopsys Designware DMA Controller
- Required properties:
- - compatible: "snps,dma-spear1340"
- - reg: Address range of the DMAC registers
- - interrupt-parent: Should be the phandle for the interrupt controller
- that services interrupts for this device
- - interrupt: Should contain the DMAC interrupt number
- - nr_channels: Number of channels supported by hardware
- - is_private: The device channels should be marked as private and not for by the
- general purpose DMA channel allocator. False if not passed.
- - chan_allocation_order: order of allocation of channel, 0 (default): ascending,
- 1: descending
- - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
- increase from chan n->0
- - block_size: Maximum block size supported by the controller
- - nr_masters: Number of AHB masters supported by the controller
- - data_width: Maximum data width supported by hardware per AHB master
- (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
- - slave_info:
- - bus_id: name of this device channel, not just a device name since
- devices may have more than one channel e.g. "foo_tx". For using the
- dw_generic_filter(), slave drivers must pass exactly this string as
- param to filter function.
- - cfg_hi: Platform-specific initializer for the CFG_HI register
- - cfg_lo: Platform-specific initializer for the CFG_LO register
- - src_master: src master for transfers on allocated channel.
- - dst_master: dest master for transfers on allocated channel.
- Example:
- dma@fc000000 {
- compatible = "snps,dma-spear1340";
- reg = <0xfc000000 0x1000>;
- interrupt-parent = <&vic1>;
- interrupts = <12>;
- nr_channels = <8>;
- chan_allocation_order = <1>;
- chan_priority = <1>;
- block_size = <0xfff>;
- nr_masters = <2>;
- data_width = <3 3 0 0>;
- slave_info {
- uart0-tx {
- bus_id = "uart0-tx";
- cfg_hi = <0x4000>; /* 0x8 << 11 */
- cfg_lo = <0>;
- src_master = <0>;
- dst_master = <1>;
- };
- spi0-tx {
- bus_id = "spi0-tx";
- cfg_hi = <0x2000>; /* 0x4 << 11 */
- cfg_lo = <0>;
- src_master = <0>;
- dst_master = <0>;
- };
- };
- };
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