pio.c 20 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PIO data transfer
  4. Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "pio.h"
  20. #include "dma.h"
  21. #include "main.h"
  22. #include "xmit.h"
  23. #include <linux/delay.h>
  24. static void b43_pio_rx_work(struct work_struct *work);
  25. static u16 generate_cookie(struct b43_pio_txqueue *q,
  26. struct b43_pio_txpacket *pack)
  27. {
  28. u16 cookie;
  29. /* Use the upper 4 bits of the cookie as
  30. * PIO controller ID and store the packet index number
  31. * in the lower 12 bits.
  32. * Note that the cookie must never be 0, as this
  33. * is a special value used in RX path.
  34. * It can also not be 0xFFFF because that is special
  35. * for multicast frames.
  36. */
  37. cookie = (((u16)q->index + 1) << 12);
  38. cookie |= pack->index;
  39. return cookie;
  40. }
  41. static
  42. struct b43_pio_txqueue * parse_cookie(struct b43_wldev *dev,
  43. u16 cookie,
  44. struct b43_pio_txpacket **pack)
  45. {
  46. struct b43_pio *pio = &dev->pio;
  47. struct b43_pio_txqueue *q = NULL;
  48. unsigned int pack_index;
  49. switch (cookie & 0xF000) {
  50. case 0x1000:
  51. q = pio->tx_queue_AC_BK;
  52. break;
  53. case 0x2000:
  54. q = pio->tx_queue_AC_BE;
  55. break;
  56. case 0x3000:
  57. q = pio->tx_queue_AC_VI;
  58. break;
  59. case 0x4000:
  60. q = pio->tx_queue_AC_VO;
  61. break;
  62. case 0x5000:
  63. q = pio->tx_queue_mcast;
  64. break;
  65. }
  66. if (B43_WARN_ON(!q))
  67. return NULL;
  68. pack_index = (cookie & 0x0FFF);
  69. if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
  70. return NULL;
  71. *pack = &q->packets[pack_index];
  72. return q;
  73. }
  74. static u16 index_to_pioqueue_base(struct b43_wldev *dev,
  75. unsigned int index)
  76. {
  77. static const u16 bases[] = {
  78. B43_MMIO_PIO_BASE0,
  79. B43_MMIO_PIO_BASE1,
  80. B43_MMIO_PIO_BASE2,
  81. B43_MMIO_PIO_BASE3,
  82. B43_MMIO_PIO_BASE4,
  83. B43_MMIO_PIO_BASE5,
  84. B43_MMIO_PIO_BASE6,
  85. B43_MMIO_PIO_BASE7,
  86. };
  87. static const u16 bases_rev11[] = {
  88. B43_MMIO_PIO11_BASE0,
  89. B43_MMIO_PIO11_BASE1,
  90. B43_MMIO_PIO11_BASE2,
  91. B43_MMIO_PIO11_BASE3,
  92. B43_MMIO_PIO11_BASE4,
  93. B43_MMIO_PIO11_BASE5,
  94. };
  95. if (dev->dev->id.revision >= 11) {
  96. B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
  97. return bases_rev11[index];
  98. }
  99. B43_WARN_ON(index >= ARRAY_SIZE(bases));
  100. return bases[index];
  101. }
  102. static u16 pio_txqueue_offset(struct b43_wldev *dev)
  103. {
  104. if (dev->dev->id.revision >= 11)
  105. return 0x18;
  106. return 0;
  107. }
  108. static u16 pio_rxqueue_offset(struct b43_wldev *dev)
  109. {
  110. if (dev->dev->id.revision >= 11)
  111. return 0x38;
  112. return 8;
  113. }
  114. static struct b43_pio_txqueue * b43_setup_pioqueue_tx(struct b43_wldev *dev,
  115. unsigned int index)
  116. {
  117. struct b43_pio_txqueue *q;
  118. struct b43_pio_txpacket *p;
  119. unsigned int i;
  120. q = kzalloc(sizeof(*q), GFP_KERNEL);
  121. if (!q)
  122. return NULL;
  123. spin_lock_init(&q->lock);
  124. q->dev = dev;
  125. q->rev = dev->dev->id.revision;
  126. q->mmio_base = index_to_pioqueue_base(dev, index) +
  127. pio_txqueue_offset(dev);
  128. q->index = index;
  129. q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
  130. if (q->rev >= 8) {
  131. q->buffer_size = 1920; //FIXME this constant is wrong.
  132. } else {
  133. q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
  134. q->buffer_size -= 80;
  135. }
  136. INIT_LIST_HEAD(&q->packets_list);
  137. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  138. p = &(q->packets[i]);
  139. INIT_LIST_HEAD(&p->list);
  140. p->index = i;
  141. p->queue = q;
  142. list_add(&p->list, &q->packets_list);
  143. }
  144. return q;
  145. }
  146. static struct b43_pio_rxqueue * b43_setup_pioqueue_rx(struct b43_wldev *dev,
  147. unsigned int index)
  148. {
  149. struct b43_pio_rxqueue *q;
  150. q = kzalloc(sizeof(*q), GFP_KERNEL);
  151. if (!q)
  152. return NULL;
  153. spin_lock_init(&q->lock);
  154. q->dev = dev;
  155. q->rev = dev->dev->id.revision;
  156. q->mmio_base = index_to_pioqueue_base(dev, index) +
  157. pio_rxqueue_offset(dev);
  158. INIT_WORK(&q->rx_work, b43_pio_rx_work);
  159. /* Enable Direct FIFO RX (PIO) on the engine. */
  160. b43_dma_direct_fifo_rx(dev, index, 1);
  161. return q;
  162. }
  163. static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
  164. {
  165. struct b43_pio_txpacket *pack;
  166. unsigned int i;
  167. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  168. pack = &(q->packets[i]);
  169. if (pack->skb) {
  170. dev_kfree_skb_any(pack->skb);
  171. pack->skb = NULL;
  172. }
  173. }
  174. }
  175. static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
  176. const char *name)
  177. {
  178. if (!q)
  179. return;
  180. b43_pio_cancel_tx_packets(q);
  181. kfree(q);
  182. }
  183. static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
  184. const char *name)
  185. {
  186. if (!q)
  187. return;
  188. kfree(q);
  189. }
  190. #define destroy_queue_tx(pio, queue) do { \
  191. b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
  192. (pio)->queue = NULL; \
  193. } while (0)
  194. #define destroy_queue_rx(pio, queue) do { \
  195. b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
  196. (pio)->queue = NULL; \
  197. } while (0)
  198. void b43_pio_free(struct b43_wldev *dev)
  199. {
  200. struct b43_pio *pio;
  201. if (!b43_using_pio_transfers(dev))
  202. return;
  203. pio = &dev->pio;
  204. destroy_queue_rx(pio, rx_queue);
  205. destroy_queue_tx(pio, tx_queue_mcast);
  206. destroy_queue_tx(pio, tx_queue_AC_VO);
  207. destroy_queue_tx(pio, tx_queue_AC_VI);
  208. destroy_queue_tx(pio, tx_queue_AC_BE);
  209. destroy_queue_tx(pio, tx_queue_AC_BK);
  210. }
  211. void b43_pio_stop(struct b43_wldev *dev)
  212. {
  213. if (!b43_using_pio_transfers(dev))
  214. return;
  215. cancel_work_sync(&dev->pio.rx_queue->rx_work);
  216. }
  217. int b43_pio_init(struct b43_wldev *dev)
  218. {
  219. struct b43_pio *pio = &dev->pio;
  220. int err = -ENOMEM;
  221. b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
  222. & ~B43_MACCTL_BE);
  223. b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
  224. pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
  225. if (!pio->tx_queue_AC_BK)
  226. goto out;
  227. pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
  228. if (!pio->tx_queue_AC_BE)
  229. goto err_destroy_bk;
  230. pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
  231. if (!pio->tx_queue_AC_VI)
  232. goto err_destroy_be;
  233. pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
  234. if (!pio->tx_queue_AC_VO)
  235. goto err_destroy_vi;
  236. pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
  237. if (!pio->tx_queue_mcast)
  238. goto err_destroy_vo;
  239. pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
  240. if (!pio->rx_queue)
  241. goto err_destroy_mcast;
  242. b43dbg(dev->wl, "PIO initialized\n");
  243. err = 0;
  244. out:
  245. return err;
  246. err_destroy_mcast:
  247. destroy_queue_tx(pio, tx_queue_mcast);
  248. err_destroy_vo:
  249. destroy_queue_tx(pio, tx_queue_AC_VO);
  250. err_destroy_vi:
  251. destroy_queue_tx(pio, tx_queue_AC_VI);
  252. err_destroy_be:
  253. destroy_queue_tx(pio, tx_queue_AC_BE);
  254. err_destroy_bk:
  255. destroy_queue_tx(pio, tx_queue_AC_BK);
  256. return err;
  257. }
  258. /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
  259. static struct b43_pio_txqueue * select_queue_by_priority(struct b43_wldev *dev,
  260. u8 queue_prio)
  261. {
  262. struct b43_pio_txqueue *q;
  263. if (b43_modparam_qos) {
  264. /* 0 = highest priority */
  265. switch (queue_prio) {
  266. default:
  267. B43_WARN_ON(1);
  268. /* fallthrough */
  269. case 0:
  270. q = dev->pio.tx_queue_AC_VO;
  271. break;
  272. case 1:
  273. q = dev->pio.tx_queue_AC_VI;
  274. break;
  275. case 2:
  276. q = dev->pio.tx_queue_AC_BE;
  277. break;
  278. case 3:
  279. q = dev->pio.tx_queue_AC_BK;
  280. break;
  281. }
  282. } else
  283. q = dev->pio.tx_queue_AC_BE;
  284. return q;
  285. }
  286. static inline void tx_write_2byte_queue(struct b43_pio_txqueue *q,
  287. u16 *ctl,
  288. const void *_data,
  289. unsigned int data_len)
  290. {
  291. const u8 *data = _data;
  292. unsigned int i;
  293. u16 value;
  294. *ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
  295. b43_piotx_write16(q, B43_PIO_TXCTL, *ctl);
  296. for (i = 0; i < data_len; i += 2) {
  297. value = data[i];
  298. if (i + 1 < data_len) {
  299. value |= (u16)(data[i + 1]) << 8;
  300. } else {
  301. *ctl &= ~B43_PIO_TXCTL_WRITEHI;
  302. b43_piotx_write16(q, B43_PIO_TXCTL, *ctl);
  303. }
  304. b43_piotx_write16(q, B43_PIO_TXDATA, value);
  305. }
  306. }
  307. static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
  308. const u8 *hdr, unsigned int hdrlen)
  309. {
  310. struct b43_pio_txqueue *q = pack->queue;
  311. const char *frame = pack->skb->data;
  312. unsigned int frame_len = pack->skb->len;
  313. u16 ctl;
  314. ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
  315. ctl |= B43_PIO_TXCTL_FREADY;
  316. ctl &= ~B43_PIO_TXCTL_EOF;
  317. /* Transfer the header data. */
  318. tx_write_2byte_queue(q, &ctl, hdr, hdrlen);
  319. /* Transfer the frame data. */
  320. tx_write_2byte_queue(q, &ctl, frame, frame_len);
  321. ctl |= B43_PIO_TXCTL_EOF;
  322. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  323. }
  324. static inline void tx_write_4byte_queue(struct b43_pio_txqueue *q,
  325. u32 *ctl,
  326. const void *_data,
  327. unsigned int data_len)
  328. {
  329. const u8 *data = _data;
  330. unsigned int i;
  331. u32 value;
  332. bool ctl_changed = 0;
  333. *ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
  334. B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
  335. b43_piotx_write32(q, B43_PIO8_TXCTL, *ctl);
  336. for (i = 0; i < data_len; i += 4) {
  337. value = data[i];
  338. if (i + 1 < data_len) {
  339. value |= (u32)(data[i + 1]) << 8;
  340. } else {
  341. *ctl &= ~B43_PIO8_TXCTL_8_15;
  342. ctl_changed = 1;
  343. }
  344. if (i + 2 < data_len) {
  345. value |= (u32)(data[i + 2]) << 16;
  346. } else {
  347. *ctl &= ~B43_PIO8_TXCTL_16_23;
  348. ctl_changed = 1;
  349. }
  350. if (i + 3 < data_len) {
  351. value |= (u32)(data[i + 3]) << 24;
  352. } else {
  353. *ctl &= ~B43_PIO8_TXCTL_24_31;
  354. ctl_changed = 1;
  355. }
  356. if (ctl_changed)
  357. b43_piotx_write32(q, B43_PIO8_TXCTL, *ctl);
  358. b43_piotx_write32(q, B43_PIO8_TXDATA, value);
  359. }
  360. }
  361. static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
  362. const u8 *hdr, unsigned int hdrlen)
  363. {
  364. struct b43_pio_txqueue *q = pack->queue;
  365. const char *frame = pack->skb->data;
  366. unsigned int frame_len = pack->skb->len;
  367. u32 ctl;
  368. ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
  369. ctl |= B43_PIO8_TXCTL_FREADY;
  370. ctl &= ~B43_PIO8_TXCTL_EOF;
  371. /* Transfer the header data. */
  372. tx_write_4byte_queue(q, &ctl, hdr, hdrlen);
  373. /* Transfer the frame data. */
  374. tx_write_4byte_queue(q, &ctl, frame, frame_len);
  375. ctl |= B43_PIO8_TXCTL_EOF;
  376. b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
  377. }
  378. static int pio_tx_frame(struct b43_pio_txqueue *q,
  379. struct sk_buff *skb,
  380. struct ieee80211_tx_control *ctl)
  381. {
  382. struct b43_pio_txpacket *pack;
  383. struct b43_txhdr txhdr;
  384. u16 cookie;
  385. int err;
  386. unsigned int hdrlen;
  387. B43_WARN_ON(list_empty(&q->packets_list));
  388. pack = list_entry(q->packets_list.next,
  389. struct b43_pio_txpacket, list);
  390. memset(&pack->txstat, 0, sizeof(pack->txstat));
  391. memcpy(&pack->txstat.control, ctl, sizeof(*ctl));
  392. cookie = generate_cookie(q, pack);
  393. hdrlen = b43_txhdr_size(q->dev);
  394. err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb->data,
  395. skb->len, ctl, cookie);
  396. if (err)
  397. return err;
  398. if (ctl->flags & IEEE80211_TXCTL_SEND_AFTER_DTIM) {
  399. /* Tell the firmware about the cookie of the last
  400. * mcast frame, so it can clear the more-data bit in it. */
  401. b43_shm_write16(q->dev, B43_SHM_SHARED,
  402. B43_SHM_SH_MCASTCOOKIE, cookie);
  403. }
  404. pack->skb = skb;
  405. if (q->rev >= 8)
  406. pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen);
  407. else
  408. pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen);
  409. /* Remove it from the list of available packet slots.
  410. * It will be put back when we receive the status report. */
  411. list_del(&pack->list);
  412. /* Update the queue statistics. */
  413. q->buffer_used += roundup(skb->len + hdrlen, 4);
  414. q->free_packet_slots -= 1;
  415. return 0;
  416. }
  417. int b43_pio_tx(struct b43_wldev *dev,
  418. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  419. {
  420. struct b43_pio_txqueue *q;
  421. struct ieee80211_hdr *hdr;
  422. unsigned long flags;
  423. unsigned int hdrlen, total_len;
  424. int err = 0;
  425. hdr = (struct ieee80211_hdr *)skb->data;
  426. if (ctl->flags & IEEE80211_TXCTL_SEND_AFTER_DTIM) {
  427. /* The multicast queue will be sent after the DTIM. */
  428. q = dev->pio.tx_queue_mcast;
  429. /* Set the frame More-Data bit. Ucode will clear it
  430. * for us on the last frame. */
  431. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  432. } else {
  433. /* Decide by priority where to put this frame. */
  434. q = select_queue_by_priority(dev, ctl->queue);
  435. }
  436. spin_lock_irqsave(&q->lock, flags);
  437. hdrlen = b43_txhdr_size(dev);
  438. total_len = roundup(skb->len + hdrlen, 4);
  439. if (unlikely(total_len > q->buffer_size)) {
  440. err = -ENOBUFS;
  441. b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
  442. goto out_unlock;
  443. }
  444. if (unlikely(q->free_packet_slots == 0)) {
  445. err = -ENOBUFS;
  446. b43warn(dev->wl, "PIO: TX packet overflow.\n");
  447. goto out_unlock;
  448. }
  449. B43_WARN_ON(q->buffer_used > q->buffer_size);
  450. if (total_len > (q->buffer_size - q->buffer_used)) {
  451. /* Not enough memory on the queue. */
  452. err = -EBUSY;
  453. ieee80211_stop_queue(dev->wl->hw, ctl->queue);
  454. q->stopped = 1;
  455. goto out_unlock;
  456. }
  457. /* Assign the queue number to the ring (if not already done before)
  458. * so TX status handling can use it. The mac80211-queue to b43-queue
  459. * mapping is static, so we don't need to store it per frame. */
  460. q->queue_prio = ctl->queue;
  461. err = pio_tx_frame(q, skb, ctl);
  462. if (unlikely(err == -ENOKEY)) {
  463. /* Drop this packet, as we don't have the encryption key
  464. * anymore and must not transmit it unencrypted. */
  465. dev_kfree_skb_any(skb);
  466. err = 0;
  467. goto out_unlock;
  468. }
  469. if (unlikely(err)) {
  470. b43err(dev->wl, "PIO transmission failure\n");
  471. goto out_unlock;
  472. }
  473. q->nr_tx_packets++;
  474. B43_WARN_ON(q->buffer_used > q->buffer_size);
  475. if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
  476. (q->free_packet_slots == 0)) {
  477. /* The queue is full. */
  478. ieee80211_stop_queue(dev->wl->hw, ctl->queue);
  479. q->stopped = 1;
  480. }
  481. out_unlock:
  482. spin_unlock_irqrestore(&q->lock, flags);
  483. return err;
  484. }
  485. /* Called with IRQs disabled. */
  486. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  487. const struct b43_txstatus *status)
  488. {
  489. struct b43_pio_txqueue *q;
  490. struct b43_pio_txpacket *pack = NULL;
  491. unsigned int total_len;
  492. q = parse_cookie(dev, status->cookie, &pack);
  493. if (unlikely(!q))
  494. return;
  495. B43_WARN_ON(!pack);
  496. spin_lock(&q->lock); /* IRQs are already disabled. */
  497. b43_fill_txstatus_report(&(pack->txstat), status);
  498. total_len = pack->skb->len + b43_txhdr_size(dev);
  499. total_len = roundup(total_len, 4);
  500. q->buffer_used -= total_len;
  501. q->free_packet_slots += 1;
  502. ieee80211_tx_status_irqsafe(dev->wl->hw, pack->skb,
  503. &(pack->txstat));
  504. pack->skb = NULL;
  505. list_add(&pack->list, &q->packets_list);
  506. if (q->stopped) {
  507. ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
  508. q->stopped = 0;
  509. }
  510. spin_unlock(&q->lock);
  511. }
  512. void b43_pio_get_tx_stats(struct b43_wldev *dev,
  513. struct ieee80211_tx_queue_stats *stats)
  514. {
  515. const int nr_queues = dev->wl->hw->queues;
  516. struct b43_pio_txqueue *q;
  517. struct ieee80211_tx_queue_stats_data *data;
  518. unsigned long flags;
  519. int i;
  520. for (i = 0; i < nr_queues; i++) {
  521. data = &(stats->data[i]);
  522. q = select_queue_by_priority(dev, i);
  523. spin_lock_irqsave(&q->lock, flags);
  524. data->len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
  525. data->limit = B43_PIO_MAX_NR_TXPACKETS;
  526. data->count = q->nr_tx_packets;
  527. spin_unlock_irqrestore(&q->lock, flags);
  528. }
  529. }
  530. /* Returns whether we should fetch another frame. */
  531. static bool pio_rx_frame(struct b43_pio_rxqueue *q)
  532. {
  533. struct b43_rxhdr_fw4 rxhdr;
  534. u16 len;
  535. u32 macstat;
  536. unsigned int i, padding;
  537. struct sk_buff *skb;
  538. const char *err_msg = NULL;
  539. memset(&rxhdr, 0, sizeof(rxhdr));
  540. /* Check if we have data and wait for it to get ready. */
  541. if (q->rev >= 8) {
  542. u32 ctl;
  543. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  544. if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
  545. return 0;
  546. b43_piorx_write32(q, B43_PIO8_RXCTL,
  547. B43_PIO8_RXCTL_FRAMERDY);
  548. for (i = 0; i < 10; i++) {
  549. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  550. if (ctl & B43_PIO8_RXCTL_DATARDY)
  551. goto data_ready;
  552. udelay(10);
  553. }
  554. } else {
  555. u16 ctl;
  556. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  557. if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
  558. return 0;
  559. b43_piorx_write16(q, B43_PIO_RXCTL,
  560. B43_PIO_RXCTL_FRAMERDY);
  561. for (i = 0; i < 10; i++) {
  562. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  563. if (ctl & B43_PIO_RXCTL_DATARDY)
  564. goto data_ready;
  565. udelay(10);
  566. }
  567. }
  568. b43dbg(q->dev->wl, "PIO RX timed out\n");
  569. return 1;
  570. data_ready:
  571. /* Get the preamble (RX header) */
  572. if (q->rev >= 8) {
  573. u32 *preamble = (u32 *)&rxhdr;
  574. u32 value;
  575. for (i = 0; i < sizeof(rxhdr); i += 4) {
  576. value = b43_piorx_read32(q, B43_PIO8_RXDATA);
  577. preamble[i / 4] = cpu_to_le32(value);
  578. }
  579. } else {
  580. u16 *preamble = (u16 *)&rxhdr;
  581. u16 value;
  582. for (i = 0; i < sizeof(rxhdr); i += 2) {
  583. value = b43_piorx_read16(q, B43_PIO_RXDATA);
  584. preamble[i / 2] = cpu_to_le16(value);
  585. }
  586. }
  587. /* Sanity checks. */
  588. len = le16_to_cpu(rxhdr.frame_len);
  589. if (unlikely(len > 0x700)) {
  590. err_msg = "len > 0x700";
  591. goto rx_error;
  592. }
  593. if (unlikely(len == 0)) {
  594. err_msg = "len == 0";
  595. goto rx_error;
  596. }
  597. macstat = le32_to_cpu(rxhdr.mac_status);
  598. if (macstat & B43_RX_MAC_FCSERR) {
  599. if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
  600. /* Drop frames with failed FCS. */
  601. err_msg = "Frame FCS error";
  602. goto rx_error;
  603. }
  604. }
  605. /* We always pad 2 bytes, as that's what upstream code expects
  606. * due to the RX-header being 30 bytes. In case the frame is
  607. * unaligned, we pad another 2 bytes. */
  608. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  609. skb = dev_alloc_skb(len + padding + 2);
  610. if (unlikely(!skb)) {
  611. err_msg = "Out of memory";
  612. goto rx_error;
  613. }
  614. skb_reserve(skb, 2);
  615. skb_put(skb, len + padding);
  616. if (q->rev >= 8) {
  617. u32 value;
  618. for (i = padding; i < len + padding; i += 4) {
  619. value = b43_piorx_read32(q, B43_PIO8_RXDATA);
  620. skb->data[i] = value;
  621. if ((i + 1) < (len + padding))
  622. skb->data[i + 1] = value >> 8;
  623. if ((i + 2) < (len + padding))
  624. skb->data[i + 2] = value >> 16;
  625. if ((i + 3) < (len + padding))
  626. skb->data[i + 3] = value >> 24;
  627. }
  628. } else {
  629. u16 value;
  630. for (i = padding; i < len + padding; i += 2) {
  631. value = b43_piorx_read16(q, B43_PIO_RXDATA);
  632. skb->data[i] = value;
  633. if ((i + 1) < (len + padding))
  634. skb->data[i + 1] = value >> 8;
  635. }
  636. }
  637. b43_rx(q->dev, skb, &rxhdr);
  638. return 1;
  639. rx_error:
  640. if (err_msg)
  641. b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
  642. b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
  643. return 1;
  644. }
  645. /* RX workqueue. We can sleep, yay! */
  646. static void b43_pio_rx_work(struct work_struct *work)
  647. {
  648. struct b43_pio_rxqueue *q = container_of(work, struct b43_pio_rxqueue,
  649. rx_work);
  650. unsigned int budget = 50;
  651. bool stop;
  652. do {
  653. spin_lock_irq(&q->lock);
  654. stop = (pio_rx_frame(q) == 0);
  655. spin_unlock_irq(&q->lock);
  656. cond_resched();
  657. if (stop)
  658. break;
  659. } while (--budget);
  660. }
  661. /* Called with IRQs disabled. */
  662. void b43_pio_rx(struct b43_pio_rxqueue *q)
  663. {
  664. /* Due to latency issues we must run the RX path in
  665. * a workqueue to be able to schedule between packets. */
  666. queue_work(q->dev->wl->hw->workqueue, &q->rx_work);
  667. }
  668. static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
  669. {
  670. unsigned long flags;
  671. spin_lock_irqsave(&q->lock, flags);
  672. if (q->rev >= 8) {
  673. b43_piotx_write32(q, B43_PIO8_TXCTL,
  674. b43_piotx_read32(q, B43_PIO8_TXCTL)
  675. | B43_PIO8_TXCTL_SUSPREQ);
  676. } else {
  677. b43_piotx_write16(q, B43_PIO_TXCTL,
  678. b43_piotx_read16(q, B43_PIO_TXCTL)
  679. | B43_PIO_TXCTL_SUSPREQ);
  680. }
  681. spin_unlock_irqrestore(&q->lock, flags);
  682. }
  683. static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
  684. {
  685. unsigned long flags;
  686. spin_lock_irqsave(&q->lock, flags);
  687. if (q->rev >= 8) {
  688. b43_piotx_write32(q, B43_PIO8_TXCTL,
  689. b43_piotx_read32(q, B43_PIO8_TXCTL)
  690. & ~B43_PIO8_TXCTL_SUSPREQ);
  691. } else {
  692. b43_piotx_write16(q, B43_PIO_TXCTL,
  693. b43_piotx_read16(q, B43_PIO_TXCTL)
  694. & ~B43_PIO_TXCTL_SUSPREQ);
  695. }
  696. spin_unlock_irqrestore(&q->lock, flags);
  697. }
  698. void b43_pio_tx_suspend(struct b43_wldev *dev)
  699. {
  700. b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
  701. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
  702. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
  703. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
  704. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
  705. b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
  706. }
  707. void b43_pio_tx_resume(struct b43_wldev *dev)
  708. {
  709. b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
  710. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
  711. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
  712. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
  713. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
  714. b43_power_saving_ctl_bits(dev, 0);
  715. }