bnx2x_stats.c 53 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685
  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2011 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. /* Statistics */
  21. /*
  22. * General service functions
  23. */
  24. static inline long bnx2x_hilo(u32 *hiref)
  25. {
  26. u32 lo = *(hiref + 1);
  27. #if (BITS_PER_LONG == 64)
  28. u32 hi = *hiref;
  29. return HILO_U64(hi, lo);
  30. #else
  31. return lo;
  32. #endif
  33. }
  34. /*
  35. * Init service functions
  36. */
  37. /* Post the next statistics ramrod. Protect it with the spin in
  38. * order to ensure the strict order between statistics ramrods
  39. * (each ramrod has a sequence number passed in a
  40. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  41. * sent in order).
  42. */
  43. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  44. {
  45. if (!bp->stats_pending) {
  46. int rc;
  47. spin_lock_bh(&bp->stats_lock);
  48. if (bp->stats_pending) {
  49. spin_unlock_bh(&bp->stats_lock);
  50. return;
  51. }
  52. bp->fw_stats_req->hdr.drv_stats_counter =
  53. cpu_to_le16(bp->stats_counter++);
  54. DP(NETIF_MSG_TIMER, "Sending statistics ramrod %d\n",
  55. bp->fw_stats_req->hdr.drv_stats_counter);
  56. /* send FW stats ramrod */
  57. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  58. U64_HI(bp->fw_stats_req_mapping),
  59. U64_LO(bp->fw_stats_req_mapping),
  60. NONE_CONNECTION_TYPE);
  61. if (rc == 0)
  62. bp->stats_pending = 1;
  63. spin_unlock_bh(&bp->stats_lock);
  64. }
  65. }
  66. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  67. {
  68. struct dmae_command *dmae = &bp->stats_dmae;
  69. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  70. *stats_comp = DMAE_COMP_VAL;
  71. if (CHIP_REV_IS_SLOW(bp))
  72. return;
  73. /* loader */
  74. if (bp->executer_idx) {
  75. int loader_idx = PMF_DMAE_C(bp);
  76. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  77. true, DMAE_COMP_GRC);
  78. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  79. memset(dmae, 0, sizeof(struct dmae_command));
  80. dmae->opcode = opcode;
  81. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  82. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  83. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  84. sizeof(struct dmae_command) *
  85. (loader_idx + 1)) >> 2;
  86. dmae->dst_addr_hi = 0;
  87. dmae->len = sizeof(struct dmae_command) >> 2;
  88. if (CHIP_IS_E1(bp))
  89. dmae->len--;
  90. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  91. dmae->comp_addr_hi = 0;
  92. dmae->comp_val = 1;
  93. *stats_comp = 0;
  94. bnx2x_post_dmae(bp, dmae, loader_idx);
  95. } else if (bp->func_stx) {
  96. *stats_comp = 0;
  97. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  98. }
  99. }
  100. static int bnx2x_stats_comp(struct bnx2x *bp)
  101. {
  102. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  103. int cnt = 10;
  104. might_sleep();
  105. while (*stats_comp != DMAE_COMP_VAL) {
  106. if (!cnt) {
  107. BNX2X_ERR("timeout waiting for stats finished\n");
  108. break;
  109. }
  110. cnt--;
  111. usleep_range(1000, 1000);
  112. }
  113. return 1;
  114. }
  115. /*
  116. * Statistics service functions
  117. */
  118. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  119. {
  120. struct dmae_command *dmae;
  121. u32 opcode;
  122. int loader_idx = PMF_DMAE_C(bp);
  123. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  124. /* sanity */
  125. if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) {
  126. BNX2X_ERR("BUG!\n");
  127. return;
  128. }
  129. bp->executer_idx = 0;
  130. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  131. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  132. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  133. dmae->src_addr_lo = bp->port.port_stx >> 2;
  134. dmae->src_addr_hi = 0;
  135. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  136. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  137. dmae->len = DMAE_LEN32_RD_MAX;
  138. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  139. dmae->comp_addr_hi = 0;
  140. dmae->comp_val = 1;
  141. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  142. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  143. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  144. dmae->src_addr_hi = 0;
  145. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  146. DMAE_LEN32_RD_MAX * 4);
  147. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  148. DMAE_LEN32_RD_MAX * 4);
  149. dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
  150. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  151. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  152. dmae->comp_val = DMAE_COMP_VAL;
  153. *stats_comp = 0;
  154. bnx2x_hw_stats_post(bp);
  155. bnx2x_stats_comp(bp);
  156. }
  157. static void bnx2x_port_stats_init(struct bnx2x *bp)
  158. {
  159. struct dmae_command *dmae;
  160. int port = BP_PORT(bp);
  161. u32 opcode;
  162. int loader_idx = PMF_DMAE_C(bp);
  163. u32 mac_addr;
  164. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  165. /* sanity */
  166. if (!bp->link_vars.link_up || !bp->port.pmf) {
  167. BNX2X_ERR("BUG!\n");
  168. return;
  169. }
  170. bp->executer_idx = 0;
  171. /* MCP */
  172. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  173. true, DMAE_COMP_GRC);
  174. if (bp->port.port_stx) {
  175. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  176. dmae->opcode = opcode;
  177. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  178. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  179. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  180. dmae->dst_addr_hi = 0;
  181. dmae->len = sizeof(struct host_port_stats) >> 2;
  182. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  183. dmae->comp_addr_hi = 0;
  184. dmae->comp_val = 1;
  185. }
  186. if (bp->func_stx) {
  187. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  188. dmae->opcode = opcode;
  189. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  190. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  191. dmae->dst_addr_lo = bp->func_stx >> 2;
  192. dmae->dst_addr_hi = 0;
  193. dmae->len = sizeof(struct host_func_stats) >> 2;
  194. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  195. dmae->comp_addr_hi = 0;
  196. dmae->comp_val = 1;
  197. }
  198. /* MAC */
  199. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  200. true, DMAE_COMP_GRC);
  201. /* EMAC is special */
  202. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  203. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  204. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  205. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  206. dmae->opcode = opcode;
  207. dmae->src_addr_lo = (mac_addr +
  208. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  209. dmae->src_addr_hi = 0;
  210. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  211. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  212. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  213. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  214. dmae->comp_addr_hi = 0;
  215. dmae->comp_val = 1;
  216. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  217. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  218. dmae->opcode = opcode;
  219. dmae->src_addr_lo = (mac_addr +
  220. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  221. dmae->src_addr_hi = 0;
  222. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  223. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  224. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  225. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  226. dmae->len = 1;
  227. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  228. dmae->comp_addr_hi = 0;
  229. dmae->comp_val = 1;
  230. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  231. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  232. dmae->opcode = opcode;
  233. dmae->src_addr_lo = (mac_addr +
  234. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  235. dmae->src_addr_hi = 0;
  236. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  237. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  238. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  239. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  240. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  241. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  242. dmae->comp_addr_hi = 0;
  243. dmae->comp_val = 1;
  244. } else {
  245. u32 tx_src_addr_lo, rx_src_addr_lo;
  246. u16 rx_len, tx_len;
  247. /* configure the params according to MAC type */
  248. switch (bp->link_vars.mac_type) {
  249. case MAC_TYPE_BMAC:
  250. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  251. NIG_REG_INGRESS_BMAC0_MEM);
  252. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  253. BIGMAC_REGISTER_TX_STAT_GTBYT */
  254. if (CHIP_IS_E1x(bp)) {
  255. tx_src_addr_lo = (mac_addr +
  256. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  257. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  258. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  259. rx_src_addr_lo = (mac_addr +
  260. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  261. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  262. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  263. } else {
  264. tx_src_addr_lo = (mac_addr +
  265. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  266. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  267. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  268. rx_src_addr_lo = (mac_addr +
  269. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  270. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  271. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  272. }
  273. break;
  274. case MAC_TYPE_UMAC: /* handled by MSTAT */
  275. case MAC_TYPE_XMAC: /* handled by MSTAT */
  276. default:
  277. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  278. tx_src_addr_lo = (mac_addr +
  279. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  280. rx_src_addr_lo = (mac_addr +
  281. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  282. tx_len = sizeof(bp->slowpath->
  283. mac_stats.mstat_stats.stats_tx) >> 2;
  284. rx_len = sizeof(bp->slowpath->
  285. mac_stats.mstat_stats.stats_rx) >> 2;
  286. break;
  287. }
  288. /* TX stats */
  289. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  290. dmae->opcode = opcode;
  291. dmae->src_addr_lo = tx_src_addr_lo;
  292. dmae->src_addr_hi = 0;
  293. dmae->len = tx_len;
  294. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  295. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  296. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  297. dmae->comp_addr_hi = 0;
  298. dmae->comp_val = 1;
  299. /* RX stats */
  300. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  301. dmae->opcode = opcode;
  302. dmae->src_addr_hi = 0;
  303. dmae->src_addr_lo = rx_src_addr_lo;
  304. dmae->dst_addr_lo =
  305. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  306. dmae->dst_addr_hi =
  307. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  308. dmae->len = rx_len;
  309. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  310. dmae->comp_addr_hi = 0;
  311. dmae->comp_val = 1;
  312. }
  313. /* NIG */
  314. if (!CHIP_IS_E3(bp)) {
  315. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  316. dmae->opcode = opcode;
  317. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  318. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  319. dmae->src_addr_hi = 0;
  320. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  321. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  322. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  323. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  324. dmae->len = (2*sizeof(u32)) >> 2;
  325. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  326. dmae->comp_addr_hi = 0;
  327. dmae->comp_val = 1;
  328. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  329. dmae->opcode = opcode;
  330. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  331. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  332. dmae->src_addr_hi = 0;
  333. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  334. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  335. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  336. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  337. dmae->len = (2*sizeof(u32)) >> 2;
  338. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  339. dmae->comp_addr_hi = 0;
  340. dmae->comp_val = 1;
  341. }
  342. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  343. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  344. true, DMAE_COMP_PCI);
  345. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  346. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  347. dmae->src_addr_hi = 0;
  348. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  349. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  350. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  351. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  352. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  353. dmae->comp_val = DMAE_COMP_VAL;
  354. *stats_comp = 0;
  355. }
  356. static void bnx2x_func_stats_init(struct bnx2x *bp)
  357. {
  358. struct dmae_command *dmae = &bp->stats_dmae;
  359. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  360. /* sanity */
  361. if (!bp->func_stx) {
  362. BNX2X_ERR("BUG!\n");
  363. return;
  364. }
  365. bp->executer_idx = 0;
  366. memset(dmae, 0, sizeof(struct dmae_command));
  367. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  368. true, DMAE_COMP_PCI);
  369. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  370. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  371. dmae->dst_addr_lo = bp->func_stx >> 2;
  372. dmae->dst_addr_hi = 0;
  373. dmae->len = sizeof(struct host_func_stats) >> 2;
  374. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  375. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  376. dmae->comp_val = DMAE_COMP_VAL;
  377. *stats_comp = 0;
  378. }
  379. static void bnx2x_stats_start(struct bnx2x *bp)
  380. {
  381. if (bp->port.pmf)
  382. bnx2x_port_stats_init(bp);
  383. else if (bp->func_stx)
  384. bnx2x_func_stats_init(bp);
  385. bnx2x_hw_stats_post(bp);
  386. bnx2x_storm_stats_post(bp);
  387. }
  388. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  389. {
  390. bnx2x_stats_comp(bp);
  391. bnx2x_stats_pmf_update(bp);
  392. bnx2x_stats_start(bp);
  393. }
  394. static void bnx2x_stats_restart(struct bnx2x *bp)
  395. {
  396. bnx2x_stats_comp(bp);
  397. bnx2x_stats_start(bp);
  398. }
  399. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  400. {
  401. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  402. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  403. struct {
  404. u32 lo;
  405. u32 hi;
  406. } diff;
  407. if (CHIP_IS_E1x(bp)) {
  408. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  409. /* the macros below will use "bmac1_stats" type */
  410. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  411. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  412. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  413. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  414. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  415. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  416. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  417. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  418. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  419. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  420. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  421. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  422. UPDATE_STAT64(tx_stat_gt127,
  423. tx_stat_etherstatspkts65octetsto127octets);
  424. UPDATE_STAT64(tx_stat_gt255,
  425. tx_stat_etherstatspkts128octetsto255octets);
  426. UPDATE_STAT64(tx_stat_gt511,
  427. tx_stat_etherstatspkts256octetsto511octets);
  428. UPDATE_STAT64(tx_stat_gt1023,
  429. tx_stat_etherstatspkts512octetsto1023octets);
  430. UPDATE_STAT64(tx_stat_gt1518,
  431. tx_stat_etherstatspkts1024octetsto1522octets);
  432. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  433. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  434. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  435. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  436. UPDATE_STAT64(tx_stat_gterr,
  437. tx_stat_dot3statsinternalmactransmiterrors);
  438. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  439. } else {
  440. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  441. /* the macros below will use "bmac2_stats" type */
  442. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  443. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  444. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  445. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  446. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  447. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  448. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  449. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  450. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  451. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  452. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  453. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  454. UPDATE_STAT64(tx_stat_gt127,
  455. tx_stat_etherstatspkts65octetsto127octets);
  456. UPDATE_STAT64(tx_stat_gt255,
  457. tx_stat_etherstatspkts128octetsto255octets);
  458. UPDATE_STAT64(tx_stat_gt511,
  459. tx_stat_etherstatspkts256octetsto511octets);
  460. UPDATE_STAT64(tx_stat_gt1023,
  461. tx_stat_etherstatspkts512octetsto1023octets);
  462. UPDATE_STAT64(tx_stat_gt1518,
  463. tx_stat_etherstatspkts1024octetsto1522octets);
  464. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  465. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  466. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  467. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  468. UPDATE_STAT64(tx_stat_gterr,
  469. tx_stat_dot3statsinternalmactransmiterrors);
  470. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  471. /* collect PFC stats */
  472. DIFF_64(diff.hi, new->tx_stat_gtpp_hi,
  473. pstats->pfc_frames_tx_hi,
  474. diff.lo, new->tx_stat_gtpp_lo,
  475. pstats->pfc_frames_tx_lo);
  476. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  477. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  478. ADD_64(pstats->pfc_frames_tx_hi, diff.hi,
  479. pstats->pfc_frames_tx_lo, diff.lo);
  480. DIFF_64(diff.hi, new->rx_stat_grpp_hi,
  481. pstats->pfc_frames_rx_hi,
  482. diff.lo, new->rx_stat_grpp_lo,
  483. pstats->pfc_frames_rx_lo);
  484. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  485. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  486. ADD_64(pstats->pfc_frames_rx_hi, diff.hi,
  487. pstats->pfc_frames_rx_lo, diff.lo);
  488. }
  489. estats->pause_frames_received_hi =
  490. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  491. estats->pause_frames_received_lo =
  492. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  493. estats->pause_frames_sent_hi =
  494. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  495. estats->pause_frames_sent_lo =
  496. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  497. estats->pfc_frames_received_hi =
  498. pstats->pfc_frames_rx_hi;
  499. estats->pfc_frames_received_lo =
  500. pstats->pfc_frames_rx_lo;
  501. estats->pfc_frames_sent_hi =
  502. pstats->pfc_frames_tx_hi;
  503. estats->pfc_frames_sent_lo =
  504. pstats->pfc_frames_tx_lo;
  505. }
  506. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  507. {
  508. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  509. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  510. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  511. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  512. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  513. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  514. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  515. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  516. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  517. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  518. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  519. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  520. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  521. /* collect pfc stats */
  522. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  523. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  524. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  525. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  526. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  527. ADD_STAT64(stats_tx.tx_gt127,
  528. tx_stat_etherstatspkts65octetsto127octets);
  529. ADD_STAT64(stats_tx.tx_gt255,
  530. tx_stat_etherstatspkts128octetsto255octets);
  531. ADD_STAT64(stats_tx.tx_gt511,
  532. tx_stat_etherstatspkts256octetsto511octets);
  533. ADD_STAT64(stats_tx.tx_gt1023,
  534. tx_stat_etherstatspkts512octetsto1023octets);
  535. ADD_STAT64(stats_tx.tx_gt1518,
  536. tx_stat_etherstatspkts1024octetsto1522octets);
  537. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  538. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  539. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  540. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  541. ADD_STAT64(stats_tx.tx_gterr,
  542. tx_stat_dot3statsinternalmactransmiterrors);
  543. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  544. ADD_64(estats->etherstatspkts1024octetsto1522octets_hi,
  545. new->stats_tx.tx_gt1518_hi,
  546. estats->etherstatspkts1024octetsto1522octets_lo,
  547. new->stats_tx.tx_gt1518_lo);
  548. ADD_64(estats->etherstatspktsover1522octets_hi,
  549. new->stats_tx.tx_gt2047_hi,
  550. estats->etherstatspktsover1522octets_lo,
  551. new->stats_tx.tx_gt2047_lo);
  552. ADD_64(estats->etherstatspktsover1522octets_hi,
  553. new->stats_tx.tx_gt4095_hi,
  554. estats->etherstatspktsover1522octets_lo,
  555. new->stats_tx.tx_gt4095_lo);
  556. ADD_64(estats->etherstatspktsover1522octets_hi,
  557. new->stats_tx.tx_gt9216_hi,
  558. estats->etherstatspktsover1522octets_lo,
  559. new->stats_tx.tx_gt9216_lo);
  560. ADD_64(estats->etherstatspktsover1522octets_hi,
  561. new->stats_tx.tx_gt16383_hi,
  562. estats->etherstatspktsover1522octets_lo,
  563. new->stats_tx.tx_gt16383_lo);
  564. estats->pause_frames_received_hi =
  565. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  566. estats->pause_frames_received_lo =
  567. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  568. estats->pause_frames_sent_hi =
  569. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  570. estats->pause_frames_sent_lo =
  571. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  572. estats->pfc_frames_received_hi =
  573. pstats->pfc_frames_rx_hi;
  574. estats->pfc_frames_received_lo =
  575. pstats->pfc_frames_rx_lo;
  576. estats->pfc_frames_sent_hi =
  577. pstats->pfc_frames_tx_hi;
  578. estats->pfc_frames_sent_lo =
  579. pstats->pfc_frames_tx_lo;
  580. }
  581. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  582. {
  583. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  584. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  585. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  586. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  587. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  588. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  589. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  590. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  591. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  592. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  593. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  594. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  595. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  596. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  597. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  598. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  599. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  600. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  601. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  602. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  603. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  604. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  605. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  606. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  607. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  608. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  609. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  610. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  611. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  612. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  613. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  614. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  615. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  616. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  617. estats->pause_frames_received_hi =
  618. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  619. estats->pause_frames_received_lo =
  620. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  621. ADD_64(estats->pause_frames_received_hi,
  622. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  623. estats->pause_frames_received_lo,
  624. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  625. estats->pause_frames_sent_hi =
  626. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  627. estats->pause_frames_sent_lo =
  628. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  629. ADD_64(estats->pause_frames_sent_hi,
  630. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  631. estats->pause_frames_sent_lo,
  632. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  633. }
  634. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  635. {
  636. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  637. struct nig_stats *old = &(bp->port.old_nig_stats);
  638. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  639. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  640. struct {
  641. u32 lo;
  642. u32 hi;
  643. } diff;
  644. switch (bp->link_vars.mac_type) {
  645. case MAC_TYPE_BMAC:
  646. bnx2x_bmac_stats_update(bp);
  647. break;
  648. case MAC_TYPE_EMAC:
  649. bnx2x_emac_stats_update(bp);
  650. break;
  651. case MAC_TYPE_UMAC:
  652. case MAC_TYPE_XMAC:
  653. bnx2x_mstat_stats_update(bp);
  654. break;
  655. case MAC_TYPE_NONE: /* unreached */
  656. DP(BNX2X_MSG_STATS,
  657. "stats updated by DMAE but no MAC active\n");
  658. return -1;
  659. default: /* unreached */
  660. BNX2X_ERR("Unknown MAC type\n");
  661. }
  662. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  663. new->brb_discard - old->brb_discard);
  664. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  665. new->brb_truncate - old->brb_truncate);
  666. if (!CHIP_IS_E3(bp)) {
  667. UPDATE_STAT64_NIG(egress_mac_pkt0,
  668. etherstatspkts1024octetsto1522octets);
  669. UPDATE_STAT64_NIG(egress_mac_pkt1,
  670. etherstatspktsover1522octets);
  671. }
  672. memcpy(old, new, sizeof(struct nig_stats));
  673. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  674. sizeof(struct mac_stx));
  675. estats->brb_drop_hi = pstats->brb_drop_hi;
  676. estats->brb_drop_lo = pstats->brb_drop_lo;
  677. pstats->host_port_stats_counter++;
  678. if (!BP_NOMCP(bp)) {
  679. u32 nig_timer_max =
  680. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  681. if (nig_timer_max != estats->nig_timer_max) {
  682. estats->nig_timer_max = nig_timer_max;
  683. BNX2X_ERR("NIG timer max (%u)\n",
  684. estats->nig_timer_max);
  685. }
  686. }
  687. return 0;
  688. }
  689. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  690. {
  691. struct tstorm_per_port_stats *tport =
  692. &bp->fw_stats_data->port.tstorm_port_statistics;
  693. struct tstorm_per_pf_stats *tfunc =
  694. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  695. struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
  696. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  697. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  698. int i;
  699. u16 cur_stats_counter;
  700. /* Make sure we use the value of the counter
  701. * used for sending the last stats ramrod.
  702. */
  703. spin_lock_bh(&bp->stats_lock);
  704. cur_stats_counter = bp->stats_counter - 1;
  705. spin_unlock_bh(&bp->stats_lock);
  706. /* are storm stats valid? */
  707. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  708. DP(BNX2X_MSG_STATS, "stats not updated by xstorm"
  709. " xstorm counter (0x%x) != stats_counter (0x%x)\n",
  710. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  711. return -EAGAIN;
  712. }
  713. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  714. DP(BNX2X_MSG_STATS, "stats not updated by ustorm"
  715. " ustorm counter (0x%x) != stats_counter (0x%x)\n",
  716. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  717. return -EAGAIN;
  718. }
  719. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  720. DP(BNX2X_MSG_STATS, "stats not updated by cstorm"
  721. " cstorm counter (0x%x) != stats_counter (0x%x)\n",
  722. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  723. return -EAGAIN;
  724. }
  725. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  726. DP(BNX2X_MSG_STATS, "stats not updated by tstorm"
  727. " tstorm counter (0x%x) != stats_counter (0x%x)\n",
  728. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  729. return -EAGAIN;
  730. }
  731. memcpy(&(fstats->total_bytes_received_hi),
  732. &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
  733. sizeof(struct host_func_stats) - 2*sizeof(u32));
  734. estats->error_bytes_received_hi = 0;
  735. estats->error_bytes_received_lo = 0;
  736. estats->etherstatsoverrsizepkts_hi = 0;
  737. estats->etherstatsoverrsizepkts_lo = 0;
  738. estats->no_buff_discard_hi = 0;
  739. estats->no_buff_discard_lo = 0;
  740. estats->total_tpa_aggregations_hi = 0;
  741. estats->total_tpa_aggregations_lo = 0;
  742. estats->total_tpa_aggregated_frames_hi = 0;
  743. estats->total_tpa_aggregated_frames_lo = 0;
  744. estats->total_tpa_bytes_hi = 0;
  745. estats->total_tpa_bytes_lo = 0;
  746. for_each_eth_queue(bp, i) {
  747. struct bnx2x_fastpath *fp = &bp->fp[i];
  748. struct tstorm_per_queue_stats *tclient =
  749. &bp->fw_stats_data->queue_stats[i].
  750. tstorm_queue_statistics;
  751. struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient;
  752. struct ustorm_per_queue_stats *uclient =
  753. &bp->fw_stats_data->queue_stats[i].
  754. ustorm_queue_statistics;
  755. struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient;
  756. struct xstorm_per_queue_stats *xclient =
  757. &bp->fw_stats_data->queue_stats[i].
  758. xstorm_queue_statistics;
  759. struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient;
  760. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  761. u32 diff;
  762. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, "
  763. "bcast_sent 0x%x mcast_sent 0x%x\n",
  764. i, xclient->ucast_pkts_sent,
  765. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  766. DP(BNX2X_MSG_STATS, "---------------\n");
  767. qstats->total_broadcast_bytes_received_hi =
  768. le32_to_cpu(tclient->rcv_bcast_bytes.hi);
  769. qstats->total_broadcast_bytes_received_lo =
  770. le32_to_cpu(tclient->rcv_bcast_bytes.lo);
  771. qstats->total_multicast_bytes_received_hi =
  772. le32_to_cpu(tclient->rcv_mcast_bytes.hi);
  773. qstats->total_multicast_bytes_received_lo =
  774. le32_to_cpu(tclient->rcv_mcast_bytes.lo);
  775. qstats->total_unicast_bytes_received_hi =
  776. le32_to_cpu(tclient->rcv_ucast_bytes.hi);
  777. qstats->total_unicast_bytes_received_lo =
  778. le32_to_cpu(tclient->rcv_ucast_bytes.lo);
  779. /*
  780. * sum to total_bytes_received all
  781. * unicast/multicast/broadcast
  782. */
  783. qstats->total_bytes_received_hi =
  784. qstats->total_broadcast_bytes_received_hi;
  785. qstats->total_bytes_received_lo =
  786. qstats->total_broadcast_bytes_received_lo;
  787. ADD_64(qstats->total_bytes_received_hi,
  788. qstats->total_multicast_bytes_received_hi,
  789. qstats->total_bytes_received_lo,
  790. qstats->total_multicast_bytes_received_lo);
  791. ADD_64(qstats->total_bytes_received_hi,
  792. qstats->total_unicast_bytes_received_hi,
  793. qstats->total_bytes_received_lo,
  794. qstats->total_unicast_bytes_received_lo);
  795. qstats->valid_bytes_received_hi =
  796. qstats->total_bytes_received_hi;
  797. qstats->valid_bytes_received_lo =
  798. qstats->total_bytes_received_lo;
  799. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  800. total_unicast_packets_received);
  801. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  802. total_multicast_packets_received);
  803. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  804. total_broadcast_packets_received);
  805. UPDATE_EXTEND_TSTAT(pkts_too_big_discard,
  806. etherstatsoverrsizepkts);
  807. UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
  808. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  809. total_unicast_packets_received);
  810. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  811. total_multicast_packets_received);
  812. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  813. total_broadcast_packets_received);
  814. UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
  815. UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
  816. UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
  817. qstats->total_broadcast_bytes_transmitted_hi =
  818. le32_to_cpu(xclient->bcast_bytes_sent.hi);
  819. qstats->total_broadcast_bytes_transmitted_lo =
  820. le32_to_cpu(xclient->bcast_bytes_sent.lo);
  821. qstats->total_multicast_bytes_transmitted_hi =
  822. le32_to_cpu(xclient->mcast_bytes_sent.hi);
  823. qstats->total_multicast_bytes_transmitted_lo =
  824. le32_to_cpu(xclient->mcast_bytes_sent.lo);
  825. qstats->total_unicast_bytes_transmitted_hi =
  826. le32_to_cpu(xclient->ucast_bytes_sent.hi);
  827. qstats->total_unicast_bytes_transmitted_lo =
  828. le32_to_cpu(xclient->ucast_bytes_sent.lo);
  829. /*
  830. * sum to total_bytes_transmitted all
  831. * unicast/multicast/broadcast
  832. */
  833. qstats->total_bytes_transmitted_hi =
  834. qstats->total_unicast_bytes_transmitted_hi;
  835. qstats->total_bytes_transmitted_lo =
  836. qstats->total_unicast_bytes_transmitted_lo;
  837. ADD_64(qstats->total_bytes_transmitted_hi,
  838. qstats->total_broadcast_bytes_transmitted_hi,
  839. qstats->total_bytes_transmitted_lo,
  840. qstats->total_broadcast_bytes_transmitted_lo);
  841. ADD_64(qstats->total_bytes_transmitted_hi,
  842. qstats->total_multicast_bytes_transmitted_hi,
  843. qstats->total_bytes_transmitted_lo,
  844. qstats->total_multicast_bytes_transmitted_lo);
  845. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  846. total_unicast_packets_transmitted);
  847. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  848. total_multicast_packets_transmitted);
  849. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  850. total_broadcast_packets_transmitted);
  851. UPDATE_EXTEND_TSTAT(checksum_discard,
  852. total_packets_received_checksum_discarded);
  853. UPDATE_EXTEND_TSTAT(ttl0_discard,
  854. total_packets_received_ttl0_discarded);
  855. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  856. total_transmitted_dropped_packets_error);
  857. /* TPA aggregations completed */
  858. UPDATE_EXTEND_USTAT(coalesced_events, total_tpa_aggregations);
  859. /* Number of network frames aggregated by TPA */
  860. UPDATE_EXTEND_USTAT(coalesced_pkts,
  861. total_tpa_aggregated_frames);
  862. /* Total number of bytes in completed TPA aggregations */
  863. qstats->total_tpa_bytes_lo =
  864. le32_to_cpu(uclient->coalesced_bytes.lo);
  865. qstats->total_tpa_bytes_hi =
  866. le32_to_cpu(uclient->coalesced_bytes.hi);
  867. /* TPA stats per-function */
  868. ADD_64(estats->total_tpa_aggregations_hi,
  869. qstats->total_tpa_aggregations_hi,
  870. estats->total_tpa_aggregations_lo,
  871. qstats->total_tpa_aggregations_lo);
  872. ADD_64(estats->total_tpa_aggregated_frames_hi,
  873. qstats->total_tpa_aggregated_frames_hi,
  874. estats->total_tpa_aggregated_frames_lo,
  875. qstats->total_tpa_aggregated_frames_lo);
  876. ADD_64(estats->total_tpa_bytes_hi,
  877. qstats->total_tpa_bytes_hi,
  878. estats->total_tpa_bytes_lo,
  879. qstats->total_tpa_bytes_lo);
  880. ADD_64(fstats->total_bytes_received_hi,
  881. qstats->total_bytes_received_hi,
  882. fstats->total_bytes_received_lo,
  883. qstats->total_bytes_received_lo);
  884. ADD_64(fstats->total_bytes_transmitted_hi,
  885. qstats->total_bytes_transmitted_hi,
  886. fstats->total_bytes_transmitted_lo,
  887. qstats->total_bytes_transmitted_lo);
  888. ADD_64(fstats->total_unicast_packets_received_hi,
  889. qstats->total_unicast_packets_received_hi,
  890. fstats->total_unicast_packets_received_lo,
  891. qstats->total_unicast_packets_received_lo);
  892. ADD_64(fstats->total_multicast_packets_received_hi,
  893. qstats->total_multicast_packets_received_hi,
  894. fstats->total_multicast_packets_received_lo,
  895. qstats->total_multicast_packets_received_lo);
  896. ADD_64(fstats->total_broadcast_packets_received_hi,
  897. qstats->total_broadcast_packets_received_hi,
  898. fstats->total_broadcast_packets_received_lo,
  899. qstats->total_broadcast_packets_received_lo);
  900. ADD_64(fstats->total_unicast_packets_transmitted_hi,
  901. qstats->total_unicast_packets_transmitted_hi,
  902. fstats->total_unicast_packets_transmitted_lo,
  903. qstats->total_unicast_packets_transmitted_lo);
  904. ADD_64(fstats->total_multicast_packets_transmitted_hi,
  905. qstats->total_multicast_packets_transmitted_hi,
  906. fstats->total_multicast_packets_transmitted_lo,
  907. qstats->total_multicast_packets_transmitted_lo);
  908. ADD_64(fstats->total_broadcast_packets_transmitted_hi,
  909. qstats->total_broadcast_packets_transmitted_hi,
  910. fstats->total_broadcast_packets_transmitted_lo,
  911. qstats->total_broadcast_packets_transmitted_lo);
  912. ADD_64(fstats->valid_bytes_received_hi,
  913. qstats->valid_bytes_received_hi,
  914. fstats->valid_bytes_received_lo,
  915. qstats->valid_bytes_received_lo);
  916. ADD_64(estats->etherstatsoverrsizepkts_hi,
  917. qstats->etherstatsoverrsizepkts_hi,
  918. estats->etherstatsoverrsizepkts_lo,
  919. qstats->etherstatsoverrsizepkts_lo);
  920. ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
  921. estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
  922. }
  923. ADD_64(fstats->total_bytes_received_hi,
  924. estats->rx_stat_ifhcinbadoctets_hi,
  925. fstats->total_bytes_received_lo,
  926. estats->rx_stat_ifhcinbadoctets_lo);
  927. ADD_64(fstats->total_bytes_received_hi,
  928. tfunc->rcv_error_bytes.hi,
  929. fstats->total_bytes_received_lo,
  930. tfunc->rcv_error_bytes.lo);
  931. memcpy(estats, &(fstats->total_bytes_received_hi),
  932. sizeof(struct host_func_stats) - 2*sizeof(u32));
  933. ADD_64(estats->error_bytes_received_hi,
  934. tfunc->rcv_error_bytes.hi,
  935. estats->error_bytes_received_lo,
  936. tfunc->rcv_error_bytes.lo);
  937. ADD_64(estats->etherstatsoverrsizepkts_hi,
  938. estats->rx_stat_dot3statsframestoolong_hi,
  939. estats->etherstatsoverrsizepkts_lo,
  940. estats->rx_stat_dot3statsframestoolong_lo);
  941. ADD_64(estats->error_bytes_received_hi,
  942. estats->rx_stat_ifhcinbadoctets_hi,
  943. estats->error_bytes_received_lo,
  944. estats->rx_stat_ifhcinbadoctets_lo);
  945. if (bp->port.pmf) {
  946. estats->mac_filter_discard =
  947. le32_to_cpu(tport->mac_filter_discard);
  948. estats->mf_tag_discard =
  949. le32_to_cpu(tport->mf_tag_discard);
  950. estats->brb_truncate_discard =
  951. le32_to_cpu(tport->brb_truncate_discard);
  952. estats->mac_discard = le32_to_cpu(tport->mac_discard);
  953. }
  954. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  955. bp->stats_pending = 0;
  956. return 0;
  957. }
  958. static void bnx2x_net_stats_update(struct bnx2x *bp)
  959. {
  960. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  961. struct net_device_stats *nstats = &bp->dev->stats;
  962. unsigned long tmp;
  963. int i;
  964. nstats->rx_packets =
  965. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  966. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  967. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  968. nstats->tx_packets =
  969. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  970. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  971. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  972. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  973. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  974. tmp = estats->mac_discard;
  975. for_each_rx_queue(bp, i)
  976. tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
  977. nstats->rx_dropped = tmp;
  978. nstats->tx_dropped = 0;
  979. nstats->multicast =
  980. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  981. nstats->collisions =
  982. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  983. nstats->rx_length_errors =
  984. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  985. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  986. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  987. bnx2x_hilo(&estats->brb_truncate_hi);
  988. nstats->rx_crc_errors =
  989. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  990. nstats->rx_frame_errors =
  991. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  992. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  993. nstats->rx_missed_errors = 0;
  994. nstats->rx_errors = nstats->rx_length_errors +
  995. nstats->rx_over_errors +
  996. nstats->rx_crc_errors +
  997. nstats->rx_frame_errors +
  998. nstats->rx_fifo_errors +
  999. nstats->rx_missed_errors;
  1000. nstats->tx_aborted_errors =
  1001. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  1002. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  1003. nstats->tx_carrier_errors =
  1004. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  1005. nstats->tx_fifo_errors = 0;
  1006. nstats->tx_heartbeat_errors = 0;
  1007. nstats->tx_window_errors = 0;
  1008. nstats->tx_errors = nstats->tx_aborted_errors +
  1009. nstats->tx_carrier_errors +
  1010. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  1011. }
  1012. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  1013. {
  1014. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1015. int i;
  1016. estats->driver_xoff = 0;
  1017. estats->rx_err_discard_pkt = 0;
  1018. estats->rx_skb_alloc_failed = 0;
  1019. estats->hw_csum_err = 0;
  1020. for_each_queue(bp, i) {
  1021. struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
  1022. estats->driver_xoff += qstats->driver_xoff;
  1023. estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
  1024. estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
  1025. estats->hw_csum_err += qstats->hw_csum_err;
  1026. }
  1027. }
  1028. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  1029. {
  1030. u32 val;
  1031. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  1032. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  1033. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  1034. return true;
  1035. }
  1036. return false;
  1037. }
  1038. static void bnx2x_stats_update(struct bnx2x *bp)
  1039. {
  1040. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1041. if (bnx2x_edebug_stats_stopped(bp))
  1042. return;
  1043. if (*stats_comp != DMAE_COMP_VAL)
  1044. return;
  1045. if (bp->port.pmf)
  1046. bnx2x_hw_stats_update(bp);
  1047. if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
  1048. BNX2X_ERR("storm stats were not updated for 3 times\n");
  1049. bnx2x_panic();
  1050. return;
  1051. }
  1052. bnx2x_net_stats_update(bp);
  1053. bnx2x_drv_stats_update(bp);
  1054. if (netif_msg_timer(bp)) {
  1055. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1056. int i, cos;
  1057. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  1058. estats->brb_drop_lo, estats->brb_truncate_lo);
  1059. for_each_eth_queue(bp, i) {
  1060. struct bnx2x_fastpath *fp = &bp->fp[i];
  1061. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  1062. pr_debug("%s: rx usage(%4u) *rx_cons_sb(%u) rx pkt(%lu) rx calls(%lu %lu)\n",
  1063. fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
  1064. fp->rx_comp_cons),
  1065. le16_to_cpu(*fp->rx_cons_sb),
  1066. bnx2x_hilo(&qstats->
  1067. total_unicast_packets_received_hi),
  1068. fp->rx_calls, fp->rx_pkt);
  1069. }
  1070. for_each_eth_queue(bp, i) {
  1071. struct bnx2x_fastpath *fp = &bp->fp[i];
  1072. struct bnx2x_fp_txdata *txdata;
  1073. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  1074. struct netdev_queue *txq;
  1075. pr_debug("%s: tx pkt(%lu) (Xoff events %u)",
  1076. fp->name,
  1077. bnx2x_hilo(
  1078. &qstats->total_unicast_packets_transmitted_hi),
  1079. qstats->driver_xoff);
  1080. for_each_cos_in_tx_queue(fp, cos) {
  1081. txdata = &fp->txdata[cos];
  1082. txq = netdev_get_tx_queue(bp->dev,
  1083. FP_COS_TO_TXQ(fp, cos));
  1084. pr_debug("%d: tx avail(%4u) *tx_cons_sb(%u) tx calls (%lu) %s\n",
  1085. cos,
  1086. bnx2x_tx_avail(bp, txdata),
  1087. le16_to_cpu(*txdata->tx_cons_sb),
  1088. txdata->tx_pkt,
  1089. (netif_tx_queue_stopped(txq) ?
  1090. "Xoff" : "Xon")
  1091. );
  1092. }
  1093. }
  1094. }
  1095. bnx2x_hw_stats_post(bp);
  1096. bnx2x_storm_stats_post(bp);
  1097. }
  1098. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  1099. {
  1100. struct dmae_command *dmae;
  1101. u32 opcode;
  1102. int loader_idx = PMF_DMAE_C(bp);
  1103. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1104. bp->executer_idx = 0;
  1105. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1106. if (bp->port.port_stx) {
  1107. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1108. if (bp->func_stx)
  1109. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1110. opcode, DMAE_COMP_GRC);
  1111. else
  1112. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1113. opcode, DMAE_COMP_PCI);
  1114. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1115. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1116. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1117. dmae->dst_addr_hi = 0;
  1118. dmae->len = sizeof(struct host_port_stats) >> 2;
  1119. if (bp->func_stx) {
  1120. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1121. dmae->comp_addr_hi = 0;
  1122. dmae->comp_val = 1;
  1123. } else {
  1124. dmae->comp_addr_lo =
  1125. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1126. dmae->comp_addr_hi =
  1127. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1128. dmae->comp_val = DMAE_COMP_VAL;
  1129. *stats_comp = 0;
  1130. }
  1131. }
  1132. if (bp->func_stx) {
  1133. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1134. dmae->opcode =
  1135. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1136. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1137. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1138. dmae->dst_addr_lo = bp->func_stx >> 2;
  1139. dmae->dst_addr_hi = 0;
  1140. dmae->len = sizeof(struct host_func_stats) >> 2;
  1141. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1142. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1143. dmae->comp_val = DMAE_COMP_VAL;
  1144. *stats_comp = 0;
  1145. }
  1146. }
  1147. static void bnx2x_stats_stop(struct bnx2x *bp)
  1148. {
  1149. int update = 0;
  1150. bnx2x_stats_comp(bp);
  1151. if (bp->port.pmf)
  1152. update = (bnx2x_hw_stats_update(bp) == 0);
  1153. update |= (bnx2x_storm_stats_update(bp) == 0);
  1154. if (update) {
  1155. bnx2x_net_stats_update(bp);
  1156. if (bp->port.pmf)
  1157. bnx2x_port_stats_stop(bp);
  1158. bnx2x_hw_stats_post(bp);
  1159. bnx2x_stats_comp(bp);
  1160. }
  1161. }
  1162. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1163. {
  1164. }
  1165. static const struct {
  1166. void (*action)(struct bnx2x *bp);
  1167. enum bnx2x_stats_state next_state;
  1168. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1169. /* state event */
  1170. {
  1171. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1172. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1173. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1174. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1175. },
  1176. {
  1177. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1178. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1179. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1180. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1181. }
  1182. };
  1183. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1184. {
  1185. enum bnx2x_stats_state state;
  1186. if (unlikely(bp->panic))
  1187. return;
  1188. spin_lock_bh(&bp->stats_lock);
  1189. state = bp->stats_state;
  1190. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1191. spin_unlock_bh(&bp->stats_lock);
  1192. bnx2x_stats_stm[state][event].action(bp);
  1193. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1194. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1195. state, event, bp->stats_state);
  1196. }
  1197. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1198. {
  1199. struct dmae_command *dmae;
  1200. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1201. /* sanity */
  1202. if (!bp->port.pmf || !bp->port.port_stx) {
  1203. BNX2X_ERR("BUG!\n");
  1204. return;
  1205. }
  1206. bp->executer_idx = 0;
  1207. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1208. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1209. true, DMAE_COMP_PCI);
  1210. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1211. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1212. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1213. dmae->dst_addr_hi = 0;
  1214. dmae->len = sizeof(struct host_port_stats) >> 2;
  1215. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1216. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1217. dmae->comp_val = DMAE_COMP_VAL;
  1218. *stats_comp = 0;
  1219. bnx2x_hw_stats_post(bp);
  1220. bnx2x_stats_comp(bp);
  1221. }
  1222. static void bnx2x_func_stats_base_init(struct bnx2x *bp)
  1223. {
  1224. int vn, vn_max = IS_MF(bp) ? BP_MAX_VN_NUM(bp) : E1VN_MAX;
  1225. u32 func_stx;
  1226. /* sanity */
  1227. if (!bp->port.pmf || !bp->func_stx) {
  1228. BNX2X_ERR("BUG!\n");
  1229. return;
  1230. }
  1231. /* save our func_stx */
  1232. func_stx = bp->func_stx;
  1233. for (vn = VN_0; vn < vn_max; vn++) {
  1234. int mb_idx = BP_FW_MB_IDX_VN(bp, vn);
  1235. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1236. bnx2x_func_stats_init(bp);
  1237. bnx2x_hw_stats_post(bp);
  1238. bnx2x_stats_comp(bp);
  1239. }
  1240. /* restore our func_stx */
  1241. bp->func_stx = func_stx;
  1242. }
  1243. static void bnx2x_func_stats_base_update(struct bnx2x *bp)
  1244. {
  1245. struct dmae_command *dmae = &bp->stats_dmae;
  1246. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1247. /* sanity */
  1248. if (!bp->func_stx) {
  1249. BNX2X_ERR("BUG!\n");
  1250. return;
  1251. }
  1252. bp->executer_idx = 0;
  1253. memset(dmae, 0, sizeof(struct dmae_command));
  1254. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  1255. true, DMAE_COMP_PCI);
  1256. dmae->src_addr_lo = bp->func_stx >> 2;
  1257. dmae->src_addr_hi = 0;
  1258. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
  1259. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
  1260. dmae->len = sizeof(struct host_func_stats) >> 2;
  1261. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1262. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1263. dmae->comp_val = DMAE_COMP_VAL;
  1264. *stats_comp = 0;
  1265. bnx2x_hw_stats_post(bp);
  1266. bnx2x_stats_comp(bp);
  1267. }
  1268. /**
  1269. * This function will prepare the statistics ramrod data the way
  1270. * we will only have to increment the statistics counter and
  1271. * send the ramrod each time we have to.
  1272. *
  1273. * @param bp
  1274. */
  1275. static inline void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1276. {
  1277. int i;
  1278. int first_queue_query_index;
  1279. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1280. dma_addr_t cur_data_offset;
  1281. struct stats_query_entry *cur_query_entry;
  1282. stats_hdr->cmd_num = bp->fw_stats_num;
  1283. stats_hdr->drv_stats_counter = 0;
  1284. /* storm_counters struct contains the counters of completed
  1285. * statistics requests per storm which are incremented by FW
  1286. * each time it completes hadning a statistics ramrod. We will
  1287. * check these counters in the timer handler and discard a
  1288. * (statistics) ramrod completion.
  1289. */
  1290. cur_data_offset = bp->fw_stats_data_mapping +
  1291. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1292. stats_hdr->stats_counters_addrs.hi =
  1293. cpu_to_le32(U64_HI(cur_data_offset));
  1294. stats_hdr->stats_counters_addrs.lo =
  1295. cpu_to_le32(U64_LO(cur_data_offset));
  1296. /* prepare to the first stats ramrod (will be completed with
  1297. * the counters equal to zero) - init counters to somethig different.
  1298. */
  1299. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1300. sizeof(struct stats_counter));
  1301. /**** Port FW statistics data ****/
  1302. cur_data_offset = bp->fw_stats_data_mapping +
  1303. offsetof(struct bnx2x_fw_stats_data, port);
  1304. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1305. cur_query_entry->kind = STATS_TYPE_PORT;
  1306. /* For port query index is a DONT CARE */
  1307. cur_query_entry->index = BP_PORT(bp);
  1308. /* For port query funcID is a DONT CARE */
  1309. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1310. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1311. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1312. /**** PF FW statistics data ****/
  1313. cur_data_offset = bp->fw_stats_data_mapping +
  1314. offsetof(struct bnx2x_fw_stats_data, pf);
  1315. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1316. cur_query_entry->kind = STATS_TYPE_PF;
  1317. /* For PF query index is a DONT CARE */
  1318. cur_query_entry->index = BP_PORT(bp);
  1319. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1320. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1321. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1322. /**** FCoE FW statistics data ****/
  1323. if (!NO_FCOE(bp)) {
  1324. cur_data_offset = bp->fw_stats_data_mapping +
  1325. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1326. cur_query_entry =
  1327. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1328. cur_query_entry->kind = STATS_TYPE_FCOE;
  1329. /* For FCoE query index is a DONT CARE */
  1330. cur_query_entry->index = BP_PORT(bp);
  1331. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1332. cur_query_entry->address.hi =
  1333. cpu_to_le32(U64_HI(cur_data_offset));
  1334. cur_query_entry->address.lo =
  1335. cpu_to_le32(U64_LO(cur_data_offset));
  1336. }
  1337. /**** Clients' queries ****/
  1338. cur_data_offset = bp->fw_stats_data_mapping +
  1339. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1340. /* first queue query index depends whether FCoE offloaded request will
  1341. * be included in the ramrod
  1342. */
  1343. if (!NO_FCOE(bp))
  1344. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1345. else
  1346. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1347. for_each_eth_queue(bp, i) {
  1348. cur_query_entry =
  1349. &bp->fw_stats_req->
  1350. query[first_queue_query_index + i];
  1351. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1352. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1353. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1354. cur_query_entry->address.hi =
  1355. cpu_to_le32(U64_HI(cur_data_offset));
  1356. cur_query_entry->address.lo =
  1357. cpu_to_le32(U64_LO(cur_data_offset));
  1358. cur_data_offset += sizeof(struct per_queue_stats);
  1359. }
  1360. /* add FCoE queue query if needed */
  1361. if (!NO_FCOE(bp)) {
  1362. cur_query_entry =
  1363. &bp->fw_stats_req->
  1364. query[first_queue_query_index + i];
  1365. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1366. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX]);
  1367. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1368. cur_query_entry->address.hi =
  1369. cpu_to_le32(U64_HI(cur_data_offset));
  1370. cur_query_entry->address.lo =
  1371. cpu_to_le32(U64_LO(cur_data_offset));
  1372. }
  1373. }
  1374. void bnx2x_stats_init(struct bnx2x *bp)
  1375. {
  1376. int /*abs*/port = BP_PORT(bp);
  1377. int mb_idx = BP_FW_MB_IDX(bp);
  1378. int i;
  1379. bp->stats_pending = 0;
  1380. bp->executer_idx = 0;
  1381. bp->stats_counter = 0;
  1382. /* port and func stats for management */
  1383. if (!BP_NOMCP(bp)) {
  1384. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1385. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1386. } else {
  1387. bp->port.port_stx = 0;
  1388. bp->func_stx = 0;
  1389. }
  1390. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1391. bp->port.port_stx, bp->func_stx);
  1392. port = BP_PORT(bp);
  1393. /* port stats */
  1394. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1395. bp->port.old_nig_stats.brb_discard =
  1396. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1397. bp->port.old_nig_stats.brb_truncate =
  1398. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1399. if (!CHIP_IS_E3(bp)) {
  1400. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1401. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1402. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1403. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1404. }
  1405. /* function stats */
  1406. for_each_queue(bp, i) {
  1407. struct bnx2x_fastpath *fp = &bp->fp[i];
  1408. memset(&fp->old_tclient, 0, sizeof(fp->old_tclient));
  1409. memset(&fp->old_uclient, 0, sizeof(fp->old_uclient));
  1410. memset(&fp->old_xclient, 0, sizeof(fp->old_xclient));
  1411. memset(&fp->eth_q_stats, 0, sizeof(fp->eth_q_stats));
  1412. }
  1413. /* Prepare statistics ramrod data */
  1414. bnx2x_prep_fw_stats_req(bp);
  1415. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1416. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1417. bp->stats_state = STATS_STATE_DISABLED;
  1418. if (bp->port.pmf) {
  1419. if (bp->port.port_stx)
  1420. bnx2x_port_stats_base_init(bp);
  1421. if (bp->func_stx)
  1422. bnx2x_func_stats_base_init(bp);
  1423. } else if (bp->func_stx)
  1424. bnx2x_func_stats_base_update(bp);
  1425. }