at91_ether.c 13 KB

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  1. /*
  2. * Ethernet driver for the Atmel AT91RM9200 (Thunder)
  3. *
  4. * Copyright (C) 2003 SAN People (Pty) Ltd
  5. *
  6. * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc.
  7. * Initial version by Rick Bronson 01/11/2003
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/netdevice.h>
  18. #include <linux/etherdevice.h>
  19. #include <linux/skbuff.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/ethtool.h>
  22. #include <linux/platform_data/macb.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/clk.h>
  25. #include <linux/gfp.h>
  26. #include <linux/phy.h>
  27. #include <linux/io.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/of_net.h>
  31. #include <linux/pinctrl/consumer.h>
  32. #include "macb.h"
  33. /* 1518 rounded up */
  34. #define MAX_RBUFF_SZ 0x600
  35. /* max number of receive buffers */
  36. #define MAX_RX_DESCR 9
  37. /* Initialize and start the Receiver and Transmit subsystems */
  38. static int at91ether_start(struct net_device *dev)
  39. {
  40. struct macb *lp = netdev_priv(dev);
  41. dma_addr_t addr;
  42. u32 ctl;
  43. int i;
  44. lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev,
  45. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  46. &lp->rx_ring_dma, GFP_KERNEL);
  47. if (!lp->rx_ring) {
  48. netdev_err(dev, "unable to alloc rx ring DMA buffer\n");
  49. return -ENOMEM;
  50. }
  51. lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev,
  52. MAX_RX_DESCR * MAX_RBUFF_SZ,
  53. &lp->rx_buffers_dma, GFP_KERNEL);
  54. if (!lp->rx_buffers) {
  55. netdev_err(dev, "unable to alloc rx data DMA buffer\n");
  56. dma_free_coherent(&lp->pdev->dev,
  57. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  58. lp->rx_ring, lp->rx_ring_dma);
  59. lp->rx_ring = NULL;
  60. return -ENOMEM;
  61. }
  62. addr = lp->rx_buffers_dma;
  63. for (i = 0; i < MAX_RX_DESCR; i++) {
  64. lp->rx_ring[i].addr = addr;
  65. lp->rx_ring[i].ctrl = 0;
  66. addr += MAX_RBUFF_SZ;
  67. }
  68. /* Set the Wrap bit on the last descriptor */
  69. lp->rx_ring[MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP);
  70. /* Reset buffer index */
  71. lp->rx_tail = 0;
  72. /* Program address of descriptor list in Rx Buffer Queue register */
  73. macb_writel(lp, RBQP, lp->rx_ring_dma);
  74. /* Enable Receive and Transmit */
  75. ctl = macb_readl(lp, NCR);
  76. macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE));
  77. return 0;
  78. }
  79. /* Open the ethernet interface */
  80. static int at91ether_open(struct net_device *dev)
  81. {
  82. struct macb *lp = netdev_priv(dev);
  83. u32 ctl;
  84. int ret;
  85. if (!is_valid_ether_addr(dev->dev_addr))
  86. return -EADDRNOTAVAIL;
  87. /* Clear internal statistics */
  88. ctl = macb_readl(lp, NCR);
  89. macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT));
  90. macb_set_hwaddr(lp);
  91. ret = at91ether_start(dev);
  92. if (ret)
  93. return ret;
  94. /* Enable MAC interrupts */
  95. macb_writel(lp, IER, MACB_BIT(RCOMP) |
  96. MACB_BIT(RXUBR) |
  97. MACB_BIT(ISR_TUND) |
  98. MACB_BIT(ISR_RLE) |
  99. MACB_BIT(TCOMP) |
  100. MACB_BIT(ISR_ROVR) |
  101. MACB_BIT(HRESP));
  102. /* schedule a link state check */
  103. phy_start(lp->phy_dev);
  104. netif_start_queue(dev);
  105. return 0;
  106. }
  107. /* Close the interface */
  108. static int at91ether_close(struct net_device *dev)
  109. {
  110. struct macb *lp = netdev_priv(dev);
  111. u32 ctl;
  112. /* Disable Receiver and Transmitter */
  113. ctl = macb_readl(lp, NCR);
  114. macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE)));
  115. /* Disable MAC interrupts */
  116. macb_writel(lp, IDR, MACB_BIT(RCOMP) |
  117. MACB_BIT(RXUBR) |
  118. MACB_BIT(ISR_TUND) |
  119. MACB_BIT(ISR_RLE) |
  120. MACB_BIT(TCOMP) |
  121. MACB_BIT(ISR_ROVR) |
  122. MACB_BIT(HRESP));
  123. netif_stop_queue(dev);
  124. dma_free_coherent(&lp->pdev->dev,
  125. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  126. lp->rx_ring, lp->rx_ring_dma);
  127. lp->rx_ring = NULL;
  128. dma_free_coherent(&lp->pdev->dev,
  129. MAX_RX_DESCR * MAX_RBUFF_SZ,
  130. lp->rx_buffers, lp->rx_buffers_dma);
  131. lp->rx_buffers = NULL;
  132. return 0;
  133. }
  134. /* Transmit packet */
  135. static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)
  136. {
  137. struct macb *lp = netdev_priv(dev);
  138. if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) {
  139. netif_stop_queue(dev);
  140. /* Store packet information (to free when Tx completed) */
  141. lp->skb = skb;
  142. lp->skb_length = skb->len;
  143. lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len,
  144. DMA_TO_DEVICE);
  145. /* Set address of the data in the Transmit Address register */
  146. macb_writel(lp, TAR, lp->skb_physaddr);
  147. /* Set length of the packet in the Transmit Control register */
  148. macb_writel(lp, TCR, skb->len);
  149. } else {
  150. netdev_err(dev, "%s called, but device is busy!\n", __func__);
  151. return NETDEV_TX_BUSY;
  152. }
  153. return NETDEV_TX_OK;
  154. }
  155. /* Extract received frame from buffer descriptors and sent to upper layers.
  156. * (Called from interrupt context)
  157. */
  158. static void at91ether_rx(struct net_device *dev)
  159. {
  160. struct macb *lp = netdev_priv(dev);
  161. unsigned char *p_recv;
  162. struct sk_buff *skb;
  163. unsigned int pktlen;
  164. while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) {
  165. p_recv = lp->rx_buffers + lp->rx_tail * MAX_RBUFF_SZ;
  166. pktlen = MACB_BF(RX_FRMLEN, lp->rx_ring[lp->rx_tail].ctrl);
  167. skb = netdev_alloc_skb(dev, pktlen + 2);
  168. if (skb) {
  169. skb_reserve(skb, 2);
  170. memcpy(skb_put(skb, pktlen), p_recv, pktlen);
  171. skb->protocol = eth_type_trans(skb, dev);
  172. lp->stats.rx_packets++;
  173. lp->stats.rx_bytes += pktlen;
  174. netif_rx(skb);
  175. } else {
  176. lp->stats.rx_dropped++;
  177. netdev_notice(dev, "Memory squeeze, dropping packet.\n");
  178. }
  179. if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH))
  180. lp->stats.multicast++;
  181. /* reset ownership bit */
  182. lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED);
  183. /* wrap after last buffer */
  184. if (lp->rx_tail == MAX_RX_DESCR - 1)
  185. lp->rx_tail = 0;
  186. else
  187. lp->rx_tail++;
  188. }
  189. }
  190. /* MAC interrupt handler */
  191. static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
  192. {
  193. struct net_device *dev = dev_id;
  194. struct macb *lp = netdev_priv(dev);
  195. u32 intstatus, ctl;
  196. /* MAC Interrupt Status register indicates what interrupts are pending.
  197. * It is automatically cleared once read.
  198. */
  199. intstatus = macb_readl(lp, ISR);
  200. /* Receive complete */
  201. if (intstatus & MACB_BIT(RCOMP))
  202. at91ether_rx(dev);
  203. /* Transmit complete */
  204. if (intstatus & MACB_BIT(TCOMP)) {
  205. /* The TCOM bit is set even if the transmission failed */
  206. if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE)))
  207. lp->stats.tx_errors++;
  208. if (lp->skb) {
  209. dev_kfree_skb_irq(lp->skb);
  210. lp->skb = NULL;
  211. dma_unmap_single(NULL, lp->skb_physaddr, lp->skb_length, DMA_TO_DEVICE);
  212. lp->stats.tx_packets++;
  213. lp->stats.tx_bytes += lp->skb_length;
  214. }
  215. netif_wake_queue(dev);
  216. }
  217. /* Work-around for EMAC Errata section 41.3.1 */
  218. if (intstatus & MACB_BIT(RXUBR)) {
  219. ctl = macb_readl(lp, NCR);
  220. macb_writel(lp, NCR, ctl & ~MACB_BIT(RE));
  221. macb_writel(lp, NCR, ctl | MACB_BIT(RE));
  222. }
  223. if (intstatus & MACB_BIT(ISR_ROVR))
  224. netdev_err(dev, "ROVR error\n");
  225. return IRQ_HANDLED;
  226. }
  227. #ifdef CONFIG_NET_POLL_CONTROLLER
  228. static void at91ether_poll_controller(struct net_device *dev)
  229. {
  230. unsigned long flags;
  231. local_irq_save(flags);
  232. at91ether_interrupt(dev->irq, dev);
  233. local_irq_restore(flags);
  234. }
  235. #endif
  236. static const struct net_device_ops at91ether_netdev_ops = {
  237. .ndo_open = at91ether_open,
  238. .ndo_stop = at91ether_close,
  239. .ndo_start_xmit = at91ether_start_xmit,
  240. .ndo_get_stats = macb_get_stats,
  241. .ndo_set_rx_mode = macb_set_rx_mode,
  242. .ndo_set_mac_address = eth_mac_addr,
  243. .ndo_do_ioctl = macb_ioctl,
  244. .ndo_validate_addr = eth_validate_addr,
  245. .ndo_change_mtu = eth_change_mtu,
  246. #ifdef CONFIG_NET_POLL_CONTROLLER
  247. .ndo_poll_controller = at91ether_poll_controller,
  248. #endif
  249. };
  250. #if defined(CONFIG_OF)
  251. static const struct of_device_id at91ether_dt_ids[] = {
  252. { .compatible = "cdns,at91rm9200-emac" },
  253. { .compatible = "cdns,emac" },
  254. { /* sentinel */ }
  255. };
  256. MODULE_DEVICE_TABLE(of, at91ether_dt_ids);
  257. static int at91ether_get_phy_mode_dt(struct platform_device *pdev)
  258. {
  259. struct device_node *np = pdev->dev.of_node;
  260. if (np)
  261. return of_get_phy_mode(np);
  262. return -ENODEV;
  263. }
  264. static int at91ether_get_hwaddr_dt(struct macb *bp)
  265. {
  266. struct device_node *np = bp->pdev->dev.of_node;
  267. if (np) {
  268. const char *mac = of_get_mac_address(np);
  269. if (mac) {
  270. memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
  271. return 0;
  272. }
  273. }
  274. return -ENODEV;
  275. }
  276. #else
  277. static int at91ether_get_phy_mode_dt(struct platform_device *pdev)
  278. {
  279. return -ENODEV;
  280. }
  281. static int at91ether_get_hwaddr_dt(struct macb *bp)
  282. {
  283. return -ENODEV;
  284. }
  285. #endif
  286. /* Detect MAC & PHY and perform ethernet interface initialization */
  287. static int __init at91ether_probe(struct platform_device *pdev)
  288. {
  289. struct macb_platform_data *board_data = pdev->dev.platform_data;
  290. struct resource *regs;
  291. struct net_device *dev;
  292. struct phy_device *phydev;
  293. struct pinctrl *pinctrl;
  294. struct macb *lp;
  295. int res;
  296. u32 reg;
  297. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  298. if (!regs)
  299. return -ENOENT;
  300. pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
  301. if (IS_ERR(pinctrl)) {
  302. res = PTR_ERR(pinctrl);
  303. if (res == -EPROBE_DEFER)
  304. return res;
  305. dev_warn(&pdev->dev, "No pinctrl provided\n");
  306. }
  307. dev = alloc_etherdev(sizeof(struct macb));
  308. if (!dev)
  309. return -ENOMEM;
  310. lp = netdev_priv(dev);
  311. lp->pdev = pdev;
  312. lp->dev = dev;
  313. spin_lock_init(&lp->lock);
  314. /* physical base address */
  315. dev->base_addr = regs->start;
  316. lp->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
  317. if (!lp->regs) {
  318. res = -ENOMEM;
  319. goto err_free_dev;
  320. }
  321. /* Clock */
  322. lp->pclk = devm_clk_get(&pdev->dev, "ether_clk");
  323. if (IS_ERR(lp->pclk)) {
  324. res = PTR_ERR(lp->pclk);
  325. goto err_free_dev;
  326. }
  327. clk_enable(lp->pclk);
  328. /* Install the interrupt handler */
  329. dev->irq = platform_get_irq(pdev, 0);
  330. res = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, 0, dev->name, dev);
  331. if (res)
  332. goto err_disable_clock;
  333. ether_setup(dev);
  334. dev->netdev_ops = &at91ether_netdev_ops;
  335. dev->ethtool_ops = &macb_ethtool_ops;
  336. platform_set_drvdata(pdev, dev);
  337. SET_NETDEV_DEV(dev, &pdev->dev);
  338. res = at91ether_get_hwaddr_dt(lp);
  339. if (res < 0)
  340. macb_get_hwaddr(lp);
  341. res = at91ether_get_phy_mode_dt(pdev);
  342. if (res < 0) {
  343. if (board_data && board_data->is_rmii)
  344. lp->phy_interface = PHY_INTERFACE_MODE_RMII;
  345. else
  346. lp->phy_interface = PHY_INTERFACE_MODE_MII;
  347. } else {
  348. lp->phy_interface = res;
  349. }
  350. macb_writel(lp, NCR, 0);
  351. reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG);
  352. if (lp->phy_interface == PHY_INTERFACE_MODE_RMII)
  353. reg |= MACB_BIT(RM9200_RMII);
  354. macb_writel(lp, NCFGR, reg);
  355. /* Register the network interface */
  356. res = register_netdev(dev);
  357. if (res)
  358. goto err_disable_clock;
  359. if (macb_mii_init(lp) != 0)
  360. goto err_out_unregister_netdev;
  361. /* will be enabled in open() */
  362. netif_carrier_off(dev);
  363. phydev = lp->phy_dev;
  364. netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
  365. phydev->drv->name, dev_name(&phydev->dev),
  366. phydev->irq);
  367. /* Display ethernet banner */
  368. netdev_info(dev, "AT91 ethernet at 0x%08lx int=%d (%pM)\n",
  369. dev->base_addr, dev->irq, dev->dev_addr);
  370. return 0;
  371. err_out_unregister_netdev:
  372. unregister_netdev(dev);
  373. err_disable_clock:
  374. clk_disable(lp->pclk);
  375. err_free_dev:
  376. free_netdev(dev);
  377. return res;
  378. }
  379. static int __devexit at91ether_remove(struct platform_device *pdev)
  380. {
  381. struct net_device *dev = platform_get_drvdata(pdev);
  382. struct macb *lp = netdev_priv(dev);
  383. if (lp->phy_dev)
  384. phy_disconnect(lp->phy_dev);
  385. mdiobus_unregister(lp->mii_bus);
  386. kfree(lp->mii_bus->irq);
  387. mdiobus_free(lp->mii_bus);
  388. unregister_netdev(dev);
  389. clk_disable(lp->pclk);
  390. free_netdev(dev);
  391. platform_set_drvdata(pdev, NULL);
  392. return 0;
  393. }
  394. #ifdef CONFIG_PM
  395. static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
  396. {
  397. struct net_device *net_dev = platform_get_drvdata(pdev);
  398. struct macb *lp = netdev_priv(net_dev);
  399. if (netif_running(net_dev)) {
  400. netif_stop_queue(net_dev);
  401. netif_device_detach(net_dev);
  402. clk_disable(lp->pclk);
  403. }
  404. return 0;
  405. }
  406. static int at91ether_resume(struct platform_device *pdev)
  407. {
  408. struct net_device *net_dev = platform_get_drvdata(pdev);
  409. struct macb *lp = netdev_priv(net_dev);
  410. if (netif_running(net_dev)) {
  411. clk_enable(lp->pclk);
  412. netif_device_attach(net_dev);
  413. netif_start_queue(net_dev);
  414. }
  415. return 0;
  416. }
  417. #else
  418. #define at91ether_suspend NULL
  419. #define at91ether_resume NULL
  420. #endif
  421. static struct platform_driver at91ether_driver = {
  422. .remove = __devexit_p(at91ether_remove),
  423. .suspend = at91ether_suspend,
  424. .resume = at91ether_resume,
  425. .driver = {
  426. .name = "at91_ether",
  427. .owner = THIS_MODULE,
  428. .of_match_table = of_match_ptr(at91ether_dt_ids),
  429. },
  430. };
  431. static int __init at91ether_init(void)
  432. {
  433. return platform_driver_probe(&at91ether_driver, at91ether_probe);
  434. }
  435. static void __exit at91ether_exit(void)
  436. {
  437. platform_driver_unregister(&at91ether_driver);
  438. }
  439. module_init(at91ether_init)
  440. module_exit(at91ether_exit)
  441. MODULE_LICENSE("GPL");
  442. MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver");
  443. MODULE_AUTHOR("Andrew Victor");
  444. MODULE_ALIAS("platform:at91_ether");