nm256.c 45 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <asm/io.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/slab.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/mutex.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index = SNDRV_DEFAULT_IDX1; /* Index */
  51. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  52. static int playback_bufsize = 16;
  53. static int capture_bufsize = 16;
  54. static int force_ac97; /* disabled as default */
  55. static int buffer_top; /* not specified */
  56. static int use_cache; /* disabled */
  57. static int vaio_hack; /* disabled */
  58. static int reset_workaround;
  59. static int reset_workaround_2;
  60. module_param(index, int, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param(id, charp, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param(playback_bufsize, int, 0444);
  65. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  66. module_param(capture_bufsize, int, 0444);
  67. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param(force_ac97, bool, 0444);
  69. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  70. module_param(buffer_top, int, 0444);
  71. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  72. module_param(use_cache, bool, 0444);
  73. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  74. module_param(vaio_hack, bool, 0444);
  75. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  76. module_param(reset_workaround, bool, 0444);
  77. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  78. module_param(reset_workaround_2, bool, 0444);
  79. MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
  80. /* just for backward compatibility */
  81. static int enable;
  82. module_param(enable, bool, 0444);
  83. /*
  84. * hw definitions
  85. */
  86. /* The BIOS signature. */
  87. #define NM_SIGNATURE 0x4e4d0000
  88. /* Signature mask. */
  89. #define NM_SIG_MASK 0xffff0000
  90. /* Size of the second memory area. */
  91. #define NM_PORT2_SIZE 4096
  92. /* The base offset of the mixer in the second memory area. */
  93. #define NM_MIXER_OFFSET 0x600
  94. /* The maximum size of a coefficient entry. */
  95. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  96. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  97. /* The interrupt register. */
  98. #define NM_INT_REG 0xa04
  99. /* And its bits. */
  100. #define NM_PLAYBACK_INT 0x40
  101. #define NM_RECORD_INT 0x100
  102. #define NM_MISC_INT_1 0x4000
  103. #define NM_MISC_INT_2 0x1
  104. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  105. /* The AV's "mixer ready" status bit and location. */
  106. #define NM_MIXER_STATUS_OFFSET 0xa04
  107. #define NM_MIXER_READY_MASK 0x0800
  108. #define NM_MIXER_PRESENCE 0xa06
  109. #define NM_PRESENCE_MASK 0x0050
  110. #define NM_PRESENCE_VALUE 0x0040
  111. /*
  112. * For the ZX. It uses the same interrupt register, but it holds 32
  113. * bits instead of 16.
  114. */
  115. #define NM2_PLAYBACK_INT 0x10000
  116. #define NM2_RECORD_INT 0x80000
  117. #define NM2_MISC_INT_1 0x8
  118. #define NM2_MISC_INT_2 0x2
  119. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  120. /* The ZX's "mixer ready" status bit and location. */
  121. #define NM2_MIXER_STATUS_OFFSET 0xa06
  122. #define NM2_MIXER_READY_MASK 0x0800
  123. /* The playback registers start from here. */
  124. #define NM_PLAYBACK_REG_OFFSET 0x0
  125. /* The record registers start from here. */
  126. #define NM_RECORD_REG_OFFSET 0x200
  127. /* The rate register is located 2 bytes from the start of the register area. */
  128. #define NM_RATE_REG_OFFSET 2
  129. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  130. #define NM_RATE_STEREO 1
  131. #define NM_RATE_BITS_16 2
  132. #define NM_RATE_MASK 0xf0
  133. /* Playback enable register. */
  134. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  135. #define NM_PLAYBACK_ENABLE_FLAG 1
  136. #define NM_PLAYBACK_ONESHOT 2
  137. #define NM_PLAYBACK_FREERUN 4
  138. /* Mutes the audio output. */
  139. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  140. #define NM_AUDIO_MUTE_LEFT 0x8000
  141. #define NM_AUDIO_MUTE_RIGHT 0x0080
  142. /* Recording enable register. */
  143. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  144. #define NM_RECORD_ENABLE_FLAG 1
  145. #define NM_RECORD_FREERUN 2
  146. /* coefficient buffer pointer */
  147. #define NM_COEFF_START_OFFSET 0x1c
  148. #define NM_COEFF_END_OFFSET 0x20
  149. /* DMA buffer offsets */
  150. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  151. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  152. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  153. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  154. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  155. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  156. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  157. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  158. struct nm256_stream {
  159. struct nm256 *chip;
  160. struct snd_pcm_substream *substream;
  161. int running;
  162. int suspended;
  163. u32 buf; /* offset from chip->buffer */
  164. int bufsize; /* buffer size in bytes */
  165. void __iomem *bufptr; /* mapped pointer */
  166. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  167. int dma_size; /* buffer size of the substream in bytes */
  168. int period_size; /* period size in bytes */
  169. int periods; /* # of periods */
  170. int shift; /* bit shifts */
  171. int cur_period; /* current period # */
  172. };
  173. struct nm256 {
  174. struct snd_card *card;
  175. void __iomem *cport; /* control port */
  176. struct resource *res_cport; /* its resource */
  177. unsigned long cport_addr; /* physical address */
  178. void __iomem *buffer; /* buffer */
  179. struct resource *res_buffer; /* its resource */
  180. unsigned long buffer_addr; /* buffer phyiscal address */
  181. u32 buffer_start; /* start offset from pci resource 0 */
  182. u32 buffer_end; /* end offset */
  183. u32 buffer_size; /* total buffer size */
  184. u32 all_coeff_buf; /* coefficient buffer */
  185. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  186. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  187. unsigned int use_cache: 1; /* use one big coef. table */
  188. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  189. unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
  190. unsigned int in_resume: 1;
  191. int mixer_base; /* register offset of ac97 mixer */
  192. int mixer_status_offset; /* offset of mixer status reg. */
  193. int mixer_status_mask; /* bit mask to test the mixer status */
  194. int irq;
  195. int irq_acks;
  196. irq_handler_t interrupt;
  197. int badintrcount; /* counter to check bogus interrupts */
  198. struct mutex irq_mutex;
  199. struct nm256_stream streams[2];
  200. struct snd_ac97 *ac97;
  201. unsigned short *ac97_regs; /* register caches, only for valid regs */
  202. struct snd_pcm *pcm;
  203. struct pci_dev *pci;
  204. spinlock_t reg_lock;
  205. };
  206. /*
  207. * include coefficient table
  208. */
  209. #include "nm256_coef.c"
  210. /*
  211. * PCI ids
  212. */
  213. static struct pci_device_id snd_nm256_ids[] = {
  214. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  215. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  216. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  217. {0,},
  218. };
  219. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  220. /*
  221. * lowlvel stuffs
  222. */
  223. static inline u8
  224. snd_nm256_readb(struct nm256 *chip, int offset)
  225. {
  226. return readb(chip->cport + offset);
  227. }
  228. static inline u16
  229. snd_nm256_readw(struct nm256 *chip, int offset)
  230. {
  231. return readw(chip->cport + offset);
  232. }
  233. static inline u32
  234. snd_nm256_readl(struct nm256 *chip, int offset)
  235. {
  236. return readl(chip->cport + offset);
  237. }
  238. static inline void
  239. snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
  240. {
  241. writeb(val, chip->cport + offset);
  242. }
  243. static inline void
  244. snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
  245. {
  246. writew(val, chip->cport + offset);
  247. }
  248. static inline void
  249. snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
  250. {
  251. writel(val, chip->cport + offset);
  252. }
  253. static inline void
  254. snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
  255. {
  256. offset -= chip->buffer_start;
  257. #ifdef CONFIG_SND_DEBUG
  258. if (offset < 0 || offset >= chip->buffer_size) {
  259. snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
  260. offset, size);
  261. return;
  262. }
  263. #endif
  264. memcpy_toio(chip->buffer + offset, src, size);
  265. }
  266. /*
  267. * coefficient handlers -- what a magic!
  268. */
  269. static u16
  270. snd_nm256_get_start_offset(int which)
  271. {
  272. u16 offset = 0;
  273. while (which-- > 0)
  274. offset += coefficient_sizes[which];
  275. return offset;
  276. }
  277. static void
  278. snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
  279. {
  280. u32 coeff_buf = chip->coeff_buf[stream];
  281. u16 offset = snd_nm256_get_start_offset(which);
  282. u16 size = coefficient_sizes[which];
  283. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  284. snd_nm256_writel(chip, port, coeff_buf);
  285. /* ??? Record seems to behave differently than playback. */
  286. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  287. size--;
  288. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  289. }
  290. static void
  291. snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
  292. {
  293. /* The enable register for the specified engine. */
  294. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
  295. NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  296. u32 addr = NM_COEFF_START_OFFSET;
  297. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
  298. NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  299. if (snd_nm256_readb(chip, poffset) & 1) {
  300. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  301. return;
  302. }
  303. /* The recording engine uses coefficient values 8-15. */
  304. number &= 7;
  305. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  306. number += 8;
  307. if (! chip->use_cache) {
  308. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  309. return;
  310. }
  311. if (! chip->coeffs_current) {
  312. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  313. NM_TOTAL_COEFF_COUNT * 4);
  314. chip->coeffs_current = 1;
  315. } else {
  316. u32 base = chip->all_coeff_buf;
  317. u32 offset = snd_nm256_get_start_offset(number);
  318. u32 end_offset = offset + coefficient_sizes[number];
  319. snd_nm256_writel(chip, addr, base + offset);
  320. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  321. end_offset--;
  322. snd_nm256_writel(chip, addr + 4, base + end_offset);
  323. }
  324. }
  325. /* The actual rates supported by the card. */
  326. static unsigned int samplerates[8] = {
  327. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  328. };
  329. static struct snd_pcm_hw_constraint_list constraints_rates = {
  330. .count = ARRAY_SIZE(samplerates),
  331. .list = samplerates,
  332. .mask = 0,
  333. };
  334. /*
  335. * return the index of the target rate
  336. */
  337. static int
  338. snd_nm256_fixed_rate(unsigned int rate)
  339. {
  340. unsigned int i;
  341. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  342. if (rate == samplerates[i])
  343. return i;
  344. }
  345. snd_BUG();
  346. return 0;
  347. }
  348. /*
  349. * set sample rate and format
  350. */
  351. static void
  352. snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
  353. struct snd_pcm_substream *substream)
  354. {
  355. struct snd_pcm_runtime *runtime = substream->runtime;
  356. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  357. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  358. s->shift = 0;
  359. if (snd_pcm_format_width(runtime->format) == 16) {
  360. ratebits |= NM_RATE_BITS_16;
  361. s->shift++;
  362. }
  363. if (runtime->channels > 1) {
  364. ratebits |= NM_RATE_STEREO;
  365. s->shift++;
  366. }
  367. runtime->rate = samplerates[rate_index];
  368. switch (substream->stream) {
  369. case SNDRV_PCM_STREAM_PLAYBACK:
  370. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  371. snd_nm256_writeb(chip,
  372. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  373. ratebits);
  374. break;
  375. case SNDRV_PCM_STREAM_CAPTURE:
  376. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  377. snd_nm256_writeb(chip,
  378. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  379. ratebits);
  380. break;
  381. }
  382. }
  383. /* acquire interrupt */
  384. static int snd_nm256_acquire_irq(struct nm256 *chip)
  385. {
  386. mutex_lock(&chip->irq_mutex);
  387. if (chip->irq < 0) {
  388. if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
  389. chip->card->driver, chip)) {
  390. snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
  391. mutex_unlock(&chip->irq_mutex);
  392. return -EBUSY;
  393. }
  394. chip->irq = chip->pci->irq;
  395. }
  396. chip->irq_acks++;
  397. mutex_unlock(&chip->irq_mutex);
  398. return 0;
  399. }
  400. /* release interrupt */
  401. static void snd_nm256_release_irq(struct nm256 *chip)
  402. {
  403. mutex_lock(&chip->irq_mutex);
  404. if (chip->irq_acks > 0)
  405. chip->irq_acks--;
  406. if (chip->irq_acks == 0 && chip->irq >= 0) {
  407. free_irq(chip->irq, chip);
  408. chip->irq = -1;
  409. }
  410. mutex_unlock(&chip->irq_mutex);
  411. }
  412. /*
  413. * start / stop
  414. */
  415. /* update the watermark (current period) */
  416. static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
  417. {
  418. s->cur_period++;
  419. s->cur_period %= s->periods;
  420. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  421. }
  422. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  423. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  424. static void
  425. snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
  426. struct snd_pcm_substream *substream)
  427. {
  428. /* program buffer pointers */
  429. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  430. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  431. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  432. snd_nm256_playback_mark(chip, s);
  433. /* Enable playback engine and interrupts. */
  434. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  435. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  436. /* Enable both channels. */
  437. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  438. }
  439. static void
  440. snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
  441. struct snd_pcm_substream *substream)
  442. {
  443. /* program buffer pointers */
  444. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  445. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  446. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  447. snd_nm256_capture_mark(chip, s);
  448. /* Enable playback engine and interrupts. */
  449. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  450. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  451. }
  452. /* Stop the play engine. */
  453. static void
  454. snd_nm256_playback_stop(struct nm256 *chip)
  455. {
  456. /* Shut off sound from both channels. */
  457. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  458. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  459. /* Disable play engine. */
  460. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  461. }
  462. static void
  463. snd_nm256_capture_stop(struct nm256 *chip)
  464. {
  465. /* Disable recording engine. */
  466. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  467. }
  468. static int
  469. snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  470. {
  471. struct nm256 *chip = snd_pcm_substream_chip(substream);
  472. struct nm256_stream *s = substream->runtime->private_data;
  473. int err = 0;
  474. snd_assert(s != NULL, return -ENXIO);
  475. spin_lock(&chip->reg_lock);
  476. switch (cmd) {
  477. case SNDRV_PCM_TRIGGER_RESUME:
  478. s->suspended = 0;
  479. /* fallthru */
  480. case SNDRV_PCM_TRIGGER_START:
  481. if (! s->running) {
  482. snd_nm256_playback_start(chip, s, substream);
  483. s->running = 1;
  484. }
  485. break;
  486. case SNDRV_PCM_TRIGGER_SUSPEND:
  487. s->suspended = 1;
  488. /* fallthru */
  489. case SNDRV_PCM_TRIGGER_STOP:
  490. if (s->running) {
  491. snd_nm256_playback_stop(chip);
  492. s->running = 0;
  493. }
  494. break;
  495. default:
  496. err = -EINVAL;
  497. break;
  498. }
  499. spin_unlock(&chip->reg_lock);
  500. return err;
  501. }
  502. static int
  503. snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  504. {
  505. struct nm256 *chip = snd_pcm_substream_chip(substream);
  506. struct nm256_stream *s = substream->runtime->private_data;
  507. int err = 0;
  508. snd_assert(s != NULL, return -ENXIO);
  509. spin_lock(&chip->reg_lock);
  510. switch (cmd) {
  511. case SNDRV_PCM_TRIGGER_START:
  512. case SNDRV_PCM_TRIGGER_RESUME:
  513. if (! s->running) {
  514. snd_nm256_capture_start(chip, s, substream);
  515. s->running = 1;
  516. }
  517. break;
  518. case SNDRV_PCM_TRIGGER_STOP:
  519. case SNDRV_PCM_TRIGGER_SUSPEND:
  520. if (s->running) {
  521. snd_nm256_capture_stop(chip);
  522. s->running = 0;
  523. }
  524. break;
  525. default:
  526. err = -EINVAL;
  527. break;
  528. }
  529. spin_unlock(&chip->reg_lock);
  530. return err;
  531. }
  532. /*
  533. * prepare playback/capture channel
  534. */
  535. static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
  536. {
  537. struct nm256 *chip = snd_pcm_substream_chip(substream);
  538. struct snd_pcm_runtime *runtime = substream->runtime;
  539. struct nm256_stream *s = runtime->private_data;
  540. snd_assert(s, return -ENXIO);
  541. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  542. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  543. s->periods = substream->runtime->periods;
  544. s->cur_period = 0;
  545. spin_lock_irq(&chip->reg_lock);
  546. s->running = 0;
  547. snd_nm256_set_format(chip, s, substream);
  548. spin_unlock_irq(&chip->reg_lock);
  549. return 0;
  550. }
  551. /*
  552. * get the current pointer
  553. */
  554. static snd_pcm_uframes_t
  555. snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
  556. {
  557. struct nm256 *chip = snd_pcm_substream_chip(substream);
  558. struct nm256_stream *s = substream->runtime->private_data;
  559. unsigned long curp;
  560. snd_assert(s, return 0);
  561. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  562. curp %= s->dma_size;
  563. return bytes_to_frames(substream->runtime, curp);
  564. }
  565. static snd_pcm_uframes_t
  566. snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
  567. {
  568. struct nm256 *chip = snd_pcm_substream_chip(substream);
  569. struct nm256_stream *s = substream->runtime->private_data;
  570. unsigned long curp;
  571. snd_assert(s != NULL, return 0);
  572. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  573. curp %= s->dma_size;
  574. return bytes_to_frames(substream->runtime, curp);
  575. }
  576. /* Remapped I/O space can be accessible as pointer on i386 */
  577. /* This might be changed in the future */
  578. #ifndef __i386__
  579. /*
  580. * silence / copy for playback
  581. */
  582. static int
  583. snd_nm256_playback_silence(struct snd_pcm_substream *substream,
  584. int channel, /* not used (interleaved data) */
  585. snd_pcm_uframes_t pos,
  586. snd_pcm_uframes_t count)
  587. {
  588. struct snd_pcm_runtime *runtime = substream->runtime;
  589. struct nm256_stream *s = runtime->private_data;
  590. count = frames_to_bytes(runtime, count);
  591. pos = frames_to_bytes(runtime, pos);
  592. memset_io(s->bufptr + pos, 0, count);
  593. return 0;
  594. }
  595. static int
  596. snd_nm256_playback_copy(struct snd_pcm_substream *substream,
  597. int channel, /* not used (interleaved data) */
  598. snd_pcm_uframes_t pos,
  599. void __user *src,
  600. snd_pcm_uframes_t count)
  601. {
  602. struct snd_pcm_runtime *runtime = substream->runtime;
  603. struct nm256_stream *s = runtime->private_data;
  604. count = frames_to_bytes(runtime, count);
  605. pos = frames_to_bytes(runtime, pos);
  606. if (copy_from_user_toio(s->bufptr + pos, src, count))
  607. return -EFAULT;
  608. return 0;
  609. }
  610. /*
  611. * copy to user
  612. */
  613. static int
  614. snd_nm256_capture_copy(struct snd_pcm_substream *substream,
  615. int channel, /* not used (interleaved data) */
  616. snd_pcm_uframes_t pos,
  617. void __user *dst,
  618. snd_pcm_uframes_t count)
  619. {
  620. struct snd_pcm_runtime *runtime = substream->runtime;
  621. struct nm256_stream *s = runtime->private_data;
  622. count = frames_to_bytes(runtime, count);
  623. pos = frames_to_bytes(runtime, pos);
  624. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  625. return -EFAULT;
  626. return 0;
  627. }
  628. #endif /* !__i386__ */
  629. /*
  630. * update playback/capture watermarks
  631. */
  632. /* spinlock held! */
  633. static void
  634. snd_nm256_playback_update(struct nm256 *chip)
  635. {
  636. struct nm256_stream *s;
  637. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  638. if (s->running && s->substream) {
  639. spin_unlock(&chip->reg_lock);
  640. snd_pcm_period_elapsed(s->substream);
  641. spin_lock(&chip->reg_lock);
  642. snd_nm256_playback_mark(chip, s);
  643. }
  644. }
  645. /* spinlock held! */
  646. static void
  647. snd_nm256_capture_update(struct nm256 *chip)
  648. {
  649. struct nm256_stream *s;
  650. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  651. if (s->running && s->substream) {
  652. spin_unlock(&chip->reg_lock);
  653. snd_pcm_period_elapsed(s->substream);
  654. spin_lock(&chip->reg_lock);
  655. snd_nm256_capture_mark(chip, s);
  656. }
  657. }
  658. /*
  659. * hardware info
  660. */
  661. static struct snd_pcm_hardware snd_nm256_playback =
  662. {
  663. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  664. SNDRV_PCM_INFO_INTERLEAVED |
  665. /*SNDRV_PCM_INFO_PAUSE |*/
  666. SNDRV_PCM_INFO_RESUME,
  667. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  668. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  669. .rate_min = 8000,
  670. .rate_max = 48000,
  671. .channels_min = 1,
  672. .channels_max = 2,
  673. .periods_min = 2,
  674. .periods_max = 1024,
  675. .buffer_bytes_max = 128 * 1024,
  676. .period_bytes_min = 256,
  677. .period_bytes_max = 128 * 1024,
  678. };
  679. static struct snd_pcm_hardware snd_nm256_capture =
  680. {
  681. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  682. SNDRV_PCM_INFO_INTERLEAVED |
  683. /*SNDRV_PCM_INFO_PAUSE |*/
  684. SNDRV_PCM_INFO_RESUME,
  685. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  686. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  687. .rate_min = 8000,
  688. .rate_max = 48000,
  689. .channels_min = 1,
  690. .channels_max = 2,
  691. .periods_min = 2,
  692. .periods_max = 1024,
  693. .buffer_bytes_max = 128 * 1024,
  694. .period_bytes_min = 256,
  695. .period_bytes_max = 128 * 1024,
  696. };
  697. /* set dma transfer size */
  698. static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
  699. struct snd_pcm_hw_params *hw_params)
  700. {
  701. /* area and addr are already set and unchanged */
  702. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  703. return 0;
  704. }
  705. /*
  706. * open
  707. */
  708. static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
  709. struct snd_pcm_substream *substream,
  710. struct snd_pcm_hardware *hw_ptr)
  711. {
  712. struct snd_pcm_runtime *runtime = substream->runtime;
  713. s->running = 0;
  714. runtime->hw = *hw_ptr;
  715. runtime->hw.buffer_bytes_max = s->bufsize;
  716. runtime->hw.period_bytes_max = s->bufsize / 2;
  717. runtime->dma_area = (void __force *) s->bufptr;
  718. runtime->dma_addr = s->bufptr_addr;
  719. runtime->dma_bytes = s->bufsize;
  720. runtime->private_data = s;
  721. s->substream = substream;
  722. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  723. &constraints_rates);
  724. }
  725. static int
  726. snd_nm256_playback_open(struct snd_pcm_substream *substream)
  727. {
  728. struct nm256 *chip = snd_pcm_substream_chip(substream);
  729. if (snd_nm256_acquire_irq(chip) < 0)
  730. return -EBUSY;
  731. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  732. substream, &snd_nm256_playback);
  733. return 0;
  734. }
  735. static int
  736. snd_nm256_capture_open(struct snd_pcm_substream *substream)
  737. {
  738. struct nm256 *chip = snd_pcm_substream_chip(substream);
  739. if (snd_nm256_acquire_irq(chip) < 0)
  740. return -EBUSY;
  741. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  742. substream, &snd_nm256_capture);
  743. return 0;
  744. }
  745. /*
  746. * close - we don't have to do special..
  747. */
  748. static int
  749. snd_nm256_playback_close(struct snd_pcm_substream *substream)
  750. {
  751. struct nm256 *chip = snd_pcm_substream_chip(substream);
  752. snd_nm256_release_irq(chip);
  753. return 0;
  754. }
  755. static int
  756. snd_nm256_capture_close(struct snd_pcm_substream *substream)
  757. {
  758. struct nm256 *chip = snd_pcm_substream_chip(substream);
  759. snd_nm256_release_irq(chip);
  760. return 0;
  761. }
  762. /*
  763. * create a pcm instance
  764. */
  765. static struct snd_pcm_ops snd_nm256_playback_ops = {
  766. .open = snd_nm256_playback_open,
  767. .close = snd_nm256_playback_close,
  768. .ioctl = snd_pcm_lib_ioctl,
  769. .hw_params = snd_nm256_pcm_hw_params,
  770. .prepare = snd_nm256_pcm_prepare,
  771. .trigger = snd_nm256_playback_trigger,
  772. .pointer = snd_nm256_playback_pointer,
  773. #ifndef __i386__
  774. .copy = snd_nm256_playback_copy,
  775. .silence = snd_nm256_playback_silence,
  776. #endif
  777. .mmap = snd_pcm_lib_mmap_iomem,
  778. };
  779. static struct snd_pcm_ops snd_nm256_capture_ops = {
  780. .open = snd_nm256_capture_open,
  781. .close = snd_nm256_capture_close,
  782. .ioctl = snd_pcm_lib_ioctl,
  783. .hw_params = snd_nm256_pcm_hw_params,
  784. .prepare = snd_nm256_pcm_prepare,
  785. .trigger = snd_nm256_capture_trigger,
  786. .pointer = snd_nm256_capture_pointer,
  787. #ifndef __i386__
  788. .copy = snd_nm256_capture_copy,
  789. #endif
  790. .mmap = snd_pcm_lib_mmap_iomem,
  791. };
  792. static int __devinit
  793. snd_nm256_pcm(struct nm256 *chip, int device)
  794. {
  795. struct snd_pcm *pcm;
  796. int i, err;
  797. for (i = 0; i < 2; i++) {
  798. struct nm256_stream *s = &chip->streams[i];
  799. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  800. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  801. }
  802. err = snd_pcm_new(chip->card, chip->card->driver, device,
  803. 1, 1, &pcm);
  804. if (err < 0)
  805. return err;
  806. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  807. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  808. pcm->private_data = chip;
  809. pcm->info_flags = 0;
  810. chip->pcm = pcm;
  811. return 0;
  812. }
  813. /*
  814. * Initialize the hardware.
  815. */
  816. static void
  817. snd_nm256_init_chip(struct nm256 *chip)
  818. {
  819. /* Reset everything. */
  820. snd_nm256_writeb(chip, 0x0, 0x11);
  821. snd_nm256_writew(chip, 0x214, 0);
  822. /* stop sounds.. */
  823. //snd_nm256_playback_stop(chip);
  824. //snd_nm256_capture_stop(chip);
  825. }
  826. static irqreturn_t
  827. snd_nm256_intr_check(struct nm256 *chip)
  828. {
  829. if (chip->badintrcount++ > 1000) {
  830. /*
  831. * I'm not sure if the best thing is to stop the card from
  832. * playing or just release the interrupt (after all, we're in
  833. * a bad situation, so doing fancy stuff may not be such a good
  834. * idea).
  835. *
  836. * I worry about the card engine continuing to play noise
  837. * over and over, however--that could become a very
  838. * obnoxious problem. And we know that when this usually
  839. * happens things are fairly safe, it just means the user's
  840. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  841. */
  842. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  843. snd_nm256_playback_stop(chip);
  844. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  845. snd_nm256_capture_stop(chip);
  846. chip->badintrcount = 0;
  847. return IRQ_HANDLED;
  848. }
  849. return IRQ_NONE;
  850. }
  851. /*
  852. * Handle a potential interrupt for the device referred to by DEV_ID.
  853. *
  854. * I don't like the cut-n-paste job here either between the two routines,
  855. * but there are sufficient differences between the two interrupt handlers
  856. * that parameterizing it isn't all that great either. (Could use a macro,
  857. * I suppose...yucky bleah.)
  858. */
  859. static irqreturn_t
  860. snd_nm256_interrupt(int irq, void *dev_id)
  861. {
  862. struct nm256 *chip = dev_id;
  863. u16 status;
  864. u8 cbyte;
  865. status = snd_nm256_readw(chip, NM_INT_REG);
  866. /* Not ours. */
  867. if (status == 0)
  868. return snd_nm256_intr_check(chip);
  869. chip->badintrcount = 0;
  870. /* Rather boring; check for individual interrupts and process them. */
  871. spin_lock(&chip->reg_lock);
  872. if (status & NM_PLAYBACK_INT) {
  873. status &= ~NM_PLAYBACK_INT;
  874. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  875. snd_nm256_playback_update(chip);
  876. }
  877. if (status & NM_RECORD_INT) {
  878. status &= ~NM_RECORD_INT;
  879. NM_ACK_INT(chip, NM_RECORD_INT);
  880. snd_nm256_capture_update(chip);
  881. }
  882. if (status & NM_MISC_INT_1) {
  883. status &= ~NM_MISC_INT_1;
  884. NM_ACK_INT(chip, NM_MISC_INT_1);
  885. snd_printd("NM256: Got misc interrupt #1\n");
  886. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  887. cbyte = snd_nm256_readb(chip, 0x400);
  888. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  889. }
  890. if (status & NM_MISC_INT_2) {
  891. status &= ~NM_MISC_INT_2;
  892. NM_ACK_INT(chip, NM_MISC_INT_2);
  893. snd_printd("NM256: Got misc interrupt #2\n");
  894. cbyte = snd_nm256_readb(chip, 0x400);
  895. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  896. }
  897. /* Unknown interrupt. */
  898. if (status) {
  899. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  900. status);
  901. /* Pray. */
  902. NM_ACK_INT(chip, status);
  903. }
  904. spin_unlock(&chip->reg_lock);
  905. return IRQ_HANDLED;
  906. }
  907. /*
  908. * Handle a potential interrupt for the device referred to by DEV_ID.
  909. * This handler is for the 256ZX, and is very similar to the non-ZX
  910. * routine.
  911. */
  912. static irqreturn_t
  913. snd_nm256_interrupt_zx(int irq, void *dev_id)
  914. {
  915. struct nm256 *chip = dev_id;
  916. u32 status;
  917. u8 cbyte;
  918. status = snd_nm256_readl(chip, NM_INT_REG);
  919. /* Not ours. */
  920. if (status == 0)
  921. return snd_nm256_intr_check(chip);
  922. chip->badintrcount = 0;
  923. /* Rather boring; check for individual interrupts and process them. */
  924. spin_lock(&chip->reg_lock);
  925. if (status & NM2_PLAYBACK_INT) {
  926. status &= ~NM2_PLAYBACK_INT;
  927. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  928. snd_nm256_playback_update(chip);
  929. }
  930. if (status & NM2_RECORD_INT) {
  931. status &= ~NM2_RECORD_INT;
  932. NM2_ACK_INT(chip, NM2_RECORD_INT);
  933. snd_nm256_capture_update(chip);
  934. }
  935. if (status & NM2_MISC_INT_1) {
  936. status &= ~NM2_MISC_INT_1;
  937. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  938. snd_printd("NM256: Got misc interrupt #1\n");
  939. cbyte = snd_nm256_readb(chip, 0x400);
  940. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  941. }
  942. if (status & NM2_MISC_INT_2) {
  943. status &= ~NM2_MISC_INT_2;
  944. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  945. snd_printd("NM256: Got misc interrupt #2\n");
  946. cbyte = snd_nm256_readb(chip, 0x400);
  947. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  948. }
  949. /* Unknown interrupt. */
  950. if (status) {
  951. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  952. status);
  953. /* Pray. */
  954. NM2_ACK_INT(chip, status);
  955. }
  956. spin_unlock(&chip->reg_lock);
  957. return IRQ_HANDLED;
  958. }
  959. /*
  960. * AC97 interface
  961. */
  962. /*
  963. * Waits for the mixer to become ready to be written; returns a zero value
  964. * if it timed out.
  965. */
  966. static int
  967. snd_nm256_ac97_ready(struct nm256 *chip)
  968. {
  969. int timeout = 10;
  970. u32 testaddr;
  971. u16 testb;
  972. testaddr = chip->mixer_status_offset;
  973. testb = chip->mixer_status_mask;
  974. /*
  975. * Loop around waiting for the mixer to become ready.
  976. */
  977. while (timeout-- > 0) {
  978. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  979. return 1;
  980. udelay(100);
  981. }
  982. return 0;
  983. }
  984. /*
  985. * Initial register values to be written to the AC97 mixer.
  986. * While most of these are identical to the reset values, we do this
  987. * so that we have most of the register contents cached--this avoids
  988. * reading from the mixer directly (which seems to be problematic,
  989. * probably due to ignorance).
  990. */
  991. struct initialValues {
  992. unsigned short reg;
  993. unsigned short value;
  994. };
  995. static struct initialValues nm256_ac97_init_val[] =
  996. {
  997. { AC97_MASTER, 0x8000 },
  998. { AC97_HEADPHONE, 0x8000 },
  999. { AC97_MASTER_MONO, 0x8000 },
  1000. { AC97_PC_BEEP, 0x8000 },
  1001. { AC97_PHONE, 0x8008 },
  1002. { AC97_MIC, 0x8000 },
  1003. { AC97_LINE, 0x8808 },
  1004. { AC97_CD, 0x8808 },
  1005. { AC97_VIDEO, 0x8808 },
  1006. { AC97_AUX, 0x8808 },
  1007. { AC97_PCM, 0x8808 },
  1008. { AC97_REC_SEL, 0x0000 },
  1009. { AC97_REC_GAIN, 0x0B0B },
  1010. { AC97_GENERAL_PURPOSE, 0x0000 },
  1011. { AC97_3D_CONTROL, 0x8000 },
  1012. { AC97_VENDOR_ID1, 0x8384 },
  1013. { AC97_VENDOR_ID2, 0x7609 },
  1014. };
  1015. static int nm256_ac97_idx(unsigned short reg)
  1016. {
  1017. int i;
  1018. for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
  1019. if (nm256_ac97_init_val[i].reg == reg)
  1020. return i;
  1021. return -1;
  1022. }
  1023. /*
  1024. * some nm256 easily crash when reading from mixer registers
  1025. * thus we're treating it as a write-only mixer and cache the
  1026. * written values
  1027. */
  1028. static unsigned short
  1029. snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  1030. {
  1031. struct nm256 *chip = ac97->private_data;
  1032. int idx = nm256_ac97_idx(reg);
  1033. if (idx < 0)
  1034. return 0;
  1035. return chip->ac97_regs[idx];
  1036. }
  1037. /*
  1038. */
  1039. static void
  1040. snd_nm256_ac97_write(struct snd_ac97 *ac97,
  1041. unsigned short reg, unsigned short val)
  1042. {
  1043. struct nm256 *chip = ac97->private_data;
  1044. int tries = 2;
  1045. int idx = nm256_ac97_idx(reg);
  1046. u32 base;
  1047. if (idx < 0)
  1048. return;
  1049. base = chip->mixer_base;
  1050. snd_nm256_ac97_ready(chip);
  1051. /* Wait for the write to take, too. */
  1052. while (tries-- > 0) {
  1053. snd_nm256_writew(chip, base + reg, val);
  1054. msleep(1); /* a little delay here seems better.. */
  1055. if (snd_nm256_ac97_ready(chip)) {
  1056. /* successful write: set cache */
  1057. chip->ac97_regs[idx] = val;
  1058. return;
  1059. }
  1060. }
  1061. snd_printd("nm256: ac97 codec not ready..\n");
  1062. }
  1063. /* static resolution table */
  1064. static struct snd_ac97_res_table nm256_res_table[] = {
  1065. { AC97_MASTER, 0x1f1f },
  1066. { AC97_HEADPHONE, 0x1f1f },
  1067. { AC97_MASTER_MONO, 0x001f },
  1068. { AC97_PC_BEEP, 0x001f },
  1069. { AC97_PHONE, 0x001f },
  1070. { AC97_MIC, 0x001f },
  1071. { AC97_LINE, 0x1f1f },
  1072. { AC97_CD, 0x1f1f },
  1073. { AC97_VIDEO, 0x1f1f },
  1074. { AC97_AUX, 0x1f1f },
  1075. { AC97_PCM, 0x1f1f },
  1076. { AC97_REC_GAIN, 0x0f0f },
  1077. { } /* terminator */
  1078. };
  1079. /* initialize the ac97 into a known state */
  1080. static void
  1081. snd_nm256_ac97_reset(struct snd_ac97 *ac97)
  1082. {
  1083. struct nm256 *chip = ac97->private_data;
  1084. /* Reset the mixer. 'Tis magic! */
  1085. snd_nm256_writeb(chip, 0x6c0, 1);
  1086. if (! chip->reset_workaround) {
  1087. /* Dell latitude LS will lock up by this */
  1088. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1089. }
  1090. if (! chip->reset_workaround_2) {
  1091. /* Dell latitude CSx will lock up by this */
  1092. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1093. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1094. }
  1095. if (! chip->in_resume) {
  1096. int i;
  1097. for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
  1098. /* preload the cache, so as to avoid even a single
  1099. * read of the mixer regs
  1100. */
  1101. snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
  1102. nm256_ac97_init_val[i].value);
  1103. }
  1104. }
  1105. }
  1106. /* create an ac97 mixer interface */
  1107. static int __devinit
  1108. snd_nm256_mixer(struct nm256 *chip)
  1109. {
  1110. struct snd_ac97_bus *pbus;
  1111. struct snd_ac97_template ac97;
  1112. int err;
  1113. static struct snd_ac97_bus_ops ops = {
  1114. .reset = snd_nm256_ac97_reset,
  1115. .write = snd_nm256_ac97_write,
  1116. .read = snd_nm256_ac97_read,
  1117. };
  1118. chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val),
  1119. sizeof(short), GFP_KERNEL);
  1120. if (! chip->ac97_regs)
  1121. return -ENOMEM;
  1122. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1123. return err;
  1124. memset(&ac97, 0, sizeof(ac97));
  1125. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1126. ac97.private_data = chip;
  1127. ac97.res_table = nm256_res_table;
  1128. pbus->no_vra = 1;
  1129. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1130. if (err < 0)
  1131. return err;
  1132. if (! (chip->ac97->id & (0xf0000000))) {
  1133. /* looks like an invalid id */
  1134. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1135. }
  1136. return 0;
  1137. }
  1138. /*
  1139. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1140. * the associated address as the end of our audio buffer in the video
  1141. * RAM.
  1142. */
  1143. static int __devinit
  1144. snd_nm256_peek_for_sig(struct nm256 *chip)
  1145. {
  1146. /* The signature is located 1K below the end of video RAM. */
  1147. void __iomem *temp;
  1148. /* Default buffer end is 5120 bytes below the top of RAM. */
  1149. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1150. u32 sig;
  1151. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1152. if (temp == NULL) {
  1153. snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
  1154. return -EBUSY;
  1155. }
  1156. sig = readl(temp);
  1157. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1158. u32 pointer = readl(temp + 4);
  1159. /*
  1160. * If it's obviously invalid, don't use it
  1161. */
  1162. if (pointer == 0xffffffff ||
  1163. pointer < chip->buffer_size ||
  1164. pointer > chip->buffer_end) {
  1165. snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
  1166. iounmap(temp);
  1167. return -ENODEV;
  1168. } else {
  1169. pointer_found = pointer;
  1170. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
  1171. pointer);
  1172. }
  1173. }
  1174. iounmap(temp);
  1175. chip->buffer_end = pointer_found;
  1176. return 0;
  1177. }
  1178. #ifdef CONFIG_PM
  1179. /*
  1180. * APM event handler, so the card is properly reinitialized after a power
  1181. * event.
  1182. */
  1183. static int nm256_suspend(struct pci_dev *pci, pm_message_t state)
  1184. {
  1185. struct snd_card *card = pci_get_drvdata(pci);
  1186. struct nm256 *chip = card->private_data;
  1187. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1188. snd_pcm_suspend_all(chip->pcm);
  1189. snd_ac97_suspend(chip->ac97);
  1190. chip->coeffs_current = 0;
  1191. pci_disable_device(pci);
  1192. pci_save_state(pci);
  1193. pci_set_power_state(pci, pci_choose_state(pci, state));
  1194. return 0;
  1195. }
  1196. static int nm256_resume(struct pci_dev *pci)
  1197. {
  1198. struct snd_card *card = pci_get_drvdata(pci);
  1199. struct nm256 *chip = card->private_data;
  1200. int i;
  1201. /* Perform a full reset on the hardware */
  1202. chip->in_resume = 1;
  1203. pci_set_power_state(pci, PCI_D0);
  1204. pci_restore_state(pci);
  1205. if (pci_enable_device(pci) < 0) {
  1206. printk(KERN_ERR "nm256: pci_enable_device failed, "
  1207. "disabling device\n");
  1208. snd_card_disconnect(card);
  1209. return -EIO;
  1210. }
  1211. pci_set_master(pci);
  1212. snd_nm256_init_chip(chip);
  1213. /* restore ac97 */
  1214. snd_ac97_resume(chip->ac97);
  1215. for (i = 0; i < 2; i++) {
  1216. struct nm256_stream *s = &chip->streams[i];
  1217. if (s->substream && s->suspended) {
  1218. spin_lock_irq(&chip->reg_lock);
  1219. snd_nm256_set_format(chip, s, s->substream);
  1220. spin_unlock_irq(&chip->reg_lock);
  1221. }
  1222. }
  1223. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1224. chip->in_resume = 0;
  1225. return 0;
  1226. }
  1227. #endif /* CONFIG_PM */
  1228. static int snd_nm256_free(struct nm256 *chip)
  1229. {
  1230. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1231. snd_nm256_playback_stop(chip);
  1232. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1233. snd_nm256_capture_stop(chip);
  1234. if (chip->irq >= 0)
  1235. free_irq(chip->irq, chip);
  1236. if (chip->cport)
  1237. iounmap(chip->cport);
  1238. if (chip->buffer)
  1239. iounmap(chip->buffer);
  1240. release_and_free_resource(chip->res_cport);
  1241. release_and_free_resource(chip->res_buffer);
  1242. pci_disable_device(chip->pci);
  1243. kfree(chip->ac97_regs);
  1244. kfree(chip);
  1245. return 0;
  1246. }
  1247. static int snd_nm256_dev_free(struct snd_device *device)
  1248. {
  1249. struct nm256 *chip = device->device_data;
  1250. return snd_nm256_free(chip);
  1251. }
  1252. static int __devinit
  1253. snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
  1254. struct nm256 **chip_ret)
  1255. {
  1256. struct nm256 *chip;
  1257. int err, pval;
  1258. static struct snd_device_ops ops = {
  1259. .dev_free = snd_nm256_dev_free,
  1260. };
  1261. u32 addr;
  1262. *chip_ret = NULL;
  1263. if ((err = pci_enable_device(pci)) < 0)
  1264. return err;
  1265. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1266. if (chip == NULL) {
  1267. pci_disable_device(pci);
  1268. return -ENOMEM;
  1269. }
  1270. chip->card = card;
  1271. chip->pci = pci;
  1272. chip->use_cache = use_cache;
  1273. spin_lock_init(&chip->reg_lock);
  1274. chip->irq = -1;
  1275. mutex_init(&chip->irq_mutex);
  1276. /* store buffer sizes in bytes */
  1277. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
  1278. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
  1279. /*
  1280. * The NM256 has two memory ports. The first port is nothing
  1281. * more than a chunk of video RAM, which is used as the I/O ring
  1282. * buffer. The second port has the actual juicy stuff (like the
  1283. * mixer and the playback engine control registers).
  1284. */
  1285. chip->buffer_addr = pci_resource_start(pci, 0);
  1286. chip->cport_addr = pci_resource_start(pci, 1);
  1287. /* Init the memory port info. */
  1288. /* remap control port (#2) */
  1289. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1290. card->driver);
  1291. if (chip->res_cport == NULL) {
  1292. snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
  1293. chip->cport_addr, NM_PORT2_SIZE);
  1294. err = -EBUSY;
  1295. goto __error;
  1296. }
  1297. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1298. if (chip->cport == NULL) {
  1299. snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
  1300. err = -ENOMEM;
  1301. goto __error;
  1302. }
  1303. if (!strcmp(card->driver, "NM256AV")) {
  1304. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1305. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1306. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1307. if (! force_ac97) {
  1308. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1309. printk(KERN_ERR " force the driver to load by "
  1310. "passing in the module parameter\n");
  1311. printk(KERN_ERR " force_ac97=1\n");
  1312. printk(KERN_ERR " or try sb16, opl3sa2, or "
  1313. "cs423x drivers instead.\n");
  1314. err = -ENXIO;
  1315. goto __error;
  1316. }
  1317. }
  1318. chip->buffer_end = 2560 * 1024;
  1319. chip->interrupt = snd_nm256_interrupt;
  1320. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1321. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1322. } else {
  1323. /* Not sure if there is any relevant detect for the ZX or not. */
  1324. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1325. chip->buffer_end = 6144 * 1024;
  1326. else
  1327. chip->buffer_end = 4096 * 1024;
  1328. chip->interrupt = snd_nm256_interrupt_zx;
  1329. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1330. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1331. }
  1332. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
  1333. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1334. if (chip->use_cache)
  1335. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1336. else
  1337. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1338. if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
  1339. chip->buffer_end = buffer_top;
  1340. else {
  1341. /* get buffer end pointer from signature */
  1342. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1343. goto __error;
  1344. }
  1345. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1346. chip->buffer_addr += chip->buffer_start;
  1347. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1348. chip->buffer_start, chip->buffer_end);
  1349. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1350. chip->buffer_size,
  1351. card->driver);
  1352. if (chip->res_buffer == NULL) {
  1353. snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
  1354. chip->buffer_addr, chip->buffer_size);
  1355. err = -EBUSY;
  1356. goto __error;
  1357. }
  1358. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1359. if (chip->buffer == NULL) {
  1360. err = -ENOMEM;
  1361. snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
  1362. goto __error;
  1363. }
  1364. /* set offsets */
  1365. addr = chip->buffer_start;
  1366. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1367. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1368. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1369. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1370. if (chip->use_cache) {
  1371. chip->all_coeff_buf = addr;
  1372. } else {
  1373. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1374. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1375. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1376. }
  1377. /* Fixed setting. */
  1378. chip->mixer_base = NM_MIXER_OFFSET;
  1379. chip->coeffs_current = 0;
  1380. snd_nm256_init_chip(chip);
  1381. // pci_set_master(pci); /* needed? */
  1382. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1383. goto __error;
  1384. snd_card_set_dev(card, &pci->dev);
  1385. *chip_ret = chip;
  1386. return 0;
  1387. __error:
  1388. snd_nm256_free(chip);
  1389. return err;
  1390. }
  1391. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
  1392. static struct snd_pci_quirk nm256_quirks[] __devinitdata = {
  1393. /* HP omnibook 4150 has cs4232 codec internally */
  1394. SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED),
  1395. /* Reset workarounds to avoid lock-ups */
  1396. SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
  1397. SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
  1398. SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
  1399. { } /* terminator */
  1400. };
  1401. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1402. const struct pci_device_id *pci_id)
  1403. {
  1404. struct snd_card *card;
  1405. struct nm256 *chip;
  1406. int err;
  1407. const struct snd_pci_quirk *q;
  1408. q = snd_pci_quirk_lookup(pci, nm256_quirks);
  1409. if (q) {
  1410. snd_printdd(KERN_INFO "nm256: Enabled quirk for %s.\n", q->name);
  1411. switch (q->value) {
  1412. case NM_BLACKLISTED:
  1413. printk(KERN_INFO "nm256: The device is blacklisted. "
  1414. "Loading stopped\n");
  1415. return -ENODEV;
  1416. case NM_RESET_WORKAROUND_2:
  1417. reset_workaround_2 = 1;
  1418. /* Fall-through */
  1419. case NM_RESET_WORKAROUND:
  1420. reset_workaround = 1;
  1421. break;
  1422. }
  1423. }
  1424. card = snd_card_new(index, id, THIS_MODULE, 0);
  1425. if (card == NULL)
  1426. return -ENOMEM;
  1427. switch (pci->device) {
  1428. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1429. strcpy(card->driver, "NM256AV");
  1430. break;
  1431. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1432. strcpy(card->driver, "NM256ZX");
  1433. break;
  1434. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1435. strcpy(card->driver, "NM256XL+");
  1436. break;
  1437. default:
  1438. snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
  1439. snd_card_free(card);
  1440. return -EINVAL;
  1441. }
  1442. if (vaio_hack)
  1443. buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1444. if (playback_bufsize < 4)
  1445. playback_bufsize = 4;
  1446. if (playback_bufsize > 128)
  1447. playback_bufsize = 128;
  1448. if (capture_bufsize < 4)
  1449. capture_bufsize = 4;
  1450. if (capture_bufsize > 128)
  1451. capture_bufsize = 128;
  1452. if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
  1453. snd_card_free(card);
  1454. return err;
  1455. }
  1456. card->private_data = chip;
  1457. if (reset_workaround) {
  1458. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1459. chip->reset_workaround = 1;
  1460. }
  1461. if (reset_workaround_2) {
  1462. snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
  1463. chip->reset_workaround_2 = 1;
  1464. }
  1465. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1466. (err = snd_nm256_mixer(chip)) < 0) {
  1467. snd_card_free(card);
  1468. return err;
  1469. }
  1470. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1471. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1472. card->shortname,
  1473. chip->buffer_addr, chip->cport_addr, chip->irq);
  1474. if ((err = snd_card_register(card)) < 0) {
  1475. snd_card_free(card);
  1476. return err;
  1477. }
  1478. pci_set_drvdata(pci, card);
  1479. return 0;
  1480. }
  1481. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1482. {
  1483. snd_card_free(pci_get_drvdata(pci));
  1484. pci_set_drvdata(pci, NULL);
  1485. }
  1486. static struct pci_driver driver = {
  1487. .name = "NeoMagic 256",
  1488. .id_table = snd_nm256_ids,
  1489. .probe = snd_nm256_probe,
  1490. .remove = __devexit_p(snd_nm256_remove),
  1491. #ifdef CONFIG_PM
  1492. .suspend = nm256_suspend,
  1493. .resume = nm256_resume,
  1494. #endif
  1495. };
  1496. static int __init alsa_card_nm256_init(void)
  1497. {
  1498. return pci_register_driver(&driver);
  1499. }
  1500. static void __exit alsa_card_nm256_exit(void)
  1501. {
  1502. pci_unregister_driver(&driver);
  1503. }
  1504. module_init(alsa_card_nm256_init)
  1505. module_exit(alsa_card_nm256_exit)