swiotlb.c 24 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/string.h>
  24. #include <linux/types.h>
  25. #include <linux/ctype.h>
  26. #include <asm/io.h>
  27. #include <asm/dma.h>
  28. #include <asm/scatterlist.h>
  29. #include <linux/init.h>
  30. #include <linux/bootmem.h>
  31. #include <linux/iommu-helper.h>
  32. #define OFFSET(val,align) ((unsigned long) \
  33. ( (val) & ( (align) - 1)))
  34. #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
  35. #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
  36. /*
  37. * Maximum allowable number of contiguous slabs to map,
  38. * must be a power of 2. What is the appropriate value ?
  39. * The complexity of {map,unmap}_single is linearly dependent on this value.
  40. */
  41. #define IO_TLB_SEGSIZE 128
  42. /*
  43. * log of the size of each IO TLB slab. The number of slabs is command line
  44. * controllable.
  45. */
  46. #define IO_TLB_SHIFT 11
  47. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  48. /*
  49. * Minimum IO TLB size to bother booting with. Systems with mainly
  50. * 64bit capable cards will only lightly use the swiotlb. If we can't
  51. * allocate a contiguous 1MB, we're probably in trouble anyway.
  52. */
  53. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  54. /*
  55. * Enumeration for sync targets
  56. */
  57. enum dma_sync_target {
  58. SYNC_FOR_CPU = 0,
  59. SYNC_FOR_DEVICE = 1,
  60. };
  61. int swiotlb_force;
  62. /*
  63. * Used to do a quick range check in swiotlb_unmap_single and
  64. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  65. * API.
  66. */
  67. static char *io_tlb_start, *io_tlb_end;
  68. /*
  69. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  70. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  71. */
  72. static unsigned long io_tlb_nslabs;
  73. /*
  74. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  75. */
  76. static unsigned long io_tlb_overflow = 32*1024;
  77. void *io_tlb_overflow_buffer;
  78. /*
  79. * This is a free list describing the number of free entries available from
  80. * each index
  81. */
  82. static unsigned int *io_tlb_list;
  83. static unsigned int io_tlb_index;
  84. /*
  85. * We need to save away the original address corresponding to a mapped entry
  86. * for the sync operations.
  87. */
  88. static unsigned char **io_tlb_orig_addr;
  89. /*
  90. * Protect the above data structures in the map and unmap calls
  91. */
  92. static DEFINE_SPINLOCK(io_tlb_lock);
  93. static int __init
  94. setup_io_tlb_npages(char *str)
  95. {
  96. if (isdigit(*str)) {
  97. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  98. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  99. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  100. }
  101. if (*str == ',')
  102. ++str;
  103. if (!strcmp(str, "force"))
  104. swiotlb_force = 1;
  105. return 1;
  106. }
  107. __setup("swiotlb=", setup_io_tlb_npages);
  108. /* make io_tlb_overflow tunable too? */
  109. /*
  110. * Statically reserve bounce buffer space and initialize bounce buffer data
  111. * structures for the software IO TLB used to implement the DMA API.
  112. */
  113. void __init
  114. swiotlb_init_with_default_size(size_t default_size)
  115. {
  116. unsigned long i, bytes;
  117. if (!io_tlb_nslabs) {
  118. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  119. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  120. }
  121. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  122. /*
  123. * Get IO TLB memory from the low pages
  124. */
  125. io_tlb_start = alloc_bootmem_low_pages(bytes);
  126. if (!io_tlb_start)
  127. panic("Cannot allocate SWIOTLB buffer");
  128. io_tlb_end = io_tlb_start + bytes;
  129. /*
  130. * Allocate and initialize the free list array. This array is used
  131. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  132. * between io_tlb_start and io_tlb_end.
  133. */
  134. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  135. for (i = 0; i < io_tlb_nslabs; i++)
  136. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  137. io_tlb_index = 0;
  138. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
  139. /*
  140. * Get the overflow emergency buffer
  141. */
  142. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  143. if (!io_tlb_overflow_buffer)
  144. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  145. printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
  146. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  147. }
  148. void __init
  149. swiotlb_init(void)
  150. {
  151. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  152. }
  153. /*
  154. * Systems with larger DMA zones (those that don't support ISA) can
  155. * initialize the swiotlb later using the slab allocator if needed.
  156. * This should be just like above, but with some error catching.
  157. */
  158. int
  159. swiotlb_late_init_with_default_size(size_t default_size)
  160. {
  161. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  162. unsigned int order;
  163. if (!io_tlb_nslabs) {
  164. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  165. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  166. }
  167. /*
  168. * Get IO TLB memory from the low pages
  169. */
  170. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  171. io_tlb_nslabs = SLABS_PER_PAGE << order;
  172. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  173. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  174. io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  175. order);
  176. if (io_tlb_start)
  177. break;
  178. order--;
  179. }
  180. if (!io_tlb_start)
  181. goto cleanup1;
  182. if (order != get_order(bytes)) {
  183. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  184. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  185. io_tlb_nslabs = SLABS_PER_PAGE << order;
  186. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  187. }
  188. io_tlb_end = io_tlb_start + bytes;
  189. memset(io_tlb_start, 0, bytes);
  190. /*
  191. * Allocate and initialize the free list array. This array is used
  192. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  193. * between io_tlb_start and io_tlb_end.
  194. */
  195. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  196. get_order(io_tlb_nslabs * sizeof(int)));
  197. if (!io_tlb_list)
  198. goto cleanup2;
  199. for (i = 0; i < io_tlb_nslabs; i++)
  200. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  201. io_tlb_index = 0;
  202. io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
  203. get_order(io_tlb_nslabs * sizeof(char *)));
  204. if (!io_tlb_orig_addr)
  205. goto cleanup3;
  206. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
  207. /*
  208. * Get the overflow emergency buffer
  209. */
  210. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  211. get_order(io_tlb_overflow));
  212. if (!io_tlb_overflow_buffer)
  213. goto cleanup4;
  214. printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
  215. "0x%lx\n", bytes >> 20,
  216. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  217. return 0;
  218. cleanup4:
  219. free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
  220. sizeof(char *)));
  221. io_tlb_orig_addr = NULL;
  222. cleanup3:
  223. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  224. sizeof(int)));
  225. io_tlb_list = NULL;
  226. cleanup2:
  227. io_tlb_end = NULL;
  228. free_pages((unsigned long)io_tlb_start, order);
  229. io_tlb_start = NULL;
  230. cleanup1:
  231. io_tlb_nslabs = req_nslabs;
  232. return -ENOMEM;
  233. }
  234. static int
  235. address_needs_mapping(struct device *hwdev, dma_addr_t addr)
  236. {
  237. dma_addr_t mask = 0xffffffff;
  238. /* If the device has a mask, use it, otherwise default to 32 bits */
  239. if (hwdev && hwdev->dma_mask)
  240. mask = *hwdev->dma_mask;
  241. return (addr & ~mask) != 0;
  242. }
  243. /*
  244. * Allocates bounce buffer and returns its kernel virtual address.
  245. */
  246. static void *
  247. map_single(struct device *hwdev, char *buffer, size_t size, int dir)
  248. {
  249. unsigned long flags;
  250. char *dma_addr;
  251. unsigned int nslots, stride, index, wrap;
  252. int i;
  253. unsigned long start_dma_addr;
  254. unsigned long mask;
  255. unsigned long offset_slots;
  256. unsigned long max_slots;
  257. mask = dma_get_seg_boundary(hwdev);
  258. start_dma_addr = virt_to_bus(io_tlb_start) & mask;
  259. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  260. max_slots = mask + 1
  261. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  262. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  263. /*
  264. * For mappings greater than a page, we limit the stride (and
  265. * hence alignment) to a page size.
  266. */
  267. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  268. if (size > PAGE_SIZE)
  269. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  270. else
  271. stride = 1;
  272. BUG_ON(!nslots);
  273. /*
  274. * Find suitable number of IO TLB entries size that will fit this
  275. * request and allocate a buffer from that IO TLB pool.
  276. */
  277. spin_lock_irqsave(&io_tlb_lock, flags);
  278. index = ALIGN(io_tlb_index, stride);
  279. if (index >= io_tlb_nslabs)
  280. index = 0;
  281. wrap = index;
  282. do {
  283. while (iommu_is_span_boundary(index, nslots, offset_slots,
  284. max_slots)) {
  285. index += stride;
  286. if (index >= io_tlb_nslabs)
  287. index = 0;
  288. if (index == wrap)
  289. goto not_found;
  290. }
  291. /*
  292. * If we find a slot that indicates we have 'nslots' number of
  293. * contiguous buffers, we allocate the buffers from that slot
  294. * and mark the entries as '0' indicating unavailable.
  295. */
  296. if (io_tlb_list[index] >= nslots) {
  297. int count = 0;
  298. for (i = index; i < (int) (index + nslots); i++)
  299. io_tlb_list[i] = 0;
  300. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  301. io_tlb_list[i] = ++count;
  302. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  303. /*
  304. * Update the indices to avoid searching in the next
  305. * round.
  306. */
  307. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  308. ? (index + nslots) : 0);
  309. goto found;
  310. }
  311. index += stride;
  312. if (index >= io_tlb_nslabs)
  313. index = 0;
  314. } while (index != wrap);
  315. not_found:
  316. spin_unlock_irqrestore(&io_tlb_lock, flags);
  317. return NULL;
  318. found:
  319. spin_unlock_irqrestore(&io_tlb_lock, flags);
  320. /*
  321. * Save away the mapping from the original address to the DMA address.
  322. * This is needed when we sync the memory. Then we sync the buffer if
  323. * needed.
  324. */
  325. for (i = 0; i < nslots; i++)
  326. io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
  327. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  328. memcpy(dma_addr, buffer, size);
  329. return dma_addr;
  330. }
  331. /*
  332. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  333. */
  334. static void
  335. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  336. {
  337. unsigned long flags;
  338. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  339. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  340. char *buffer = io_tlb_orig_addr[index];
  341. /*
  342. * First, sync the memory before unmapping the entry
  343. */
  344. if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  345. /*
  346. * bounce... copy the data back into the original buffer * and
  347. * delete the bounce buffer.
  348. */
  349. memcpy(buffer, dma_addr, size);
  350. /*
  351. * Return the buffer to the free list by setting the corresponding
  352. * entries to indicate the number of contigous entries available.
  353. * While returning the entries to the free list, we merge the entries
  354. * with slots below and above the pool being returned.
  355. */
  356. spin_lock_irqsave(&io_tlb_lock, flags);
  357. {
  358. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  359. io_tlb_list[index + nslots] : 0);
  360. /*
  361. * Step 1: return the slots to the free list, merging the
  362. * slots with superceeding slots
  363. */
  364. for (i = index + nslots - 1; i >= index; i--)
  365. io_tlb_list[i] = ++count;
  366. /*
  367. * Step 2: merge the returned slots with the preceding slots,
  368. * if available (non zero)
  369. */
  370. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  371. io_tlb_list[i] = ++count;
  372. }
  373. spin_unlock_irqrestore(&io_tlb_lock, flags);
  374. }
  375. static void
  376. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  377. int dir, int target)
  378. {
  379. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  380. char *buffer = io_tlb_orig_addr[index];
  381. buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  382. switch (target) {
  383. case SYNC_FOR_CPU:
  384. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  385. memcpy(buffer, dma_addr, size);
  386. else
  387. BUG_ON(dir != DMA_TO_DEVICE);
  388. break;
  389. case SYNC_FOR_DEVICE:
  390. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  391. memcpy(dma_addr, buffer, size);
  392. else
  393. BUG_ON(dir != DMA_FROM_DEVICE);
  394. break;
  395. default:
  396. BUG();
  397. }
  398. }
  399. void *
  400. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  401. dma_addr_t *dma_handle, gfp_t flags)
  402. {
  403. dma_addr_t dev_addr;
  404. void *ret;
  405. int order = get_order(size);
  406. /*
  407. * XXX fix me: the DMA API should pass us an explicit DMA mask
  408. * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
  409. * bit range instead of a 16MB one).
  410. */
  411. flags |= GFP_DMA;
  412. ret = (void *)__get_free_pages(flags, order);
  413. if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
  414. /*
  415. * The allocated memory isn't reachable by the device.
  416. * Fall back on swiotlb_map_single().
  417. */
  418. free_pages((unsigned long) ret, order);
  419. ret = NULL;
  420. }
  421. if (!ret) {
  422. /*
  423. * We are either out of memory or the device can't DMA
  424. * to GFP_DMA memory; fall back on
  425. * swiotlb_map_single(), which will grab memory from
  426. * the lowest available address range.
  427. */
  428. dma_addr_t handle;
  429. handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
  430. if (swiotlb_dma_mapping_error(handle))
  431. return NULL;
  432. ret = bus_to_virt(handle);
  433. }
  434. memset(ret, 0, size);
  435. dev_addr = virt_to_bus(ret);
  436. /* Confirm address can be DMA'd by device */
  437. if (address_needs_mapping(hwdev, dev_addr)) {
  438. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  439. (unsigned long long)*hwdev->dma_mask,
  440. (unsigned long long)dev_addr);
  441. panic("swiotlb_alloc_coherent: allocated memory is out of "
  442. "range for device");
  443. }
  444. *dma_handle = dev_addr;
  445. return ret;
  446. }
  447. void
  448. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  449. dma_addr_t dma_handle)
  450. {
  451. WARN_ON(irqs_disabled());
  452. if (!(vaddr >= (void *)io_tlb_start
  453. && vaddr < (void *)io_tlb_end))
  454. free_pages((unsigned long) vaddr, get_order(size));
  455. else
  456. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  457. swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
  458. }
  459. static void
  460. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  461. {
  462. /*
  463. * Ran out of IOMMU space for this operation. This is very bad.
  464. * Unfortunately the drivers cannot handle this operation properly.
  465. * unless they check for dma_mapping_error (most don't)
  466. * When the mapping is small enough return a static buffer to limit
  467. * the damage, or panic when the transfer is too big.
  468. */
  469. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  470. "device %s\n", size, dev ? dev->bus_id : "?");
  471. if (size > io_tlb_overflow && do_panic) {
  472. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  473. panic("DMA: Memory would be corrupted\n");
  474. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  475. panic("DMA: Random memory would be DMAed\n");
  476. }
  477. }
  478. /*
  479. * Map a single buffer of the indicated size for DMA in streaming mode. The
  480. * physical address to use is returned.
  481. *
  482. * Once the device is given the dma address, the device owns this memory until
  483. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  484. */
  485. dma_addr_t
  486. swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
  487. int dir, struct dma_attrs *attrs)
  488. {
  489. dma_addr_t dev_addr = virt_to_bus(ptr);
  490. void *map;
  491. BUG_ON(dir == DMA_NONE);
  492. /*
  493. * If the pointer passed in happens to be in the device's DMA window,
  494. * we can safely return the device addr and not worry about bounce
  495. * buffering it.
  496. */
  497. if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
  498. return dev_addr;
  499. /*
  500. * Oh well, have to allocate and map a bounce buffer.
  501. */
  502. map = map_single(hwdev, ptr, size, dir);
  503. if (!map) {
  504. swiotlb_full(hwdev, size, dir, 1);
  505. map = io_tlb_overflow_buffer;
  506. }
  507. dev_addr = virt_to_bus(map);
  508. /*
  509. * Ensure that the address returned is DMA'ble
  510. */
  511. if (address_needs_mapping(hwdev, dev_addr))
  512. panic("map_single: bounce buffer is not DMA'ble");
  513. return dev_addr;
  514. }
  515. EXPORT_SYMBOL(swiotlb_map_single_attrs);
  516. dma_addr_t
  517. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  518. {
  519. return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
  520. }
  521. /*
  522. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  523. * match what was provided for in a previous swiotlb_map_single call. All
  524. * other usages are undefined.
  525. *
  526. * After this call, reads by the cpu to the buffer are guaranteed to see
  527. * whatever the device wrote there.
  528. */
  529. void
  530. swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
  531. size_t size, int dir, struct dma_attrs *attrs)
  532. {
  533. char *dma_addr = bus_to_virt(dev_addr);
  534. BUG_ON(dir == DMA_NONE);
  535. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  536. unmap_single(hwdev, dma_addr, size, dir);
  537. else if (dir == DMA_FROM_DEVICE)
  538. dma_mark_clean(dma_addr, size);
  539. }
  540. EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
  541. void
  542. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  543. int dir)
  544. {
  545. return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
  546. }
  547. /*
  548. * Make physical memory consistent for a single streaming mode DMA translation
  549. * after a transfer.
  550. *
  551. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  552. * using the cpu, yet do not wish to teardown the dma mapping, you must
  553. * call this function before doing so. At the next point you give the dma
  554. * address back to the card, you must first perform a
  555. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  556. */
  557. static void
  558. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  559. size_t size, int dir, int target)
  560. {
  561. char *dma_addr = bus_to_virt(dev_addr);
  562. BUG_ON(dir == DMA_NONE);
  563. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  564. sync_single(hwdev, dma_addr, size, dir, target);
  565. else if (dir == DMA_FROM_DEVICE)
  566. dma_mark_clean(dma_addr, size);
  567. }
  568. void
  569. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  570. size_t size, int dir)
  571. {
  572. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  573. }
  574. void
  575. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  576. size_t size, int dir)
  577. {
  578. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  579. }
  580. /*
  581. * Same as above, but for a sub-range of the mapping.
  582. */
  583. static void
  584. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  585. unsigned long offset, size_t size,
  586. int dir, int target)
  587. {
  588. char *dma_addr = bus_to_virt(dev_addr) + offset;
  589. BUG_ON(dir == DMA_NONE);
  590. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  591. sync_single(hwdev, dma_addr, size, dir, target);
  592. else if (dir == DMA_FROM_DEVICE)
  593. dma_mark_clean(dma_addr, size);
  594. }
  595. void
  596. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  597. unsigned long offset, size_t size, int dir)
  598. {
  599. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  600. SYNC_FOR_CPU);
  601. }
  602. void
  603. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  604. unsigned long offset, size_t size, int dir)
  605. {
  606. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  607. SYNC_FOR_DEVICE);
  608. }
  609. void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
  610. struct dma_attrs *);
  611. /*
  612. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  613. * This is the scatter-gather version of the above swiotlb_map_single
  614. * interface. Here the scatter gather list elements are each tagged with the
  615. * appropriate dma address and length. They are obtained via
  616. * sg_dma_{address,length}(SG).
  617. *
  618. * NOTE: An implementation may be able to use a smaller number of
  619. * DMA address/length pairs than there are SG table elements.
  620. * (for example via virtual mapping capabilities)
  621. * The routine returns the number of addr/length pairs actually
  622. * used, at most nents.
  623. *
  624. * Device ownership issues as mentioned above for swiotlb_map_single are the
  625. * same here.
  626. */
  627. int
  628. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  629. int dir, struct dma_attrs *attrs)
  630. {
  631. struct scatterlist *sg;
  632. void *addr;
  633. dma_addr_t dev_addr;
  634. int i;
  635. BUG_ON(dir == DMA_NONE);
  636. for_each_sg(sgl, sg, nelems, i) {
  637. addr = SG_ENT_VIRT_ADDRESS(sg);
  638. dev_addr = virt_to_bus(addr);
  639. if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
  640. void *map = map_single(hwdev, addr, sg->length, dir);
  641. if (!map) {
  642. /* Don't panic here, we expect map_sg users
  643. to do proper error handling. */
  644. swiotlb_full(hwdev, sg->length, dir, 0);
  645. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  646. attrs);
  647. sgl[0].dma_length = 0;
  648. return 0;
  649. }
  650. sg->dma_address = virt_to_bus(map);
  651. } else
  652. sg->dma_address = dev_addr;
  653. sg->dma_length = sg->length;
  654. }
  655. return nelems;
  656. }
  657. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  658. int
  659. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  660. int dir)
  661. {
  662. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  663. }
  664. /*
  665. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  666. * concerning calls here are the same as for swiotlb_unmap_single() above.
  667. */
  668. void
  669. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  670. int nelems, int dir, struct dma_attrs *attrs)
  671. {
  672. struct scatterlist *sg;
  673. int i;
  674. BUG_ON(dir == DMA_NONE);
  675. for_each_sg(sgl, sg, nelems, i) {
  676. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  677. unmap_single(hwdev, bus_to_virt(sg->dma_address),
  678. sg->dma_length, dir);
  679. else if (dir == DMA_FROM_DEVICE)
  680. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  681. }
  682. }
  683. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  684. void
  685. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  686. int dir)
  687. {
  688. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  689. }
  690. /*
  691. * Make physical memory consistent for a set of streaming mode DMA translations
  692. * after a transfer.
  693. *
  694. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  695. * and usage.
  696. */
  697. static void
  698. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  699. int nelems, int dir, int target)
  700. {
  701. struct scatterlist *sg;
  702. int i;
  703. BUG_ON(dir == DMA_NONE);
  704. for_each_sg(sgl, sg, nelems, i) {
  705. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  706. sync_single(hwdev, bus_to_virt(sg->dma_address),
  707. sg->dma_length, dir, target);
  708. else if (dir == DMA_FROM_DEVICE)
  709. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  710. }
  711. }
  712. void
  713. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  714. int nelems, int dir)
  715. {
  716. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  717. }
  718. void
  719. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  720. int nelems, int dir)
  721. {
  722. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  723. }
  724. int
  725. swiotlb_dma_mapping_error(dma_addr_t dma_addr)
  726. {
  727. return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
  728. }
  729. /*
  730. * Return whether the given device DMA address mask can be supported
  731. * properly. For example, if your device can only drive the low 24-bits
  732. * during bus mastering, then you would pass 0x00ffffff as the mask to
  733. * this function.
  734. */
  735. int
  736. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  737. {
  738. return virt_to_bus(io_tlb_end - 1) <= mask;
  739. }
  740. EXPORT_SYMBOL(swiotlb_map_single);
  741. EXPORT_SYMBOL(swiotlb_unmap_single);
  742. EXPORT_SYMBOL(swiotlb_map_sg);
  743. EXPORT_SYMBOL(swiotlb_unmap_sg);
  744. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  745. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  746. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  747. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  748. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  749. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  750. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  751. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  752. EXPORT_SYMBOL(swiotlb_free_coherent);
  753. EXPORT_SYMBOL(swiotlb_dma_supported);