s3c2410_wdt.c 13 KB

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  1. /* linux/drivers/char/watchdog/s3c2410_wdt.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 Watchdog Timer Support
  7. *
  8. * Based on, softdog.c by Alan Cox,
  9. * (c) Copyright 1996 Alan Cox <alan@redhat.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * Changelog:
  26. * 05-Oct-2004 BJD Added semaphore init to stop crashes on open
  27. * Fixed tmr_count / wdt_count confusion
  28. * Added configurable debug
  29. *
  30. * 11-Jan-2005 BJD Fixed divide-by-2 in timeout code
  31. *
  32. * 25-Jan-2005 DA Added suspend/resume support
  33. * Replaced reboot notifier with .shutdown method
  34. *
  35. * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
  36. */
  37. #include <linux/module.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/types.h>
  40. #include <linux/timer.h>
  41. #include <linux/miscdevice.h>
  42. #include <linux/watchdog.h>
  43. #include <linux/fs.h>
  44. #include <linux/init.h>
  45. #include <linux/platform_device.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/clk.h>
  48. #include <asm/uaccess.h>
  49. #include <asm/io.h>
  50. #include <asm/arch/map.h>
  51. #undef S3C_VA_WATCHDOG
  52. #define S3C_VA_WATCHDOG (0)
  53. #include <asm/plat-s3c/regs-watchdog.h>
  54. #define PFX "s3c2410-wdt: "
  55. #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
  56. #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
  57. static int nowayout = WATCHDOG_NOWAYOUT;
  58. static int tmr_margin = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME;
  59. static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
  60. static int soft_noboot = 0;
  61. static int debug = 0;
  62. module_param(tmr_margin, int, 0);
  63. module_param(tmr_atboot, int, 0);
  64. module_param(nowayout, int, 0);
  65. module_param(soft_noboot, int, 0);
  66. module_param(debug, int, 0);
  67. MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
  68. MODULE_PARM_DESC(tmr_atboot, "Watchdog is started at boot time if set to 1, default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
  69. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  70. MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default depends on ONLY_TESTING)");
  71. MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug, (default 0)");
  72. typedef enum close_state {
  73. CLOSE_STATE_NOT,
  74. CLOSE_STATE_ALLOW=0x4021
  75. } close_state_t;
  76. static DECLARE_MUTEX(open_lock);
  77. static struct device *wdt_dev; /* platform device attached to */
  78. static struct resource *wdt_mem;
  79. static struct resource *wdt_irq;
  80. static struct clk *wdt_clock;
  81. static void __iomem *wdt_base;
  82. static unsigned int wdt_count;
  83. static close_state_t allow_close;
  84. /* watchdog control routines */
  85. #define DBG(msg...) do { \
  86. if (debug) \
  87. printk(KERN_INFO msg); \
  88. } while(0)
  89. /* functions */
  90. static int s3c2410wdt_keepalive(void)
  91. {
  92. writel(wdt_count, wdt_base + S3C2410_WTCNT);
  93. return 0;
  94. }
  95. static int s3c2410wdt_stop(void)
  96. {
  97. unsigned long wtcon;
  98. wtcon = readl(wdt_base + S3C2410_WTCON);
  99. wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
  100. writel(wtcon, wdt_base + S3C2410_WTCON);
  101. return 0;
  102. }
  103. static int s3c2410wdt_start(void)
  104. {
  105. unsigned long wtcon;
  106. s3c2410wdt_stop();
  107. wtcon = readl(wdt_base + S3C2410_WTCON);
  108. wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
  109. if (soft_noboot) {
  110. wtcon |= S3C2410_WTCON_INTEN;
  111. wtcon &= ~S3C2410_WTCON_RSTEN;
  112. } else {
  113. wtcon &= ~S3C2410_WTCON_INTEN;
  114. wtcon |= S3C2410_WTCON_RSTEN;
  115. }
  116. DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
  117. __func__, wdt_count, wtcon);
  118. writel(wdt_count, wdt_base + S3C2410_WTDAT);
  119. writel(wdt_count, wdt_base + S3C2410_WTCNT);
  120. writel(wtcon, wdt_base + S3C2410_WTCON);
  121. return 0;
  122. }
  123. static int s3c2410wdt_set_heartbeat(int timeout)
  124. {
  125. unsigned int freq = clk_get_rate(wdt_clock);
  126. unsigned int count;
  127. unsigned int divisor = 1;
  128. unsigned long wtcon;
  129. if (timeout < 1)
  130. return -EINVAL;
  131. freq /= 128;
  132. count = timeout * freq;
  133. DBG("%s: count=%d, timeout=%d, freq=%d\n",
  134. __func__, count, timeout, freq);
  135. /* if the count is bigger than the watchdog register,
  136. then work out what we need to do (and if) we can
  137. actually make this value
  138. */
  139. if (count >= 0x10000) {
  140. for (divisor = 1; divisor <= 0x100; divisor++) {
  141. if ((count / divisor) < 0x10000)
  142. break;
  143. }
  144. if ((count / divisor) >= 0x10000) {
  145. dev_err(wdt_dev, "timeout %d too big\n", timeout);
  146. return -EINVAL;
  147. }
  148. }
  149. tmr_margin = timeout;
  150. DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
  151. __func__, timeout, divisor, count, count/divisor);
  152. count /= divisor;
  153. wdt_count = count;
  154. /* update the pre-scaler */
  155. wtcon = readl(wdt_base + S3C2410_WTCON);
  156. wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
  157. wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
  158. writel(count, wdt_base + S3C2410_WTDAT);
  159. writel(wtcon, wdt_base + S3C2410_WTCON);
  160. return 0;
  161. }
  162. /*
  163. * /dev/watchdog handling
  164. */
  165. static int s3c2410wdt_open(struct inode *inode, struct file *file)
  166. {
  167. if(down_trylock(&open_lock))
  168. return -EBUSY;
  169. if (nowayout)
  170. __module_get(THIS_MODULE);
  171. allow_close = CLOSE_STATE_NOT;
  172. /* start the timer */
  173. s3c2410wdt_start();
  174. return nonseekable_open(inode, file);
  175. }
  176. static int s3c2410wdt_release(struct inode *inode, struct file *file)
  177. {
  178. /*
  179. * Shut off the timer.
  180. * Lock it in if it's a module and we set nowayout
  181. */
  182. if (allow_close == CLOSE_STATE_ALLOW) {
  183. s3c2410wdt_stop();
  184. } else {
  185. dev_err(wdt_dev, "Unexpected close, not stopping watchdog\n");
  186. s3c2410wdt_keepalive();
  187. }
  188. allow_close = CLOSE_STATE_NOT;
  189. up(&open_lock);
  190. return 0;
  191. }
  192. static ssize_t s3c2410wdt_write(struct file *file, const char __user *data,
  193. size_t len, loff_t *ppos)
  194. {
  195. /*
  196. * Refresh the timer.
  197. */
  198. if(len) {
  199. if (!nowayout) {
  200. size_t i;
  201. /* In case it was set long ago */
  202. allow_close = CLOSE_STATE_NOT;
  203. for (i = 0; i != len; i++) {
  204. char c;
  205. if (get_user(c, data + i))
  206. return -EFAULT;
  207. if (c == 'V')
  208. allow_close = CLOSE_STATE_ALLOW;
  209. }
  210. }
  211. s3c2410wdt_keepalive();
  212. }
  213. return len;
  214. }
  215. #define OPTIONS WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE
  216. static struct watchdog_info s3c2410_wdt_ident = {
  217. .options = OPTIONS,
  218. .firmware_version = 0,
  219. .identity = "S3C2410 Watchdog",
  220. };
  221. static int s3c2410wdt_ioctl(struct inode *inode, struct file *file,
  222. unsigned int cmd, unsigned long arg)
  223. {
  224. void __user *argp = (void __user *)arg;
  225. int __user *p = argp;
  226. int new_margin;
  227. switch (cmd) {
  228. default:
  229. return -ENOTTY;
  230. case WDIOC_GETSUPPORT:
  231. return copy_to_user(argp, &s3c2410_wdt_ident,
  232. sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
  233. case WDIOC_GETSTATUS:
  234. case WDIOC_GETBOOTSTATUS:
  235. return put_user(0, p);
  236. case WDIOC_KEEPALIVE:
  237. s3c2410wdt_keepalive();
  238. return 0;
  239. case WDIOC_SETTIMEOUT:
  240. if (get_user(new_margin, p))
  241. return -EFAULT;
  242. if (s3c2410wdt_set_heartbeat(new_margin))
  243. return -EINVAL;
  244. s3c2410wdt_keepalive();
  245. return put_user(tmr_margin, p);
  246. case WDIOC_GETTIMEOUT:
  247. return put_user(tmr_margin, p);
  248. }
  249. }
  250. /* kernel interface */
  251. static const struct file_operations s3c2410wdt_fops = {
  252. .owner = THIS_MODULE,
  253. .llseek = no_llseek,
  254. .write = s3c2410wdt_write,
  255. .ioctl = s3c2410wdt_ioctl,
  256. .open = s3c2410wdt_open,
  257. .release = s3c2410wdt_release,
  258. };
  259. static struct miscdevice s3c2410wdt_miscdev = {
  260. .minor = WATCHDOG_MINOR,
  261. .name = "watchdog",
  262. .fops = &s3c2410wdt_fops,
  263. };
  264. /* interrupt handler code */
  265. static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
  266. {
  267. dev_info(wdt_dev, "watchdog timer expired (irq)\n");
  268. s3c2410wdt_keepalive();
  269. return IRQ_HANDLED;
  270. }
  271. /* device interface */
  272. static int s3c2410wdt_probe(struct platform_device *pdev)
  273. {
  274. struct resource *res;
  275. struct device *dev;
  276. unsigned int wtcon;
  277. int started = 0;
  278. int ret;
  279. int size;
  280. DBG("%s: probe=%p\n", __func__, pdev);
  281. dev = &pdev->dev;
  282. wdt_dev = &pdev->dev;
  283. /* get the memory region for the watchdog timer */
  284. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  285. if (res == NULL) {
  286. dev_err(dev, "no memory resource specified\n");
  287. return -ENOENT;
  288. }
  289. size = (res->end-res->start)+1;
  290. wdt_mem = request_mem_region(res->start, size, pdev->name);
  291. if (wdt_mem == NULL) {
  292. dev_err(dev, "failed to get memory region\n");
  293. ret = -ENOENT;
  294. goto err_req;
  295. }
  296. wdt_base = ioremap(res->start, size);
  297. if (wdt_base == 0) {
  298. dev_err(dev, "failed to ioremap() region\n");
  299. ret = -EINVAL;
  300. goto err_req;
  301. }
  302. DBG("probe: mapped wdt_base=%p\n", wdt_base);
  303. wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  304. if (wdt_irq == NULL) {
  305. dev_err(dev, "no irq resource specified\n");
  306. ret = -ENOENT;
  307. goto err_map;
  308. }
  309. ret = request_irq(wdt_irq->start, s3c2410wdt_irq, 0, pdev->name, pdev);
  310. if (ret != 0) {
  311. dev_err(dev, "failed to install irq (%d)\n", ret);
  312. goto err_map;
  313. }
  314. wdt_clock = clk_get(&pdev->dev, "watchdog");
  315. if (IS_ERR(wdt_clock)) {
  316. dev_err(dev, "failed to find watchdog clock source\n");
  317. ret = PTR_ERR(wdt_clock);
  318. goto err_irq;
  319. }
  320. clk_enable(wdt_clock);
  321. /* see if we can actually set the requested timer margin, and if
  322. * not, try the default value */
  323. if (s3c2410wdt_set_heartbeat(tmr_margin)) {
  324. started = s3c2410wdt_set_heartbeat(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
  325. if (started == 0) {
  326. dev_info(dev,"tmr_margin value out of range, default %d used\n",
  327. CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
  328. } else {
  329. dev_info(dev, "default timer value is out of range, cannot start\n");
  330. }
  331. }
  332. ret = misc_register(&s3c2410wdt_miscdev);
  333. if (ret) {
  334. dev_err(dev, "cannot register miscdev on minor=%d (%d)\n",
  335. WATCHDOG_MINOR, ret);
  336. goto err_clk;
  337. }
  338. if (tmr_atboot && started == 0) {
  339. dev_info(dev, "starting watchdog timer\n");
  340. s3c2410wdt_start();
  341. } else if (!tmr_atboot) {
  342. /* if we're not enabling the watchdog, then ensure it is
  343. * disabled if it has been left running from the bootloader
  344. * or other source */
  345. s3c2410wdt_stop();
  346. }
  347. /* print out a statement of readiness */
  348. wtcon = readl(wdt_base + S3C2410_WTCON);
  349. dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
  350. (wtcon & S3C2410_WTCON_ENABLE) ? "" : "in",
  351. (wtcon & S3C2410_WTCON_RSTEN) ? "" : "dis",
  352. (wtcon & S3C2410_WTCON_INTEN) ? "" : "en");
  353. return 0;
  354. err_clk:
  355. clk_disable(wdt_clock);
  356. clk_put(wdt_clock);
  357. err_irq:
  358. free_irq(wdt_irq->start, pdev);
  359. err_map:
  360. iounmap(wdt_base);
  361. err_req:
  362. release_resource(wdt_mem);
  363. kfree(wdt_mem);
  364. return ret;
  365. }
  366. static int s3c2410wdt_remove(struct platform_device *dev)
  367. {
  368. release_resource(wdt_mem);
  369. kfree(wdt_mem);
  370. wdt_mem = NULL;
  371. free_irq(wdt_irq->start, dev);
  372. wdt_irq = NULL;
  373. clk_disable(wdt_clock);
  374. clk_put(wdt_clock);
  375. wdt_clock = NULL;
  376. iounmap(wdt_base);
  377. misc_deregister(&s3c2410wdt_miscdev);
  378. return 0;
  379. }
  380. static void s3c2410wdt_shutdown(struct platform_device *dev)
  381. {
  382. s3c2410wdt_stop();
  383. }
  384. #ifdef CONFIG_PM
  385. static unsigned long wtcon_save;
  386. static unsigned long wtdat_save;
  387. static int s3c2410wdt_suspend(struct platform_device *dev, pm_message_t state)
  388. {
  389. /* Save watchdog state, and turn it off. */
  390. wtcon_save = readl(wdt_base + S3C2410_WTCON);
  391. wtdat_save = readl(wdt_base + S3C2410_WTDAT);
  392. /* Note that WTCNT doesn't need to be saved. */
  393. s3c2410wdt_stop();
  394. return 0;
  395. }
  396. static int s3c2410wdt_resume(struct platform_device *dev)
  397. {
  398. /* Restore watchdog state. */
  399. writel(wtdat_save, wdt_base + S3C2410_WTDAT);
  400. writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
  401. writel(wtcon_save, wdt_base + S3C2410_WTCON);
  402. printk(KERN_INFO PFX "watchdog %sabled\n",
  403. (wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
  404. return 0;
  405. }
  406. #else
  407. #define s3c2410wdt_suspend NULL
  408. #define s3c2410wdt_resume NULL
  409. #endif /* CONFIG_PM */
  410. static struct platform_driver s3c2410wdt_driver = {
  411. .probe = s3c2410wdt_probe,
  412. .remove = s3c2410wdt_remove,
  413. .shutdown = s3c2410wdt_shutdown,
  414. .suspend = s3c2410wdt_suspend,
  415. .resume = s3c2410wdt_resume,
  416. .driver = {
  417. .owner = THIS_MODULE,
  418. .name = "s3c2410-wdt",
  419. },
  420. };
  421. static char banner[] __initdata = KERN_INFO "S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics\n";
  422. static int __init watchdog_init(void)
  423. {
  424. printk(banner);
  425. return platform_driver_register(&s3c2410wdt_driver);
  426. }
  427. static void __exit watchdog_exit(void)
  428. {
  429. platform_driver_unregister(&s3c2410wdt_driver);
  430. }
  431. module_init(watchdog_init);
  432. module_exit(watchdog_exit);
  433. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
  434. "Dimitry Andric <dimitry.andric@tomtom.com>");
  435. MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
  436. MODULE_LICENSE("GPL");
  437. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  438. MODULE_ALIAS("platform:s3c2410-wdt");