rtc-omap.c 13 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  24. * with century-range alarm matching, driven by the 32kHz clock.
  25. *
  26. * The main user-visible ways it differs from PC RTCs are by omitting
  27. * "don't care" alarm fields and sub-second periodic IRQs, and having
  28. * an autoadjust mechanism to calibrate to the true oscillator rate.
  29. *
  30. * Board-specific wiring options include using split power mode with
  31. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  32. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  33. * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  34. */
  35. #define OMAP_RTC_BASE 0xfffb4800
  36. /* RTC registers */
  37. #define OMAP_RTC_SECONDS_REG 0x00
  38. #define OMAP_RTC_MINUTES_REG 0x04
  39. #define OMAP_RTC_HOURS_REG 0x08
  40. #define OMAP_RTC_DAYS_REG 0x0C
  41. #define OMAP_RTC_MONTHS_REG 0x10
  42. #define OMAP_RTC_YEARS_REG 0x14
  43. #define OMAP_RTC_WEEKS_REG 0x18
  44. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  45. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  46. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  47. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  48. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  49. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  50. #define OMAP_RTC_CTRL_REG 0x40
  51. #define OMAP_RTC_STATUS_REG 0x44
  52. #define OMAP_RTC_INTERRUPTS_REG 0x48
  53. #define OMAP_RTC_COMP_LSB_REG 0x4c
  54. #define OMAP_RTC_COMP_MSB_REG 0x50
  55. #define OMAP_RTC_OSC_REG 0x54
  56. /* OMAP_RTC_CTRL_REG bit fields: */
  57. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  58. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  59. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  60. #define OMAP_RTC_CTRL_TEST (1<<4)
  61. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  62. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  63. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  64. #define OMAP_RTC_CTRL_STOP (1<<0)
  65. /* OMAP_RTC_STATUS_REG bit fields: */
  66. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  67. #define OMAP_RTC_STATUS_ALARM (1<<6)
  68. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  69. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  70. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  71. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  72. #define OMAP_RTC_STATUS_RUN (1<<1)
  73. #define OMAP_RTC_STATUS_BUSY (1<<0)
  74. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  75. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  76. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  77. #define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
  78. #define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr))
  79. /* platform_bus isn't hotpluggable, so for static linkage it'd be safe
  80. * to get rid of probe() and remove() code ... too bad the driver struct
  81. * remembers probe(), that's about 25% of the runtime footprint!!
  82. */
  83. #ifndef MODULE
  84. #undef __devexit
  85. #undef __devexit_p
  86. #define __devexit __exit
  87. #define __devexit_p __exit_p
  88. #endif
  89. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  90. * so the only other requirement is that register accesses which
  91. * require BUSY to be clear are made with IRQs locally disabled
  92. */
  93. static void rtc_wait_not_busy(void)
  94. {
  95. int count = 0;
  96. u8 status;
  97. /* BUSY may stay active for 1/32768 second (~30 usec) */
  98. for (count = 0; count < 50; count++) {
  99. status = rtc_read(OMAP_RTC_STATUS_REG);
  100. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  101. break;
  102. udelay(1);
  103. }
  104. /* now we have ~15 usec to read/write various registers */
  105. }
  106. static irqreturn_t rtc_irq(int irq, void *rtc)
  107. {
  108. unsigned long events = 0;
  109. u8 irq_data;
  110. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  111. /* alarm irq? */
  112. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  113. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  114. events |= RTC_IRQF | RTC_AF;
  115. }
  116. /* 1/sec periodic/update irq? */
  117. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  118. events |= RTC_IRQF | RTC_UF;
  119. rtc_update_irq(rtc, 1, events);
  120. return IRQ_HANDLED;
  121. }
  122. #ifdef CONFIG_RTC_INTF_DEV
  123. static int
  124. omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  125. {
  126. u8 reg;
  127. switch (cmd) {
  128. case RTC_AIE_OFF:
  129. case RTC_AIE_ON:
  130. case RTC_UIE_OFF:
  131. case RTC_UIE_ON:
  132. break;
  133. default:
  134. return -ENOIOCTLCMD;
  135. }
  136. local_irq_disable();
  137. rtc_wait_not_busy();
  138. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  139. switch (cmd) {
  140. /* AIE = Alarm Interrupt Enable */
  141. case RTC_AIE_OFF:
  142. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  143. break;
  144. case RTC_AIE_ON:
  145. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  146. break;
  147. /* UIE = Update Interrupt Enable (1/second) */
  148. case RTC_UIE_OFF:
  149. reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
  150. break;
  151. case RTC_UIE_ON:
  152. reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
  153. break;
  154. }
  155. rtc_wait_not_busy();
  156. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  157. local_irq_enable();
  158. return 0;
  159. }
  160. #else
  161. #define omap_rtc_ioctl NULL
  162. #endif
  163. /* this hardware doesn't support "don't care" alarm fields */
  164. static int tm2bcd(struct rtc_time *tm)
  165. {
  166. if (rtc_valid_tm(tm) != 0)
  167. return -EINVAL;
  168. tm->tm_sec = BIN2BCD(tm->tm_sec);
  169. tm->tm_min = BIN2BCD(tm->tm_min);
  170. tm->tm_hour = BIN2BCD(tm->tm_hour);
  171. tm->tm_mday = BIN2BCD(tm->tm_mday);
  172. tm->tm_mon = BIN2BCD(tm->tm_mon + 1);
  173. /* epoch == 1900 */
  174. if (tm->tm_year < 100 || tm->tm_year > 199)
  175. return -EINVAL;
  176. tm->tm_year = BIN2BCD(tm->tm_year - 100);
  177. return 0;
  178. }
  179. static void bcd2tm(struct rtc_time *tm)
  180. {
  181. tm->tm_sec = BCD2BIN(tm->tm_sec);
  182. tm->tm_min = BCD2BIN(tm->tm_min);
  183. tm->tm_hour = BCD2BIN(tm->tm_hour);
  184. tm->tm_mday = BCD2BIN(tm->tm_mday);
  185. tm->tm_mon = BCD2BIN(tm->tm_mon) - 1;
  186. /* epoch == 1900 */
  187. tm->tm_year = BCD2BIN(tm->tm_year) + 100;
  188. }
  189. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  190. {
  191. /* we don't report wday/yday/isdst ... */
  192. local_irq_disable();
  193. rtc_wait_not_busy();
  194. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  195. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  196. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  197. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  198. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  199. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  200. local_irq_enable();
  201. bcd2tm(tm);
  202. return 0;
  203. }
  204. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  205. {
  206. if (tm2bcd(tm) < 0)
  207. return -EINVAL;
  208. local_irq_disable();
  209. rtc_wait_not_busy();
  210. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  211. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  212. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  213. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  214. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  215. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  216. local_irq_enable();
  217. return 0;
  218. }
  219. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  220. {
  221. local_irq_disable();
  222. rtc_wait_not_busy();
  223. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  224. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  225. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  226. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  227. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  228. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  229. local_irq_enable();
  230. bcd2tm(&alm->time);
  231. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  232. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  233. return 0;
  234. }
  235. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  236. {
  237. u8 reg;
  238. if (tm2bcd(&alm->time) < 0)
  239. return -EINVAL;
  240. local_irq_disable();
  241. rtc_wait_not_busy();
  242. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  243. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  244. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  245. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  246. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  247. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  248. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  249. if (alm->enabled)
  250. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  251. else
  252. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  253. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  254. local_irq_enable();
  255. return 0;
  256. }
  257. static struct rtc_class_ops omap_rtc_ops = {
  258. .ioctl = omap_rtc_ioctl,
  259. .read_time = omap_rtc_read_time,
  260. .set_time = omap_rtc_set_time,
  261. .read_alarm = omap_rtc_read_alarm,
  262. .set_alarm = omap_rtc_set_alarm,
  263. };
  264. static int omap_rtc_alarm;
  265. static int omap_rtc_timer;
  266. static int __devinit omap_rtc_probe(struct platform_device *pdev)
  267. {
  268. struct resource *res, *mem;
  269. struct rtc_device *rtc;
  270. u8 reg, new_ctrl;
  271. omap_rtc_timer = platform_get_irq(pdev, 0);
  272. if (omap_rtc_timer <= 0) {
  273. pr_debug("%s: no update irq?\n", pdev->name);
  274. return -ENOENT;
  275. }
  276. omap_rtc_alarm = platform_get_irq(pdev, 1);
  277. if (omap_rtc_alarm <= 0) {
  278. pr_debug("%s: no alarm irq?\n", pdev->name);
  279. return -ENOENT;
  280. }
  281. /* NOTE: using static mapping for RTC registers */
  282. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  283. if (res && res->start != OMAP_RTC_BASE) {
  284. pr_debug("%s: RTC registers at %08x, expected %08x\n",
  285. pdev->name, (unsigned) res->start, OMAP_RTC_BASE);
  286. return -ENOENT;
  287. }
  288. if (res)
  289. mem = request_mem_region(res->start,
  290. res->end - res->start + 1,
  291. pdev->name);
  292. else
  293. mem = NULL;
  294. if (!mem) {
  295. pr_debug("%s: RTC registers at %08x are not free\n",
  296. pdev->name, OMAP_RTC_BASE);
  297. return -EBUSY;
  298. }
  299. rtc = rtc_device_register(pdev->name, &pdev->dev,
  300. &omap_rtc_ops, THIS_MODULE);
  301. if (IS_ERR(rtc)) {
  302. pr_debug("%s: can't register RTC device, err %ld\n",
  303. pdev->name, PTR_ERR(rtc));
  304. goto fail;
  305. }
  306. platform_set_drvdata(pdev, rtc);
  307. dev_set_drvdata(&rtc->dev, mem);
  308. /* clear pending irqs, and set 1/second periodic,
  309. * which we'll use instead of update irqs
  310. */
  311. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  312. /* clear old status */
  313. reg = rtc_read(OMAP_RTC_STATUS_REG);
  314. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  315. pr_info("%s: RTC power up reset detected\n",
  316. pdev->name);
  317. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  318. }
  319. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  320. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  321. /* handle periodic and alarm irqs */
  322. if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
  323. rtc->dev.bus_id, rtc)) {
  324. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  325. pdev->name, omap_rtc_timer);
  326. goto fail0;
  327. }
  328. if (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
  329. rtc->dev.bus_id, rtc)) {
  330. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  331. pdev->name, omap_rtc_alarm);
  332. goto fail1;
  333. }
  334. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  335. reg = rtc_read(OMAP_RTC_CTRL_REG);
  336. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  337. pr_info("%s: already running\n", pdev->name);
  338. /* force to 24 hour mode */
  339. new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  340. new_ctrl |= OMAP_RTC_CTRL_STOP;
  341. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  342. *
  343. * - Boards wired so that RTC_WAKE_INT does something, and muxed
  344. * right (W13_1610_RTC_WAKE_INT is the default after chip reset),
  345. * should initialize the device wakeup flag appropriately.
  346. *
  347. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  348. * rather than nPWRON_RESET, should forcibly enable split
  349. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  350. * is write-only, and always reads as zero...)
  351. */
  352. device_init_wakeup(&pdev->dev, 0);
  353. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  354. pr_info("%s: split power mode\n", pdev->name);
  355. if (reg != new_ctrl)
  356. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  357. return 0;
  358. fail1:
  359. free_irq(omap_rtc_timer, NULL);
  360. fail0:
  361. rtc_device_unregister(rtc);
  362. fail:
  363. release_resource(mem);
  364. return -EIO;
  365. }
  366. static int __devexit omap_rtc_remove(struct platform_device *pdev)
  367. {
  368. struct rtc_device *rtc = platform_get_drvdata(pdev);;
  369. device_init_wakeup(&pdev->dev, 0);
  370. /* leave rtc running, but disable irqs */
  371. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  372. free_irq(omap_rtc_timer, rtc);
  373. free_irq(omap_rtc_alarm, rtc);
  374. release_resource(dev_get_drvdata(&rtc->dev));
  375. rtc_device_unregister(rtc);
  376. return 0;
  377. }
  378. #ifdef CONFIG_PM
  379. static u8 irqstat;
  380. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  381. {
  382. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  383. /* FIXME the RTC alarm is not currently acting as a wakeup event
  384. * source, and in fact this enable() call is just saving a flag
  385. * that's never used...
  386. */
  387. if (device_may_wakeup(&pdev->dev))
  388. enable_irq_wake(omap_rtc_alarm);
  389. else
  390. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  391. return 0;
  392. }
  393. static int omap_rtc_resume(struct platform_device *pdev)
  394. {
  395. if (device_may_wakeup(&pdev->dev))
  396. disable_irq_wake(omap_rtc_alarm);
  397. else
  398. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  399. return 0;
  400. }
  401. #else
  402. #define omap_rtc_suspend NULL
  403. #define omap_rtc_resume NULL
  404. #endif
  405. static void omap_rtc_shutdown(struct platform_device *pdev)
  406. {
  407. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  408. }
  409. MODULE_ALIAS("platform:omap_rtc");
  410. static struct platform_driver omap_rtc_driver = {
  411. .probe = omap_rtc_probe,
  412. .remove = __devexit_p(omap_rtc_remove),
  413. .suspend = omap_rtc_suspend,
  414. .resume = omap_rtc_resume,
  415. .shutdown = omap_rtc_shutdown,
  416. .driver = {
  417. .name = "omap_rtc",
  418. .owner = THIS_MODULE,
  419. },
  420. };
  421. static int __init rtc_init(void)
  422. {
  423. return platform_driver_register(&omap_rtc_driver);
  424. }
  425. module_init(rtc_init);
  426. static void __exit rtc_exit(void)
  427. {
  428. platform_driver_unregister(&omap_rtc_driver);
  429. }
  430. module_exit(rtc_exit);
  431. MODULE_AUTHOR("George G. Davis (and others)");
  432. MODULE_LICENSE("GPL");