au8522.c 15 KB

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  1. /*
  2. Auvitek AU8522 QAM/8VSB demodulator driver
  3. Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/string.h>
  20. #include <linux/slab.h>
  21. #include <linux/delay.h>
  22. #include "dvb_frontend.h"
  23. #include "dvb-pll.h"
  24. #include "au8522.h"
  25. struct au8522_state {
  26. struct i2c_adapter *i2c;
  27. /* configuration settings */
  28. const struct au8522_config *config;
  29. struct dvb_frontend frontend;
  30. u32 current_frequency;
  31. fe_modulation_t current_modulation;
  32. };
  33. static int debug;
  34. #define dprintk(arg...) do { \
  35. if (debug) \
  36. printk(arg); \
  37. } while (0)
  38. /* 16 bit registers, 8 bit values */
  39. static int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
  40. {
  41. int ret;
  42. u8 buf [] = { reg >> 8, reg & 0xff, data };
  43. struct i2c_msg msg = { .addr = state->config->demod_address,
  44. .flags = 0, .buf = buf, .len = 3 };
  45. ret = i2c_transfer(state->i2c, &msg, 1);
  46. if (ret != 1)
  47. printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "
  48. "ret == %i)\n", __func__, reg, data, ret);
  49. return (ret != 1) ? -1 : 0;
  50. }
  51. static u8 au8522_readreg(struct au8522_state *state, u16 reg)
  52. {
  53. int ret;
  54. u8 b0 [] = { reg >> 8, reg & 0xff };
  55. u8 b1 [] = { 0 };
  56. struct i2c_msg msg [] = {
  57. { .addr = state->config->demod_address, .flags = 0,
  58. .buf = b0, .len = 2 },
  59. { .addr = state->config->demod_address, .flags = I2C_M_RD,
  60. .buf = b1, .len = 1 } };
  61. ret = i2c_transfer(state->i2c, msg, 2);
  62. if (ret != 2)
  63. printk(KERN_ERR "%s: readreg error (ret == %i)\n",
  64. __func__, ret);
  65. return b1[0];
  66. }
  67. static int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  68. {
  69. struct au8522_state *state = fe->demodulator_priv;
  70. dprintk("%s(%d)\n", __func__, enable);
  71. if (enable)
  72. return au8522_writereg(state, 0x106, 1);
  73. else
  74. return au8522_writereg(state, 0x106, 0);
  75. }
  76. struct mse2snr_tab {
  77. u16 val;
  78. u16 data;
  79. };
  80. /* VSB SNR lookup table */
  81. static struct mse2snr_tab vsb_mse2snr_tab[] = {
  82. { 0, 270 },
  83. { 2, 250 },
  84. { 3, 240 },
  85. { 5, 230 },
  86. { 7, 220 },
  87. { 9, 210 },
  88. { 12, 200 },
  89. { 13, 195 },
  90. { 15, 190 },
  91. { 17, 185 },
  92. { 19, 180 },
  93. { 21, 175 },
  94. { 24, 170 },
  95. { 27, 165 },
  96. { 31, 160 },
  97. { 32, 158 },
  98. { 33, 156 },
  99. { 36, 152 },
  100. { 37, 150 },
  101. { 39, 148 },
  102. { 40, 146 },
  103. { 41, 144 },
  104. { 43, 142 },
  105. { 44, 140 },
  106. { 48, 135 },
  107. { 50, 130 },
  108. { 43, 142 },
  109. { 53, 125 },
  110. { 56, 120 },
  111. { 256, 115 },
  112. };
  113. /* QAM64 SNR lookup table */
  114. static struct mse2snr_tab qam64_mse2snr_tab[] = {
  115. { 15, 0 },
  116. { 16, 290 },
  117. { 17, 288 },
  118. { 18, 286 },
  119. { 19, 284 },
  120. { 20, 282 },
  121. { 21, 281 },
  122. { 22, 279 },
  123. { 23, 277 },
  124. { 24, 275 },
  125. { 25, 273 },
  126. { 26, 271 },
  127. { 27, 269 },
  128. { 28, 268 },
  129. { 29, 266 },
  130. { 30, 264 },
  131. { 31, 262 },
  132. { 32, 260 },
  133. { 33, 259 },
  134. { 34, 258 },
  135. { 35, 256 },
  136. { 36, 255 },
  137. { 37, 254 },
  138. { 38, 252 },
  139. { 39, 251 },
  140. { 40, 250 },
  141. { 41, 249 },
  142. { 42, 248 },
  143. { 43, 246 },
  144. { 44, 245 },
  145. { 45, 244 },
  146. { 46, 242 },
  147. { 47, 241 },
  148. { 48, 240 },
  149. { 50, 239 },
  150. { 51, 238 },
  151. { 53, 237 },
  152. { 54, 236 },
  153. { 56, 235 },
  154. { 57, 234 },
  155. { 59, 233 },
  156. { 60, 232 },
  157. { 62, 231 },
  158. { 63, 230 },
  159. { 65, 229 },
  160. { 67, 228 },
  161. { 68, 227 },
  162. { 70, 226 },
  163. { 71, 225 },
  164. { 73, 224 },
  165. { 74, 223 },
  166. { 76, 222 },
  167. { 78, 221 },
  168. { 80, 220 },
  169. { 82, 219 },
  170. { 85, 218 },
  171. { 88, 217 },
  172. { 90, 216 },
  173. { 92, 215 },
  174. { 93, 214 },
  175. { 94, 212 },
  176. { 95, 211 },
  177. { 97, 210 },
  178. { 99, 209 },
  179. { 101, 208 },
  180. { 102, 207 },
  181. { 104, 206 },
  182. { 107, 205 },
  183. { 111, 204 },
  184. { 114, 203 },
  185. { 118, 202 },
  186. { 122, 201 },
  187. { 125, 200 },
  188. { 128, 199 },
  189. { 130, 198 },
  190. { 132, 197 },
  191. { 256, 190 },
  192. };
  193. /* QAM256 SNR lookup table */
  194. static struct mse2snr_tab qam256_mse2snr_tab[] = {
  195. { 16, 0 },
  196. { 17, 400 },
  197. { 18, 398 },
  198. { 19, 396 },
  199. { 20, 394 },
  200. { 21, 392 },
  201. { 22, 390 },
  202. { 23, 388 },
  203. { 24, 386 },
  204. { 25, 384 },
  205. { 26, 382 },
  206. { 27, 380 },
  207. { 28, 379 },
  208. { 29, 378 },
  209. { 30, 377 },
  210. { 31, 376 },
  211. { 32, 375 },
  212. { 33, 374 },
  213. { 34, 373 },
  214. { 35, 372 },
  215. { 36, 371 },
  216. { 37, 370 },
  217. { 38, 362 },
  218. { 39, 354 },
  219. { 40, 346 },
  220. { 41, 338 },
  221. { 42, 330 },
  222. { 43, 328 },
  223. { 44, 326 },
  224. { 45, 324 },
  225. { 46, 322 },
  226. { 47, 320 },
  227. { 48, 319 },
  228. { 49, 318 },
  229. { 50, 317 },
  230. { 51, 316 },
  231. { 52, 315 },
  232. { 53, 314 },
  233. { 54, 313 },
  234. { 55, 312 },
  235. { 56, 311 },
  236. { 57, 310 },
  237. { 58, 308 },
  238. { 59, 306 },
  239. { 60, 304 },
  240. { 61, 302 },
  241. { 62, 300 },
  242. { 63, 298 },
  243. { 65, 295 },
  244. { 68, 294 },
  245. { 70, 293 },
  246. { 73, 292 },
  247. { 76, 291 },
  248. { 78, 290 },
  249. { 79, 289 },
  250. { 81, 288 },
  251. { 82, 287 },
  252. { 83, 286 },
  253. { 84, 285 },
  254. { 85, 284 },
  255. { 86, 283 },
  256. { 88, 282 },
  257. { 89, 281 },
  258. { 256, 280 },
  259. };
  260. static int au8522_mse2snr_lookup(struct mse2snr_tab *tab, int sz, int mse,
  261. u16 *snr)
  262. {
  263. int i, ret = -EINVAL;
  264. dprintk("%s()\n", __func__);
  265. for (i = 0; i < sz; i++) {
  266. if (mse < tab[i].val) {
  267. *snr = tab[i].data;
  268. ret = 0;
  269. break;
  270. }
  271. }
  272. dprintk("%s() snr=%d\n", __func__, *snr);
  273. return ret;
  274. }
  275. /* VSB Modulation table */
  276. static struct {
  277. u16 reg;
  278. u16 data;
  279. } VSB_mod_tab[] = {
  280. { 0x8090, 0x84 },
  281. { 0x4092, 0x11 },
  282. { 0x2005, 0x00 },
  283. { 0x8091, 0x80 },
  284. { 0x80a3, 0x0c },
  285. { 0x80a4, 0xe8 },
  286. { 0x8081, 0xc4 },
  287. { 0x80a5, 0x40 },
  288. { 0x80a7, 0x40 },
  289. { 0x80a6, 0x67 },
  290. { 0x8262, 0x20 },
  291. { 0x821c, 0x30 },
  292. { 0x80d8, 0x1a },
  293. { 0x8227, 0xa0 },
  294. { 0x8121, 0xff },
  295. { 0x80a8, 0xf0 },
  296. { 0x80a9, 0x05 },
  297. { 0x80aa, 0x77 },
  298. { 0x80ab, 0xf0 },
  299. { 0x80ac, 0x05 },
  300. { 0x80ad, 0x77 },
  301. { 0x80ae, 0x41 },
  302. { 0x80af, 0x66 },
  303. { 0x821b, 0xcc },
  304. { 0x821d, 0x80 },
  305. { 0x80b5, 0xfb },
  306. { 0x80b6, 0x8e },
  307. { 0x80b7, 0x39 },
  308. { 0x80a4, 0xe8 },
  309. { 0x8231, 0x13 },
  310. };
  311. /* QAM Modulation table */
  312. static struct {
  313. u16 reg;
  314. u16 data;
  315. } QAM_mod_tab[] = {
  316. { 0x80a3, 0x09 },
  317. { 0x80a4, 0x00 },
  318. { 0x8081, 0xc4 },
  319. { 0x80a5, 0x40 },
  320. { 0x80b5, 0xfb },
  321. { 0x80b6, 0x8e },
  322. { 0x80b7, 0x39 },
  323. { 0x80aa, 0x77 },
  324. { 0x80ad, 0x77 },
  325. { 0x80a6, 0x67 },
  326. { 0x8262, 0x20 },
  327. { 0x821c, 0x30 },
  328. { 0x80b8, 0x3e },
  329. { 0x80b9, 0xf0 },
  330. { 0x80ba, 0x01 },
  331. { 0x80bb, 0x18 },
  332. { 0x80bc, 0x50 },
  333. { 0x80bd, 0x00 },
  334. { 0x80be, 0xea },
  335. { 0x80bf, 0xef },
  336. { 0x80c0, 0xfc },
  337. { 0x80c1, 0xbd },
  338. { 0x80c2, 0x1f },
  339. { 0x80c3, 0xfc },
  340. { 0x80c4, 0xdd },
  341. { 0x80c5, 0xaf },
  342. { 0x80c6, 0x00 },
  343. { 0x80c7, 0x38 },
  344. { 0x80c8, 0x30 },
  345. { 0x80c9, 0x05 },
  346. { 0x80ca, 0x4a },
  347. { 0x80cb, 0xd0 },
  348. { 0x80cc, 0x01 },
  349. { 0x80cd, 0xd9 },
  350. { 0x80ce, 0x6f },
  351. { 0x80cf, 0xf9 },
  352. { 0x80d0, 0x70 },
  353. { 0x80d1, 0xdf },
  354. { 0x80d2, 0xf7 },
  355. { 0x80d3, 0xc2 },
  356. { 0x80d4, 0xdf },
  357. { 0x80d5, 0x02 },
  358. { 0x80d6, 0x9a },
  359. { 0x80d7, 0xd0 },
  360. { 0x8250, 0x0d },
  361. { 0x8251, 0xcd },
  362. { 0x8252, 0xe0 },
  363. { 0x8253, 0x05 },
  364. { 0x8254, 0xa7 },
  365. { 0x8255, 0xff },
  366. { 0x8256, 0xed },
  367. { 0x8257, 0x5b },
  368. { 0x8258, 0xae },
  369. { 0x8259, 0xe6 },
  370. { 0x825a, 0x3d },
  371. { 0x825b, 0x0f },
  372. { 0x825c, 0x0d },
  373. { 0x825d, 0xea },
  374. { 0x825e, 0xf2 },
  375. { 0x825f, 0x51 },
  376. { 0x8260, 0xf5 },
  377. { 0x8261, 0x06 },
  378. { 0x821a, 0x00 },
  379. { 0x8546, 0x40 },
  380. { 0x8210, 0x26 },
  381. { 0x8211, 0xf6 },
  382. { 0x8212, 0x84 },
  383. { 0x8213, 0x02 },
  384. { 0x8502, 0x01 },
  385. { 0x8121, 0x04 },
  386. { 0x8122, 0x04 },
  387. { 0x852e, 0x10 },
  388. { 0x80a4, 0xca },
  389. { 0x80a7, 0x40 },
  390. { 0x8526, 0x01 },
  391. };
  392. static int au8522_enable_modulation(struct dvb_frontend *fe,
  393. fe_modulation_t m)
  394. {
  395. struct au8522_state *state = fe->demodulator_priv;
  396. int i;
  397. dprintk("%s(0x%08x)\n", __func__, m);
  398. switch (m) {
  399. case VSB_8:
  400. dprintk("%s() VSB_8\n", __func__);
  401. for (i = 0; i < ARRAY_SIZE(VSB_mod_tab); i++)
  402. au8522_writereg(state,
  403. VSB_mod_tab[i].reg,
  404. VSB_mod_tab[i].data);
  405. break;
  406. case QAM_64:
  407. case QAM_256:
  408. dprintk("%s() QAM 64/256\n", __func__);
  409. for (i = 0; i < ARRAY_SIZE(QAM_mod_tab); i++)
  410. au8522_writereg(state,
  411. QAM_mod_tab[i].reg,
  412. QAM_mod_tab[i].data);
  413. break;
  414. default:
  415. dprintk("%s() Invalid modulation\n", __func__);
  416. return -EINVAL;
  417. }
  418. state->current_modulation = m;
  419. return 0;
  420. }
  421. /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
  422. static int au8522_set_frontend(struct dvb_frontend *fe,
  423. struct dvb_frontend_parameters *p)
  424. {
  425. struct au8522_state *state = fe->demodulator_priv;
  426. int ret = -EINVAL;
  427. dprintk("%s(frequency=%d)\n", __func__, p->frequency);
  428. if ((state->current_frequency == p->frequency) &&
  429. (state->current_modulation == p->u.vsb.modulation))
  430. return 0;
  431. au8522_enable_modulation(fe, p->u.vsb.modulation);
  432. /* Allow the demod to settle */
  433. msleep(100);
  434. if (fe->ops.tuner_ops.set_params) {
  435. if (fe->ops.i2c_gate_ctrl)
  436. fe->ops.i2c_gate_ctrl(fe, 1);
  437. ret = fe->ops.tuner_ops.set_params(fe, p);
  438. if (fe->ops.i2c_gate_ctrl)
  439. fe->ops.i2c_gate_ctrl(fe, 0);
  440. }
  441. if (ret < 0)
  442. return ret;
  443. state->current_frequency = p->frequency;
  444. return 0;
  445. }
  446. /* Reset the demod hardware and reset all of the configuration registers
  447. to a default state. */
  448. static int au8522_init(struct dvb_frontend *fe)
  449. {
  450. struct au8522_state *state = fe->demodulator_priv;
  451. dprintk("%s()\n", __func__);
  452. au8522_writereg(state, 0xa4, 1 << 5);
  453. au8522_i2c_gate_ctrl(fe, 1);
  454. return 0;
  455. }
  456. static int au8522_sleep(struct dvb_frontend *fe)
  457. {
  458. struct au8522_state *state = fe->demodulator_priv;
  459. dprintk("%s()\n", __func__);
  460. state->current_frequency = 0;
  461. return 0;
  462. }
  463. static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status)
  464. {
  465. struct au8522_state *state = fe->demodulator_priv;
  466. u8 reg;
  467. u32 tuner_status = 0;
  468. *status = 0;
  469. if (state->current_modulation == VSB_8) {
  470. dprintk("%s() Checking VSB_8\n", __func__);
  471. reg = au8522_readreg(state, 0x4088);
  472. if ((reg & 0x03) == 0x03)
  473. *status |= FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI;
  474. } else {
  475. dprintk("%s() Checking QAM\n", __func__);
  476. reg = au8522_readreg(state, 0x4541);
  477. if (reg & 0x80)
  478. *status |= FE_HAS_VITERBI;
  479. if (reg & 0x20)
  480. *status |= FE_HAS_LOCK | FE_HAS_SYNC;
  481. }
  482. switch (state->config->status_mode) {
  483. case AU8522_DEMODLOCKING:
  484. dprintk("%s() DEMODLOCKING\n", __func__);
  485. if (*status & FE_HAS_VITERBI)
  486. *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
  487. break;
  488. case AU8522_TUNERLOCKING:
  489. /* Get the tuner status */
  490. dprintk("%s() TUNERLOCKING\n", __func__);
  491. if (fe->ops.tuner_ops.get_status) {
  492. if (fe->ops.i2c_gate_ctrl)
  493. fe->ops.i2c_gate_ctrl(fe, 1);
  494. fe->ops.tuner_ops.get_status(fe, &tuner_status);
  495. if (fe->ops.i2c_gate_ctrl)
  496. fe->ops.i2c_gate_ctrl(fe, 0);
  497. }
  498. if (tuner_status)
  499. *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
  500. break;
  501. }
  502. dprintk("%s() status 0x%08x\n", __func__, *status);
  503. return 0;
  504. }
  505. static int au8522_read_snr(struct dvb_frontend *fe, u16 *snr)
  506. {
  507. struct au8522_state *state = fe->demodulator_priv;
  508. int ret = -EINVAL;
  509. dprintk("%s()\n", __func__);
  510. if (state->current_modulation == QAM_256)
  511. ret = au8522_mse2snr_lookup(qam256_mse2snr_tab,
  512. ARRAY_SIZE(qam256_mse2snr_tab),
  513. au8522_readreg(state, 0x4522),
  514. snr);
  515. else if (state->current_modulation == QAM_64)
  516. ret = au8522_mse2snr_lookup(qam64_mse2snr_tab,
  517. ARRAY_SIZE(qam64_mse2snr_tab),
  518. au8522_readreg(state, 0x4522),
  519. snr);
  520. else /* VSB_8 */
  521. ret = au8522_mse2snr_lookup(vsb_mse2snr_tab,
  522. ARRAY_SIZE(vsb_mse2snr_tab),
  523. au8522_readreg(state, 0x4311),
  524. snr);
  525. return ret;
  526. }
  527. static int au8522_read_signal_strength(struct dvb_frontend *fe,
  528. u16 *signal_strength)
  529. {
  530. return au8522_read_snr(fe, signal_strength);
  531. }
  532. static int au8522_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  533. {
  534. struct au8522_state *state = fe->demodulator_priv;
  535. if (state->current_modulation == VSB_8)
  536. *ucblocks = au8522_readreg(state, 0x4087);
  537. else
  538. *ucblocks = au8522_readreg(state, 0x4543);
  539. return 0;
  540. }
  541. static int au8522_read_ber(struct dvb_frontend *fe, u32 *ber)
  542. {
  543. return au8522_read_ucblocks(fe, ber);
  544. }
  545. static int au8522_get_frontend(struct dvb_frontend *fe,
  546. struct dvb_frontend_parameters *p)
  547. {
  548. struct au8522_state *state = fe->demodulator_priv;
  549. p->frequency = state->current_frequency;
  550. p->u.vsb.modulation = state->current_modulation;
  551. return 0;
  552. }
  553. static int au8522_get_tune_settings(struct dvb_frontend *fe,
  554. struct dvb_frontend_tune_settings *tune)
  555. {
  556. tune->min_delay_ms = 1000;
  557. return 0;
  558. }
  559. static void au8522_release(struct dvb_frontend *fe)
  560. {
  561. struct au8522_state *state = fe->demodulator_priv;
  562. kfree(state);
  563. }
  564. static struct dvb_frontend_ops au8522_ops;
  565. struct dvb_frontend *au8522_attach(const struct au8522_config *config,
  566. struct i2c_adapter *i2c)
  567. {
  568. struct au8522_state *state = NULL;
  569. /* allocate memory for the internal state */
  570. state = kmalloc(sizeof(struct au8522_state), GFP_KERNEL);
  571. if (state == NULL)
  572. goto error;
  573. /* setup the state */
  574. state->config = config;
  575. state->i2c = i2c;
  576. /* create dvb_frontend */
  577. memcpy(&state->frontend.ops, &au8522_ops,
  578. sizeof(struct dvb_frontend_ops));
  579. state->frontend.demodulator_priv = state;
  580. if (au8522_init(&state->frontend) != 0) {
  581. printk(KERN_ERR "%s: Failed to initialize correctly\n",
  582. __func__);
  583. goto error;
  584. }
  585. /* Note: Leaving the I2C gate open here. */
  586. au8522_i2c_gate_ctrl(&state->frontend, 1);
  587. return &state->frontend;
  588. error:
  589. kfree(state);
  590. return NULL;
  591. }
  592. EXPORT_SYMBOL(au8522_attach);
  593. static struct dvb_frontend_ops au8522_ops = {
  594. .info = {
  595. .name = "Auvitek AU8522 QAM/8VSB Frontend",
  596. .type = FE_ATSC,
  597. .frequency_min = 54000000,
  598. .frequency_max = 858000000,
  599. .frequency_stepsize = 62500,
  600. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  601. },
  602. .init = au8522_init,
  603. .sleep = au8522_sleep,
  604. .i2c_gate_ctrl = au8522_i2c_gate_ctrl,
  605. .set_frontend = au8522_set_frontend,
  606. .get_frontend = au8522_get_frontend,
  607. .get_tune_settings = au8522_get_tune_settings,
  608. .read_status = au8522_read_status,
  609. .read_ber = au8522_read_ber,
  610. .read_signal_strength = au8522_read_signal_strength,
  611. .read_snr = au8522_read_snr,
  612. .read_ucblocks = au8522_read_ucblocks,
  613. .release = au8522_release,
  614. };
  615. module_param(debug, int, 0644);
  616. MODULE_PARM_DESC(debug, "Enable verbose debug messages");
  617. MODULE_DESCRIPTION("Auvitek AU8522 QAM-B/ATSC Demodulator driver");
  618. MODULE_AUTHOR("Steven Toth");
  619. MODULE_LICENSE("GPL");