ehca_main.c 28 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * module start stop, hca detection
  5. *
  6. * Authors: Heiko J Schick <schickhj@de.ibm.com>
  7. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  8. * Joachim Fenkes <fenkes@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #ifdef CONFIG_PPC_64K_PAGES
  43. #include <linux/slab.h>
  44. #endif
  45. #include "ehca_classes.h"
  46. #include "ehca_iverbs.h"
  47. #include "ehca_mrmw.h"
  48. #include "ehca_tools.h"
  49. #include "hcp_if.h"
  50. #define HCAD_VERSION "0026"
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
  53. MODULE_DESCRIPTION("IBM eServer HCA InfiniBand Device Driver");
  54. MODULE_VERSION(HCAD_VERSION);
  55. static int ehca_open_aqp1 = 0;
  56. static int ehca_hw_level = 0;
  57. static int ehca_poll_all_eqs = 1;
  58. int ehca_debug_level = 0;
  59. int ehca_nr_ports = 2;
  60. int ehca_use_hp_mr = 0;
  61. int ehca_port_act_time = 30;
  62. int ehca_static_rate = -1;
  63. int ehca_scaling_code = 0;
  64. int ehca_lock_hcalls = -1;
  65. int ehca_max_cq = -1;
  66. int ehca_max_qp = -1;
  67. module_param_named(open_aqp1, ehca_open_aqp1, bool, S_IRUGO);
  68. module_param_named(debug_level, ehca_debug_level, int, S_IRUGO);
  69. module_param_named(hw_level, ehca_hw_level, int, S_IRUGO);
  70. module_param_named(nr_ports, ehca_nr_ports, int, S_IRUGO);
  71. module_param_named(use_hp_mr, ehca_use_hp_mr, bool, S_IRUGO);
  72. module_param_named(port_act_time, ehca_port_act_time, int, S_IRUGO);
  73. module_param_named(poll_all_eqs, ehca_poll_all_eqs, bool, S_IRUGO);
  74. module_param_named(static_rate, ehca_static_rate, int, S_IRUGO);
  75. module_param_named(scaling_code, ehca_scaling_code, bool, S_IRUGO);
  76. module_param_named(lock_hcalls, ehca_lock_hcalls, bool, S_IRUGO);
  77. module_param_named(number_of_cqs, ehca_max_cq, int, S_IRUGO);
  78. module_param_named(number_of_qps, ehca_max_qp, int, S_IRUGO);
  79. MODULE_PARM_DESC(open_aqp1,
  80. "Open AQP1 on startup (default: no)");
  81. MODULE_PARM_DESC(debug_level,
  82. "Amount of debug output (0: none (default), 1: traces, "
  83. "2: some dumps, 3: lots)");
  84. MODULE_PARM_DESC(hw_level,
  85. "Hardware level (0: autosensing (default), "
  86. "0x10..0x14: eHCA, 0x20..0x23: eHCA2)");
  87. MODULE_PARM_DESC(nr_ports,
  88. "number of connected ports (-1: autodetect, 1: port one only, "
  89. "2: two ports (default)");
  90. MODULE_PARM_DESC(use_hp_mr,
  91. "Use high performance MRs (default: no)");
  92. MODULE_PARM_DESC(port_act_time,
  93. "Time to wait for port activation (default: 30 sec)");
  94. MODULE_PARM_DESC(poll_all_eqs,
  95. "Poll all event queues periodically (default: yes)");
  96. MODULE_PARM_DESC(static_rate,
  97. "Set permanent static rate (default: no static rate)");
  98. MODULE_PARM_DESC(scaling_code,
  99. "Enable scaling code (default: no)");
  100. MODULE_PARM_DESC(lock_hcalls,
  101. "Serialize all hCalls made by the driver "
  102. "(default: autodetect)");
  103. MODULE_PARM_DESC(number_of_cqs,
  104. "Max number of CQs which can be allocated "
  105. "(default: autodetect)");
  106. MODULE_PARM_DESC(number_of_qps,
  107. "Max number of QPs which can be allocated "
  108. "(default: autodetect)");
  109. DEFINE_RWLOCK(ehca_qp_idr_lock);
  110. DEFINE_RWLOCK(ehca_cq_idr_lock);
  111. DEFINE_IDR(ehca_qp_idr);
  112. DEFINE_IDR(ehca_cq_idr);
  113. static LIST_HEAD(shca_list); /* list of all registered ehcas */
  114. static DEFINE_SPINLOCK(shca_list_lock);
  115. static struct timer_list poll_eqs_timer;
  116. #ifdef CONFIG_PPC_64K_PAGES
  117. static struct kmem_cache *ctblk_cache;
  118. void *ehca_alloc_fw_ctrlblock(gfp_t flags)
  119. {
  120. void *ret = kmem_cache_zalloc(ctblk_cache, flags);
  121. if (!ret)
  122. ehca_gen_err("Out of memory for ctblk");
  123. return ret;
  124. }
  125. void ehca_free_fw_ctrlblock(void *ptr)
  126. {
  127. if (ptr)
  128. kmem_cache_free(ctblk_cache, ptr);
  129. }
  130. #endif
  131. int ehca2ib_return_code(u64 ehca_rc)
  132. {
  133. switch (ehca_rc) {
  134. case H_SUCCESS:
  135. return 0;
  136. case H_RESOURCE: /* Resource in use */
  137. case H_BUSY:
  138. return -EBUSY;
  139. case H_NOT_ENOUGH_RESOURCES: /* insufficient resources */
  140. case H_CONSTRAINED: /* resource constraint */
  141. case H_NO_MEM:
  142. return -ENOMEM;
  143. default:
  144. return -EINVAL;
  145. }
  146. }
  147. static int ehca_create_slab_caches(void)
  148. {
  149. int ret;
  150. ret = ehca_init_pd_cache();
  151. if (ret) {
  152. ehca_gen_err("Cannot create PD SLAB cache.");
  153. return ret;
  154. }
  155. ret = ehca_init_cq_cache();
  156. if (ret) {
  157. ehca_gen_err("Cannot create CQ SLAB cache.");
  158. goto create_slab_caches2;
  159. }
  160. ret = ehca_init_qp_cache();
  161. if (ret) {
  162. ehca_gen_err("Cannot create QP SLAB cache.");
  163. goto create_slab_caches3;
  164. }
  165. ret = ehca_init_av_cache();
  166. if (ret) {
  167. ehca_gen_err("Cannot create AV SLAB cache.");
  168. goto create_slab_caches4;
  169. }
  170. ret = ehca_init_mrmw_cache();
  171. if (ret) {
  172. ehca_gen_err("Cannot create MR&MW SLAB cache.");
  173. goto create_slab_caches5;
  174. }
  175. ret = ehca_init_small_qp_cache();
  176. if (ret) {
  177. ehca_gen_err("Cannot create small queue SLAB cache.");
  178. goto create_slab_caches6;
  179. }
  180. #ifdef CONFIG_PPC_64K_PAGES
  181. ctblk_cache = kmem_cache_create("ehca_cache_ctblk",
  182. EHCA_PAGESIZE, H_CB_ALIGNMENT,
  183. SLAB_HWCACHE_ALIGN,
  184. NULL);
  185. if (!ctblk_cache) {
  186. ehca_gen_err("Cannot create ctblk SLAB cache.");
  187. ehca_cleanup_small_qp_cache();
  188. goto create_slab_caches6;
  189. }
  190. #endif
  191. return 0;
  192. create_slab_caches6:
  193. ehca_cleanup_mrmw_cache();
  194. create_slab_caches5:
  195. ehca_cleanup_av_cache();
  196. create_slab_caches4:
  197. ehca_cleanup_qp_cache();
  198. create_slab_caches3:
  199. ehca_cleanup_cq_cache();
  200. create_slab_caches2:
  201. ehca_cleanup_pd_cache();
  202. return ret;
  203. }
  204. static void ehca_destroy_slab_caches(void)
  205. {
  206. ehca_cleanup_small_qp_cache();
  207. ehca_cleanup_mrmw_cache();
  208. ehca_cleanup_av_cache();
  209. ehca_cleanup_qp_cache();
  210. ehca_cleanup_cq_cache();
  211. ehca_cleanup_pd_cache();
  212. #ifdef CONFIG_PPC_64K_PAGES
  213. if (ctblk_cache)
  214. kmem_cache_destroy(ctblk_cache);
  215. #endif
  216. }
  217. #define EHCA_HCAAVER EHCA_BMASK_IBM(32, 39)
  218. #define EHCA_REVID EHCA_BMASK_IBM(40, 63)
  219. static struct cap_descr {
  220. u64 mask;
  221. char *descr;
  222. } hca_cap_descr[] = {
  223. { HCA_CAP_AH_PORT_NR_CHECK, "HCA_CAP_AH_PORT_NR_CHECK" },
  224. { HCA_CAP_ATOMIC, "HCA_CAP_ATOMIC" },
  225. { HCA_CAP_AUTO_PATH_MIG, "HCA_CAP_AUTO_PATH_MIG" },
  226. { HCA_CAP_BAD_P_KEY_CTR, "HCA_CAP_BAD_P_KEY_CTR" },
  227. { HCA_CAP_SQD_RTS_PORT_CHANGE, "HCA_CAP_SQD_RTS_PORT_CHANGE" },
  228. { HCA_CAP_CUR_QP_STATE_MOD, "HCA_CAP_CUR_QP_STATE_MOD" },
  229. { HCA_CAP_INIT_TYPE, "HCA_CAP_INIT_TYPE" },
  230. { HCA_CAP_PORT_ACTIVE_EVENT, "HCA_CAP_PORT_ACTIVE_EVENT" },
  231. { HCA_CAP_Q_KEY_VIOL_CTR, "HCA_CAP_Q_KEY_VIOL_CTR" },
  232. { HCA_CAP_WQE_RESIZE, "HCA_CAP_WQE_RESIZE" },
  233. { HCA_CAP_RAW_PACKET_MCAST, "HCA_CAP_RAW_PACKET_MCAST" },
  234. { HCA_CAP_SHUTDOWN_PORT, "HCA_CAP_SHUTDOWN_PORT" },
  235. { HCA_CAP_RC_LL_QP, "HCA_CAP_RC_LL_QP" },
  236. { HCA_CAP_SRQ, "HCA_CAP_SRQ" },
  237. { HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
  238. { HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
  239. { HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
  240. { HCA_CAP_H_ALLOC_RES_SYNC, "HCA_CAP_H_ALLOC_RES_SYNC" },
  241. };
  242. static int ehca_sense_attributes(struct ehca_shca *shca)
  243. {
  244. int i, ret = 0;
  245. u64 h_ret;
  246. struct hipz_query_hca *rblock;
  247. struct hipz_query_port *port;
  248. const char *loc_code;
  249. static const u32 pgsize_map[] = {
  250. HCA_CAP_MR_PGSIZE_4K, 0x1000,
  251. HCA_CAP_MR_PGSIZE_64K, 0x10000,
  252. HCA_CAP_MR_PGSIZE_1M, 0x100000,
  253. HCA_CAP_MR_PGSIZE_16M, 0x1000000,
  254. };
  255. ehca_gen_dbg("Probing adapter %s...",
  256. shca->ofdev->node->full_name);
  257. loc_code = of_get_property(shca->ofdev->node, "ibm,loc-code", NULL);
  258. if (loc_code)
  259. ehca_gen_dbg(" ... location lode=%s", loc_code);
  260. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  261. if (!rblock) {
  262. ehca_gen_err("Cannot allocate rblock memory.");
  263. return -ENOMEM;
  264. }
  265. h_ret = hipz_h_query_hca(shca->ipz_hca_handle, rblock);
  266. if (h_ret != H_SUCCESS) {
  267. ehca_gen_err("Cannot query device properties. h_ret=%li",
  268. h_ret);
  269. ret = -EPERM;
  270. goto sense_attributes1;
  271. }
  272. if (ehca_nr_ports == 1)
  273. shca->num_ports = 1;
  274. else
  275. shca->num_ports = (u8)rblock->num_ports;
  276. ehca_gen_dbg(" ... found %x ports", rblock->num_ports);
  277. if (ehca_hw_level == 0) {
  278. u32 hcaaver;
  279. u32 revid;
  280. hcaaver = EHCA_BMASK_GET(EHCA_HCAAVER, rblock->hw_ver);
  281. revid = EHCA_BMASK_GET(EHCA_REVID, rblock->hw_ver);
  282. ehca_gen_dbg(" ... hardware version=%x:%x", hcaaver, revid);
  283. if (hcaaver == 1) {
  284. if (revid <= 3)
  285. shca->hw_level = 0x10 | (revid + 1);
  286. else
  287. shca->hw_level = 0x14;
  288. } else if (hcaaver == 2) {
  289. if (revid == 0)
  290. shca->hw_level = 0x21;
  291. else if (revid == 0x10)
  292. shca->hw_level = 0x22;
  293. else if (revid == 0x20 || revid == 0x21)
  294. shca->hw_level = 0x23;
  295. }
  296. if (!shca->hw_level) {
  297. ehca_gen_warn("unknown hardware version"
  298. " - assuming default level");
  299. shca->hw_level = 0x22;
  300. }
  301. } else
  302. shca->hw_level = ehca_hw_level;
  303. ehca_gen_dbg(" ... hardware level=%x", shca->hw_level);
  304. shca->hca_cap = rblock->hca_cap_indicators;
  305. ehca_gen_dbg(" ... HCA capabilities:");
  306. for (i = 0; i < ARRAY_SIZE(hca_cap_descr); i++)
  307. if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
  308. ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
  309. /* Autodetect hCall locking -- the "H_ALLOC_RESOURCE synced" flag is
  310. * a firmware property, so it's valid across all adapters
  311. */
  312. if (ehca_lock_hcalls == -1)
  313. ehca_lock_hcalls = !(shca->hca_cap & HCA_CAP_H_ALLOC_RES_SYNC);
  314. /* translate supported MR page sizes; always support 4K */
  315. shca->hca_cap_mr_pgsize = EHCA_PAGESIZE;
  316. for (i = 0; i < ARRAY_SIZE(pgsize_map); i += 2)
  317. if (rblock->memory_page_size_supported & pgsize_map[i])
  318. shca->hca_cap_mr_pgsize |= pgsize_map[i + 1];
  319. /* Set maximum number of CQs and QPs to calculate EQ size */
  320. if (ehca_max_qp == -1)
  321. ehca_max_qp = min_t(int, rblock->max_qp, EHCA_MAX_NUM_QUEUES);
  322. else if (ehca_max_qp < 1 || ehca_max_qp > rblock->max_qp) {
  323. ehca_gen_err("Requested number of QPs is out of range (1 - %i) "
  324. "specified by HW", rblock->max_qp);
  325. ret = -EINVAL;
  326. goto sense_attributes1;
  327. }
  328. if (ehca_max_cq == -1)
  329. ehca_max_cq = min_t(int, rblock->max_cq, EHCA_MAX_NUM_QUEUES);
  330. else if (ehca_max_cq < 1 || ehca_max_cq > rblock->max_cq) {
  331. ehca_gen_err("Requested number of CQs is out of range (1 - %i) "
  332. "specified by HW", rblock->max_cq);
  333. ret = -EINVAL;
  334. goto sense_attributes1;
  335. }
  336. /* query max MTU from first port -- it's the same for all ports */
  337. port = (struct hipz_query_port *)rblock;
  338. h_ret = hipz_h_query_port(shca->ipz_hca_handle, 1, port);
  339. if (h_ret != H_SUCCESS) {
  340. ehca_gen_err("Cannot query port properties. h_ret=%li",
  341. h_ret);
  342. ret = -EPERM;
  343. goto sense_attributes1;
  344. }
  345. shca->max_mtu = port->max_mtu;
  346. sense_attributes1:
  347. ehca_free_fw_ctrlblock(rblock);
  348. return ret;
  349. }
  350. static int init_node_guid(struct ehca_shca *shca)
  351. {
  352. int ret = 0;
  353. struct hipz_query_hca *rblock;
  354. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  355. if (!rblock) {
  356. ehca_err(&shca->ib_device, "Can't allocate rblock memory.");
  357. return -ENOMEM;
  358. }
  359. if (hipz_h_query_hca(shca->ipz_hca_handle, rblock) != H_SUCCESS) {
  360. ehca_err(&shca->ib_device, "Can't query device properties");
  361. ret = -EINVAL;
  362. goto init_node_guid1;
  363. }
  364. memcpy(&shca->ib_device.node_guid, &rblock->node_guid, sizeof(u64));
  365. init_node_guid1:
  366. ehca_free_fw_ctrlblock(rblock);
  367. return ret;
  368. }
  369. static int ehca_init_device(struct ehca_shca *shca)
  370. {
  371. int ret;
  372. ret = init_node_guid(shca);
  373. if (ret)
  374. return ret;
  375. strlcpy(shca->ib_device.name, "ehca%d", IB_DEVICE_NAME_MAX);
  376. shca->ib_device.owner = THIS_MODULE;
  377. shca->ib_device.uverbs_abi_ver = 8;
  378. shca->ib_device.uverbs_cmd_mask =
  379. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  380. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  381. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  382. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  383. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  384. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  385. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  386. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  387. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  388. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  389. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  390. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  391. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  392. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  393. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  394. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
  395. shca->ib_device.node_type = RDMA_NODE_IB_CA;
  396. shca->ib_device.phys_port_cnt = shca->num_ports;
  397. shca->ib_device.num_comp_vectors = 1;
  398. shca->ib_device.dma_device = &shca->ofdev->dev;
  399. shca->ib_device.query_device = ehca_query_device;
  400. shca->ib_device.query_port = ehca_query_port;
  401. shca->ib_device.query_gid = ehca_query_gid;
  402. shca->ib_device.query_pkey = ehca_query_pkey;
  403. /* shca->in_device.modify_device = ehca_modify_device */
  404. shca->ib_device.modify_port = ehca_modify_port;
  405. shca->ib_device.alloc_ucontext = ehca_alloc_ucontext;
  406. shca->ib_device.dealloc_ucontext = ehca_dealloc_ucontext;
  407. shca->ib_device.alloc_pd = ehca_alloc_pd;
  408. shca->ib_device.dealloc_pd = ehca_dealloc_pd;
  409. shca->ib_device.create_ah = ehca_create_ah;
  410. /* shca->ib_device.modify_ah = ehca_modify_ah; */
  411. shca->ib_device.query_ah = ehca_query_ah;
  412. shca->ib_device.destroy_ah = ehca_destroy_ah;
  413. shca->ib_device.create_qp = ehca_create_qp;
  414. shca->ib_device.modify_qp = ehca_modify_qp;
  415. shca->ib_device.query_qp = ehca_query_qp;
  416. shca->ib_device.destroy_qp = ehca_destroy_qp;
  417. shca->ib_device.post_send = ehca_post_send;
  418. shca->ib_device.post_recv = ehca_post_recv;
  419. shca->ib_device.create_cq = ehca_create_cq;
  420. shca->ib_device.destroy_cq = ehca_destroy_cq;
  421. shca->ib_device.resize_cq = ehca_resize_cq;
  422. shca->ib_device.poll_cq = ehca_poll_cq;
  423. /* shca->ib_device.peek_cq = ehca_peek_cq; */
  424. shca->ib_device.req_notify_cq = ehca_req_notify_cq;
  425. /* shca->ib_device.req_ncomp_notif = ehca_req_ncomp_notif; */
  426. shca->ib_device.get_dma_mr = ehca_get_dma_mr;
  427. shca->ib_device.reg_phys_mr = ehca_reg_phys_mr;
  428. shca->ib_device.reg_user_mr = ehca_reg_user_mr;
  429. shca->ib_device.query_mr = ehca_query_mr;
  430. shca->ib_device.dereg_mr = ehca_dereg_mr;
  431. shca->ib_device.rereg_phys_mr = ehca_rereg_phys_mr;
  432. shca->ib_device.alloc_mw = ehca_alloc_mw;
  433. shca->ib_device.bind_mw = ehca_bind_mw;
  434. shca->ib_device.dealloc_mw = ehca_dealloc_mw;
  435. shca->ib_device.alloc_fmr = ehca_alloc_fmr;
  436. shca->ib_device.map_phys_fmr = ehca_map_phys_fmr;
  437. shca->ib_device.unmap_fmr = ehca_unmap_fmr;
  438. shca->ib_device.dealloc_fmr = ehca_dealloc_fmr;
  439. shca->ib_device.attach_mcast = ehca_attach_mcast;
  440. shca->ib_device.detach_mcast = ehca_detach_mcast;
  441. shca->ib_device.process_mad = ehca_process_mad;
  442. shca->ib_device.mmap = ehca_mmap;
  443. if (EHCA_BMASK_GET(HCA_CAP_SRQ, shca->hca_cap)) {
  444. shca->ib_device.uverbs_cmd_mask |=
  445. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  446. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  447. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  448. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  449. shca->ib_device.create_srq = ehca_create_srq;
  450. shca->ib_device.modify_srq = ehca_modify_srq;
  451. shca->ib_device.query_srq = ehca_query_srq;
  452. shca->ib_device.destroy_srq = ehca_destroy_srq;
  453. shca->ib_device.post_srq_recv = ehca_post_srq_recv;
  454. }
  455. return ret;
  456. }
  457. static int ehca_create_aqp1(struct ehca_shca *shca, u32 port)
  458. {
  459. struct ehca_sport *sport = &shca->sport[port - 1];
  460. struct ib_cq *ibcq;
  461. struct ib_qp *ibqp;
  462. struct ib_qp_init_attr qp_init_attr;
  463. int ret;
  464. if (sport->ibcq_aqp1) {
  465. ehca_err(&shca->ib_device, "AQP1 CQ is already created.");
  466. return -EPERM;
  467. }
  468. ibcq = ib_create_cq(&shca->ib_device, NULL, NULL, (void *)(-1), 10, 0);
  469. if (IS_ERR(ibcq)) {
  470. ehca_err(&shca->ib_device, "Cannot create AQP1 CQ.");
  471. return PTR_ERR(ibcq);
  472. }
  473. sport->ibcq_aqp1 = ibcq;
  474. if (sport->ibqp_sqp[IB_QPT_GSI]) {
  475. ehca_err(&shca->ib_device, "AQP1 QP is already created.");
  476. ret = -EPERM;
  477. goto create_aqp1;
  478. }
  479. memset(&qp_init_attr, 0, sizeof(struct ib_qp_init_attr));
  480. qp_init_attr.send_cq = ibcq;
  481. qp_init_attr.recv_cq = ibcq;
  482. qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
  483. qp_init_attr.cap.max_send_wr = 100;
  484. qp_init_attr.cap.max_recv_wr = 100;
  485. qp_init_attr.cap.max_send_sge = 2;
  486. qp_init_attr.cap.max_recv_sge = 1;
  487. qp_init_attr.qp_type = IB_QPT_GSI;
  488. qp_init_attr.port_num = port;
  489. qp_init_attr.qp_context = NULL;
  490. qp_init_attr.event_handler = NULL;
  491. qp_init_attr.srq = NULL;
  492. ibqp = ib_create_qp(&shca->pd->ib_pd, &qp_init_attr);
  493. if (IS_ERR(ibqp)) {
  494. ehca_err(&shca->ib_device, "Cannot create AQP1 QP.");
  495. ret = PTR_ERR(ibqp);
  496. goto create_aqp1;
  497. }
  498. sport->ibqp_sqp[IB_QPT_GSI] = ibqp;
  499. return 0;
  500. create_aqp1:
  501. ib_destroy_cq(sport->ibcq_aqp1);
  502. return ret;
  503. }
  504. static int ehca_destroy_aqp1(struct ehca_sport *sport)
  505. {
  506. int ret;
  507. ret = ib_destroy_qp(sport->ibqp_sqp[IB_QPT_GSI]);
  508. if (ret) {
  509. ehca_gen_err("Cannot destroy AQP1 QP. ret=%i", ret);
  510. return ret;
  511. }
  512. ret = ib_destroy_cq(sport->ibcq_aqp1);
  513. if (ret)
  514. ehca_gen_err("Cannot destroy AQP1 CQ. ret=%i", ret);
  515. return ret;
  516. }
  517. static ssize_t ehca_show_debug_level(struct device_driver *ddp, char *buf)
  518. {
  519. return snprintf(buf, PAGE_SIZE, "%d\n", ehca_debug_level);
  520. }
  521. static ssize_t ehca_store_debug_level(struct device_driver *ddp,
  522. const char *buf, size_t count)
  523. {
  524. int value = (*buf) - '0';
  525. if (value >= 0 && value <= 9)
  526. ehca_debug_level = value;
  527. return 1;
  528. }
  529. static DRIVER_ATTR(debug_level, S_IRUSR | S_IWUSR,
  530. ehca_show_debug_level, ehca_store_debug_level);
  531. static struct attribute *ehca_drv_attrs[] = {
  532. &driver_attr_debug_level.attr,
  533. NULL
  534. };
  535. static struct attribute_group ehca_drv_attr_grp = {
  536. .attrs = ehca_drv_attrs
  537. };
  538. static struct attribute_group *ehca_drv_attr_groups[] = {
  539. &ehca_drv_attr_grp,
  540. NULL,
  541. };
  542. #define EHCA_RESOURCE_ATTR(name) \
  543. static ssize_t ehca_show_##name(struct device *dev, \
  544. struct device_attribute *attr, \
  545. char *buf) \
  546. { \
  547. struct ehca_shca *shca; \
  548. struct hipz_query_hca *rblock; \
  549. int data; \
  550. \
  551. shca = dev->driver_data; \
  552. \
  553. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL); \
  554. if (!rblock) { \
  555. dev_err(dev, "Can't allocate rblock memory.\n"); \
  556. return 0; \
  557. } \
  558. \
  559. if (hipz_h_query_hca(shca->ipz_hca_handle, rblock) != H_SUCCESS) { \
  560. dev_err(dev, "Can't query device properties\n"); \
  561. ehca_free_fw_ctrlblock(rblock); \
  562. return 0; \
  563. } \
  564. \
  565. data = rblock->name; \
  566. ehca_free_fw_ctrlblock(rblock); \
  567. \
  568. if ((strcmp(#name, "num_ports") == 0) && (ehca_nr_ports == 1)) \
  569. return snprintf(buf, 256, "1\n"); \
  570. else \
  571. return snprintf(buf, 256, "%d\n", data); \
  572. \
  573. } \
  574. static DEVICE_ATTR(name, S_IRUGO, ehca_show_##name, NULL);
  575. EHCA_RESOURCE_ATTR(num_ports);
  576. EHCA_RESOURCE_ATTR(hw_ver);
  577. EHCA_RESOURCE_ATTR(max_eq);
  578. EHCA_RESOURCE_ATTR(cur_eq);
  579. EHCA_RESOURCE_ATTR(max_cq);
  580. EHCA_RESOURCE_ATTR(cur_cq);
  581. EHCA_RESOURCE_ATTR(max_qp);
  582. EHCA_RESOURCE_ATTR(cur_qp);
  583. EHCA_RESOURCE_ATTR(max_mr);
  584. EHCA_RESOURCE_ATTR(cur_mr);
  585. EHCA_RESOURCE_ATTR(max_mw);
  586. EHCA_RESOURCE_ATTR(cur_mw);
  587. EHCA_RESOURCE_ATTR(max_pd);
  588. EHCA_RESOURCE_ATTR(max_ah);
  589. static ssize_t ehca_show_adapter_handle(struct device *dev,
  590. struct device_attribute *attr,
  591. char *buf)
  592. {
  593. struct ehca_shca *shca = dev->driver_data;
  594. return sprintf(buf, "%lx\n", shca->ipz_hca_handle.handle);
  595. }
  596. static DEVICE_ATTR(adapter_handle, S_IRUGO, ehca_show_adapter_handle, NULL);
  597. static struct attribute *ehca_dev_attrs[] = {
  598. &dev_attr_adapter_handle.attr,
  599. &dev_attr_num_ports.attr,
  600. &dev_attr_hw_ver.attr,
  601. &dev_attr_max_eq.attr,
  602. &dev_attr_cur_eq.attr,
  603. &dev_attr_max_cq.attr,
  604. &dev_attr_cur_cq.attr,
  605. &dev_attr_max_qp.attr,
  606. &dev_attr_cur_qp.attr,
  607. &dev_attr_max_mr.attr,
  608. &dev_attr_cur_mr.attr,
  609. &dev_attr_max_mw.attr,
  610. &dev_attr_cur_mw.attr,
  611. &dev_attr_max_pd.attr,
  612. &dev_attr_max_ah.attr,
  613. NULL
  614. };
  615. static struct attribute_group ehca_dev_attr_grp = {
  616. .attrs = ehca_dev_attrs
  617. };
  618. static int __devinit ehca_probe(struct of_device *dev,
  619. const struct of_device_id *id)
  620. {
  621. struct ehca_shca *shca;
  622. const u64 *handle;
  623. struct ib_pd *ibpd;
  624. int ret, i, eq_size;
  625. handle = of_get_property(dev->node, "ibm,hca-handle", NULL);
  626. if (!handle) {
  627. ehca_gen_err("Cannot get eHCA handle for adapter: %s.",
  628. dev->node->full_name);
  629. return -ENODEV;
  630. }
  631. if (!(*handle)) {
  632. ehca_gen_err("Wrong eHCA handle for adapter: %s.",
  633. dev->node->full_name);
  634. return -ENODEV;
  635. }
  636. shca = (struct ehca_shca *)ib_alloc_device(sizeof(*shca));
  637. if (!shca) {
  638. ehca_gen_err("Cannot allocate shca memory.");
  639. return -ENOMEM;
  640. }
  641. mutex_init(&shca->modify_mutex);
  642. atomic_set(&shca->num_cqs, 0);
  643. atomic_set(&shca->num_qps, 0);
  644. for (i = 0; i < ARRAY_SIZE(shca->sport); i++)
  645. spin_lock_init(&shca->sport[i].mod_sqp_lock);
  646. shca->ofdev = dev;
  647. shca->ipz_hca_handle.handle = *handle;
  648. dev->dev.driver_data = shca;
  649. ret = ehca_sense_attributes(shca);
  650. if (ret < 0) {
  651. ehca_gen_err("Cannot sense eHCA attributes.");
  652. goto probe1;
  653. }
  654. ret = ehca_init_device(shca);
  655. if (ret) {
  656. ehca_gen_err("Cannot init ehca device struct");
  657. goto probe1;
  658. }
  659. eq_size = 2 * ehca_max_cq + 4 * ehca_max_qp;
  660. /* create event queues */
  661. ret = ehca_create_eq(shca, &shca->eq, EHCA_EQ, eq_size);
  662. if (ret) {
  663. ehca_err(&shca->ib_device, "Cannot create EQ.");
  664. goto probe1;
  665. }
  666. ret = ehca_create_eq(shca, &shca->neq, EHCA_NEQ, 513);
  667. if (ret) {
  668. ehca_err(&shca->ib_device, "Cannot create NEQ.");
  669. goto probe3;
  670. }
  671. /* create internal protection domain */
  672. ibpd = ehca_alloc_pd(&shca->ib_device, (void *)(-1), NULL);
  673. if (IS_ERR(ibpd)) {
  674. ehca_err(&shca->ib_device, "Cannot create internal PD.");
  675. ret = PTR_ERR(ibpd);
  676. goto probe4;
  677. }
  678. shca->pd = container_of(ibpd, struct ehca_pd, ib_pd);
  679. shca->pd->ib_pd.device = &shca->ib_device;
  680. /* create internal max MR */
  681. ret = ehca_reg_internal_maxmr(shca, shca->pd, &shca->maxmr);
  682. if (ret) {
  683. ehca_err(&shca->ib_device, "Cannot create internal MR ret=%i",
  684. ret);
  685. goto probe5;
  686. }
  687. ret = ib_register_device(&shca->ib_device);
  688. if (ret) {
  689. ehca_err(&shca->ib_device,
  690. "ib_register_device() failed ret=%i", ret);
  691. goto probe6;
  692. }
  693. /* create AQP1 for port 1 */
  694. if (ehca_open_aqp1 == 1) {
  695. shca->sport[0].port_state = IB_PORT_DOWN;
  696. ret = ehca_create_aqp1(shca, 1);
  697. if (ret) {
  698. ehca_err(&shca->ib_device,
  699. "Cannot create AQP1 for port 1.");
  700. goto probe7;
  701. }
  702. }
  703. /* create AQP1 for port 2 */
  704. if ((ehca_open_aqp1 == 1) && (shca->num_ports == 2)) {
  705. shca->sport[1].port_state = IB_PORT_DOWN;
  706. ret = ehca_create_aqp1(shca, 2);
  707. if (ret) {
  708. ehca_err(&shca->ib_device,
  709. "Cannot create AQP1 for port 2.");
  710. goto probe8;
  711. }
  712. }
  713. ret = sysfs_create_group(&dev->dev.kobj, &ehca_dev_attr_grp);
  714. if (ret) /* only complain; we can live without attributes */
  715. ehca_err(&shca->ib_device,
  716. "Cannot create device attributes ret=%d", ret);
  717. spin_lock(&shca_list_lock);
  718. list_add(&shca->shca_list, &shca_list);
  719. spin_unlock(&shca_list_lock);
  720. return 0;
  721. probe8:
  722. ret = ehca_destroy_aqp1(&shca->sport[0]);
  723. if (ret)
  724. ehca_err(&shca->ib_device,
  725. "Cannot destroy AQP1 for port 1. ret=%i", ret);
  726. probe7:
  727. ib_unregister_device(&shca->ib_device);
  728. probe6:
  729. ret = ehca_dereg_internal_maxmr(shca);
  730. if (ret)
  731. ehca_err(&shca->ib_device,
  732. "Cannot destroy internal MR. ret=%x", ret);
  733. probe5:
  734. ret = ehca_dealloc_pd(&shca->pd->ib_pd);
  735. if (ret)
  736. ehca_err(&shca->ib_device,
  737. "Cannot destroy internal PD. ret=%x", ret);
  738. probe4:
  739. ret = ehca_destroy_eq(shca, &shca->neq);
  740. if (ret)
  741. ehca_err(&shca->ib_device,
  742. "Cannot destroy NEQ. ret=%x", ret);
  743. probe3:
  744. ret = ehca_destroy_eq(shca, &shca->eq);
  745. if (ret)
  746. ehca_err(&shca->ib_device,
  747. "Cannot destroy EQ. ret=%x", ret);
  748. probe1:
  749. ib_dealloc_device(&shca->ib_device);
  750. return -EINVAL;
  751. }
  752. static int __devexit ehca_remove(struct of_device *dev)
  753. {
  754. struct ehca_shca *shca = dev->dev.driver_data;
  755. int ret;
  756. sysfs_remove_group(&dev->dev.kobj, &ehca_dev_attr_grp);
  757. if (ehca_open_aqp1 == 1) {
  758. int i;
  759. for (i = 0; i < shca->num_ports; i++) {
  760. ret = ehca_destroy_aqp1(&shca->sport[i]);
  761. if (ret)
  762. ehca_err(&shca->ib_device,
  763. "Cannot destroy AQP1 for port %x "
  764. "ret=%i", ret, i);
  765. }
  766. }
  767. ib_unregister_device(&shca->ib_device);
  768. ret = ehca_dereg_internal_maxmr(shca);
  769. if (ret)
  770. ehca_err(&shca->ib_device,
  771. "Cannot destroy internal MR. ret=%i", ret);
  772. ret = ehca_dealloc_pd(&shca->pd->ib_pd);
  773. if (ret)
  774. ehca_err(&shca->ib_device,
  775. "Cannot destroy internal PD. ret=%i", ret);
  776. ret = ehca_destroy_eq(shca, &shca->eq);
  777. if (ret)
  778. ehca_err(&shca->ib_device, "Cannot destroy EQ. ret=%i", ret);
  779. ret = ehca_destroy_eq(shca, &shca->neq);
  780. if (ret)
  781. ehca_err(&shca->ib_device, "Canot destroy NEQ. ret=%i", ret);
  782. ib_dealloc_device(&shca->ib_device);
  783. spin_lock(&shca_list_lock);
  784. list_del(&shca->shca_list);
  785. spin_unlock(&shca_list_lock);
  786. return ret;
  787. }
  788. static struct of_device_id ehca_device_table[] =
  789. {
  790. {
  791. .name = "lhca",
  792. .compatible = "IBM,lhca",
  793. },
  794. {},
  795. };
  796. static struct of_platform_driver ehca_driver = {
  797. .name = "ehca",
  798. .match_table = ehca_device_table,
  799. .probe = ehca_probe,
  800. .remove = ehca_remove,
  801. .driver = {
  802. .groups = ehca_drv_attr_groups,
  803. },
  804. };
  805. void ehca_poll_eqs(unsigned long data)
  806. {
  807. struct ehca_shca *shca;
  808. spin_lock(&shca_list_lock);
  809. list_for_each_entry(shca, &shca_list, shca_list) {
  810. if (shca->eq.is_initialized) {
  811. /* call deadman proc only if eq ptr does not change */
  812. struct ehca_eq *eq = &shca->eq;
  813. int max = 3;
  814. volatile u64 q_ofs, q_ofs2;
  815. u64 flags;
  816. spin_lock_irqsave(&eq->spinlock, flags);
  817. q_ofs = eq->ipz_queue.current_q_offset;
  818. spin_unlock_irqrestore(&eq->spinlock, flags);
  819. do {
  820. spin_lock_irqsave(&eq->spinlock, flags);
  821. q_ofs2 = eq->ipz_queue.current_q_offset;
  822. spin_unlock_irqrestore(&eq->spinlock, flags);
  823. max--;
  824. } while (q_ofs == q_ofs2 && max > 0);
  825. if (q_ofs == q_ofs2)
  826. ehca_process_eq(shca, 0);
  827. }
  828. }
  829. mod_timer(&poll_eqs_timer, round_jiffies(jiffies + HZ));
  830. spin_unlock(&shca_list_lock);
  831. }
  832. static int __init ehca_module_init(void)
  833. {
  834. int ret;
  835. printk(KERN_INFO "eHCA Infiniband Device Driver "
  836. "(Version " HCAD_VERSION ")\n");
  837. ret = ehca_create_comp_pool();
  838. if (ret) {
  839. ehca_gen_err("Cannot create comp pool.");
  840. return ret;
  841. }
  842. ret = ehca_create_slab_caches();
  843. if (ret) {
  844. ehca_gen_err("Cannot create SLAB caches");
  845. ret = -ENOMEM;
  846. goto module_init1;
  847. }
  848. ret = ibmebus_register_driver(&ehca_driver);
  849. if (ret) {
  850. ehca_gen_err("Cannot register eHCA device driver");
  851. ret = -EINVAL;
  852. goto module_init2;
  853. }
  854. if (ehca_poll_all_eqs != 1) {
  855. ehca_gen_err("WARNING!!!");
  856. ehca_gen_err("It is possible to lose interrupts.");
  857. } else {
  858. init_timer(&poll_eqs_timer);
  859. poll_eqs_timer.function = ehca_poll_eqs;
  860. poll_eqs_timer.expires = jiffies + HZ;
  861. add_timer(&poll_eqs_timer);
  862. }
  863. return 0;
  864. module_init2:
  865. ehca_destroy_slab_caches();
  866. module_init1:
  867. ehca_destroy_comp_pool();
  868. return ret;
  869. };
  870. static void __exit ehca_module_exit(void)
  871. {
  872. if (ehca_poll_all_eqs == 1)
  873. del_timer_sync(&poll_eqs_timer);
  874. ibmebus_unregister_driver(&ehca_driver);
  875. ehca_destroy_slab_caches();
  876. ehca_destroy_comp_pool();
  877. idr_destroy(&ehca_cq_idr);
  878. idr_destroy(&ehca_qp_idr);
  879. };
  880. module_init(ehca_module_init);
  881. module_exit(ehca_module_exit);