via82cxxx.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500
  1. /*
  2. * VIA IDE driver for Linux. Supported southbridges:
  3. *
  4. * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  5. * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  6. * vt8235, vt8237, vt8237a
  7. *
  8. * Copyright (c) 2000-2002 Vojtech Pavlik
  9. * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
  10. *
  11. * Based on the work of:
  12. * Michel Aubry
  13. * Jeff Garzik
  14. * Andre Hedrick
  15. *
  16. * Documentation:
  17. * Obsolete device documentation publically available from via.com.tw
  18. * Current device documentation available under NDA only
  19. */
  20. /*
  21. * This program is free software; you can redistribute it and/or modify it
  22. * under the terms of the GNU General Public License version 2 as published by
  23. * the Free Software Foundation.
  24. */
  25. #include <linux/module.h>
  26. #include <linux/kernel.h>
  27. #include <linux/pci.h>
  28. #include <linux/init.h>
  29. #include <linux/ide.h>
  30. #include <linux/dmi.h>
  31. #ifdef CONFIG_PPC_CHRP
  32. #include <asm/processor.h>
  33. #endif
  34. #include "ide-timing.h"
  35. #define VIA_IDE_ENABLE 0x40
  36. #define VIA_IDE_CONFIG 0x41
  37. #define VIA_FIFO_CONFIG 0x43
  38. #define VIA_MISC_1 0x44
  39. #define VIA_MISC_2 0x45
  40. #define VIA_MISC_3 0x46
  41. #define VIA_DRIVE_TIMING 0x48
  42. #define VIA_8BIT_TIMING 0x4e
  43. #define VIA_ADDRESS_SETUP 0x4c
  44. #define VIA_UDMA_TIMING 0x50
  45. #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
  46. #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
  47. #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
  48. #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
  49. #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
  50. #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
  51. /*
  52. * VIA SouthBridge chips.
  53. */
  54. static struct via_isa_bridge {
  55. char *name;
  56. u16 id;
  57. u8 rev_min;
  58. u8 rev_max;
  59. u8 udma_mask;
  60. u8 flags;
  61. } via_isa_bridges[] = {
  62. { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  63. { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  64. { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  65. { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  66. { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  67. { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  68. { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  69. { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  70. { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  71. { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
  72. { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
  73. { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
  74. { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
  75. { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
  76. { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  77. { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
  78. { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  79. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
  80. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
  81. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
  82. { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
  83. { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
  84. { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
  85. { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
  86. { NULL }
  87. };
  88. static unsigned int via_clock;
  89. static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
  90. struct via82cxxx_dev
  91. {
  92. struct via_isa_bridge *via_config;
  93. unsigned int via_80w;
  94. };
  95. /**
  96. * via_set_speed - write timing registers
  97. * @dev: PCI device
  98. * @dn: device
  99. * @timing: IDE timing data to use
  100. *
  101. * via_set_speed writes timing values to the chipset registers
  102. */
  103. static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
  104. {
  105. struct pci_dev *dev = to_pci_dev(hwif->dev);
  106. struct via82cxxx_dev *vdev = pci_get_drvdata(dev);
  107. u8 t;
  108. if (~vdev->via_config->flags & VIA_BAD_AST) {
  109. pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
  110. t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
  111. pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
  112. }
  113. pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
  114. ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
  115. pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
  116. ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
  117. switch (vdev->via_config->udma_mask) {
  118. case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
  119. case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
  120. case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
  121. case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
  122. default: return;
  123. }
  124. pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
  125. }
  126. /**
  127. * via_set_drive - configure transfer mode
  128. * @drive: Drive to set up
  129. * @speed: desired speed
  130. *
  131. * via_set_drive() computes timing values configures the chipset to
  132. * a desired transfer mode. It also can be called by upper layers.
  133. */
  134. static void via_set_drive(ide_drive_t *drive, const u8 speed)
  135. {
  136. ide_hwif_t *hwif = drive->hwif;
  137. ide_drive_t *peer = hwif->drives + (~drive->dn & 1);
  138. struct pci_dev *dev = to_pci_dev(hwif->dev);
  139. struct via82cxxx_dev *vdev = pci_get_drvdata(dev);
  140. struct ide_timing t, p;
  141. unsigned int T, UT;
  142. T = 1000000000 / via_clock;
  143. switch (vdev->via_config->udma_mask) {
  144. case ATA_UDMA2: UT = T; break;
  145. case ATA_UDMA4: UT = T/2; break;
  146. case ATA_UDMA5: UT = T/3; break;
  147. case ATA_UDMA6: UT = T/4; break;
  148. default: UT = T;
  149. }
  150. ide_timing_compute(drive, speed, &t, T, UT);
  151. if (peer->present) {
  152. ide_timing_compute(peer, peer->current_speed, &p, T, UT);
  153. ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
  154. }
  155. via_set_speed(HWIF(drive), drive->dn, &t);
  156. }
  157. /**
  158. * via_set_pio_mode - set host controller for PIO mode
  159. * @drive: drive
  160. * @pio: PIO mode number
  161. *
  162. * A callback from the upper layers for PIO-only tuning.
  163. */
  164. static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
  165. {
  166. via_set_drive(drive, XFER_PIO_0 + pio);
  167. }
  168. static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
  169. {
  170. struct via_isa_bridge *via_config;
  171. for (via_config = via_isa_bridges; via_config->id; via_config++)
  172. if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
  173. !!(via_config->flags & VIA_BAD_ID),
  174. via_config->id, NULL))) {
  175. if ((*isa)->revision >= via_config->rev_min &&
  176. (*isa)->revision <= via_config->rev_max)
  177. break;
  178. pci_dev_put(*isa);
  179. }
  180. return via_config;
  181. }
  182. /*
  183. * Check and handle 80-wire cable presence
  184. */
  185. static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
  186. {
  187. int i;
  188. switch (vdev->via_config->udma_mask) {
  189. case ATA_UDMA4:
  190. for (i = 24; i >= 0; i -= 8)
  191. if (((u >> (i & 16)) & 8) &&
  192. ((u >> i) & 0x20) &&
  193. (((u >> i) & 7) < 2)) {
  194. /*
  195. * 2x PCI clock and
  196. * UDMA w/ < 3T/cycle
  197. */
  198. vdev->via_80w |= (1 << (1 - (i >> 4)));
  199. }
  200. break;
  201. case ATA_UDMA5:
  202. for (i = 24; i >= 0; i -= 8)
  203. if (((u >> i) & 0x10) ||
  204. (((u >> i) & 0x20) &&
  205. (((u >> i) & 7) < 4))) {
  206. /* BIOS 80-wire bit or
  207. * UDMA w/ < 60ns/cycle
  208. */
  209. vdev->via_80w |= (1 << (1 - (i >> 4)));
  210. }
  211. break;
  212. case ATA_UDMA6:
  213. for (i = 24; i >= 0; i -= 8)
  214. if (((u >> i) & 0x10) ||
  215. (((u >> i) & 0x20) &&
  216. (((u >> i) & 7) < 6))) {
  217. /* BIOS 80-wire bit or
  218. * UDMA w/ < 60ns/cycle
  219. */
  220. vdev->via_80w |= (1 << (1 - (i >> 4)));
  221. }
  222. break;
  223. }
  224. }
  225. /**
  226. * init_chipset_via82cxxx - initialization handler
  227. * @dev: PCI device
  228. * @name: Name of interface
  229. *
  230. * The initialization callback. Here we determine the IDE chip type
  231. * and initialize its drive independent registers.
  232. */
  233. static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
  234. {
  235. struct pci_dev *isa = NULL;
  236. struct via82cxxx_dev *vdev;
  237. struct via_isa_bridge *via_config;
  238. u8 t, v;
  239. u32 u;
  240. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  241. if (!vdev) {
  242. printk(KERN_ERR "VP_IDE: out of memory :(\n");
  243. return -ENOMEM;
  244. }
  245. pci_set_drvdata(dev, vdev);
  246. /*
  247. * Find the ISA bridge to see how good the IDE is.
  248. */
  249. vdev->via_config = via_config = via_config_find(&isa);
  250. /* We checked this earlier so if it fails here deeep badness
  251. is involved */
  252. BUG_ON(!via_config->id);
  253. /*
  254. * Detect cable and configure Clk66
  255. */
  256. pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
  257. via_cable_detect(vdev, u);
  258. if (via_config->udma_mask == ATA_UDMA4) {
  259. /* Enable Clk66 */
  260. pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
  261. } else if (via_config->flags & VIA_BAD_CLK66) {
  262. /* Would cause trouble on 596a and 686 */
  263. pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
  264. }
  265. /*
  266. * Check whether interfaces are enabled.
  267. */
  268. pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
  269. /*
  270. * Set up FIFO sizes and thresholds.
  271. */
  272. pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
  273. /* Disable PREQ# till DDACK# */
  274. if (via_config->flags & VIA_BAD_PREQ) {
  275. /* Would crash on 586b rev 41 */
  276. t &= 0x7f;
  277. }
  278. /* Fix FIFO split between channels */
  279. if (via_config->flags & VIA_SET_FIFO) {
  280. t &= (t & 0x9f);
  281. switch (v & 3) {
  282. case 2: t |= 0x00; break; /* 16 on primary */
  283. case 1: t |= 0x60; break; /* 16 on secondary */
  284. case 3: t |= 0x20; break; /* 8 pri 8 sec */
  285. }
  286. }
  287. pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
  288. /*
  289. * Determine system bus clock.
  290. */
  291. via_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
  292. switch (via_clock) {
  293. case 33000: via_clock = 33333; break;
  294. case 37000: via_clock = 37500; break;
  295. case 41000: via_clock = 41666; break;
  296. }
  297. if (via_clock < 20000 || via_clock > 50000) {
  298. printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
  299. "impossible (%d), using 33 MHz instead.\n", via_clock);
  300. printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
  301. "to assume 80-wire cable.\n");
  302. via_clock = 33333;
  303. }
  304. /*
  305. * Print the boot message.
  306. */
  307. printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
  308. "controller on pci%s\n",
  309. via_config->name, isa->revision,
  310. via_config->udma_mask ? "U" : "MW",
  311. via_dma[via_config->udma_mask ?
  312. (fls(via_config->udma_mask) - 1) : 0],
  313. pci_name(dev));
  314. pci_dev_put(isa);
  315. return 0;
  316. }
  317. /*
  318. * Cable special cases
  319. */
  320. static const struct dmi_system_id cable_dmi_table[] = {
  321. {
  322. .ident = "Acer Ferrari 3400",
  323. .matches = {
  324. DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
  325. DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
  326. },
  327. },
  328. { }
  329. };
  330. static int via_cable_override(struct pci_dev *pdev)
  331. {
  332. /* Systems by DMI */
  333. if (dmi_check_system(cable_dmi_table))
  334. return 1;
  335. /* Arima W730-K8/Targa Visionary 811/... */
  336. if (pdev->subsystem_vendor == 0x161F &&
  337. pdev->subsystem_device == 0x2032)
  338. return 1;
  339. return 0;
  340. }
  341. static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
  342. {
  343. struct pci_dev *pdev = to_pci_dev(hwif->dev);
  344. struct via82cxxx_dev *vdev = pci_get_drvdata(pdev);
  345. if (via_cable_override(pdev))
  346. return ATA_CBL_PATA40_SHORT;
  347. if ((vdev->via_80w >> hwif->channel) & 1)
  348. return ATA_CBL_PATA80;
  349. else
  350. return ATA_CBL_PATA40;
  351. }
  352. static const struct ide_port_ops via_port_ops = {
  353. .set_pio_mode = via_set_pio_mode,
  354. .set_dma_mode = via_set_drive,
  355. .cable_detect = via82cxxx_cable_detect,
  356. };
  357. static const struct ide_port_info via82cxxx_chipset __devinitdata = {
  358. .name = "VP_IDE",
  359. .init_chipset = init_chipset_via82cxxx,
  360. .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
  361. .port_ops = &via_port_ops,
  362. .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
  363. IDE_HFLAG_ABUSE_SET_DMA_MODE |
  364. IDE_HFLAG_POST_SET_MODE |
  365. IDE_HFLAG_IO_32BIT,
  366. .pio_mask = ATA_PIO5,
  367. .swdma_mask = ATA_SWDMA2,
  368. .mwdma_mask = ATA_MWDMA2,
  369. };
  370. static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  371. {
  372. struct pci_dev *isa = NULL;
  373. struct via_isa_bridge *via_config;
  374. u8 idx = id->driver_data;
  375. struct ide_port_info d;
  376. d = via82cxxx_chipset;
  377. /*
  378. * Find the ISA bridge and check we know what it is.
  379. */
  380. via_config = via_config_find(&isa);
  381. pci_dev_put(isa);
  382. if (!via_config->id) {
  383. printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
  384. return -ENODEV;
  385. }
  386. if (idx == 0)
  387. d.host_flags |= IDE_HFLAG_NO_AUTODMA;
  388. else
  389. d.enablebits[1].reg = d.enablebits[0].reg = 0;
  390. if ((via_config->flags & VIA_NO_UNMASK) == 0)
  391. d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
  392. #ifdef CONFIG_PPC_CHRP
  393. if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos)
  394. d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS;
  395. #endif
  396. d.udma_mask = via_config->udma_mask;
  397. return ide_setup_pci_device(dev, &d);
  398. }
  399. static const struct pci_device_id via_pci_tbl[] = {
  400. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
  401. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
  402. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
  403. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
  404. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
  405. { 0, },
  406. };
  407. MODULE_DEVICE_TABLE(pci, via_pci_tbl);
  408. static struct pci_driver driver = {
  409. .name = "VIA_IDE",
  410. .id_table = via_pci_tbl,
  411. .probe = via_init_one,
  412. };
  413. static int __init via_ide_init(void)
  414. {
  415. return ide_pci_register_driver(&driver);
  416. }
  417. module_init(via_ide_init);
  418. MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
  419. MODULE_DESCRIPTION("PCI driver module for VIA IDE");
  420. MODULE_LICENSE("GPL");