alim15x3.c 15 KB

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  1. /*
  2. * Copyright (C) 1998-2000 Michel Aubry, Maintainer
  3. * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
  4. * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
  5. *
  6. * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
  7. * May be copied or modified under the terms of the GNU General Public License
  8. * Copyright (C) 2002 Alan Cox <alan@redhat.com>
  9. * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
  10. * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
  11. * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
  12. *
  13. * (U)DMA capable version of ali 1533/1543(C), 1535(D)
  14. *
  15. **********************************************************************
  16. * 9/7/99 --Parts from the above author are included and need to be
  17. * converted into standard interface, once I finish the thought.
  18. *
  19. * Recent changes
  20. * Don't use LBA48 mode on ALi <= 0xC4
  21. * Don't poke 0x79 with a non ALi northbridge
  22. * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
  23. * Allow UDMA6 on revisions > 0xC4
  24. *
  25. * Documentation
  26. * Chipset documentation available under NDA only
  27. *
  28. */
  29. #include <linux/module.h>
  30. #include <linux/types.h>
  31. #include <linux/kernel.h>
  32. #include <linux/pci.h>
  33. #include <linux/hdreg.h>
  34. #include <linux/ide.h>
  35. #include <linux/init.h>
  36. #include <linux/dmi.h>
  37. #include <asm/io.h>
  38. /*
  39. * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
  40. * (this is DANGEROUS and could result in data corruption).
  41. */
  42. static int wdc_udma;
  43. module_param(wdc_udma, bool, 0);
  44. MODULE_PARM_DESC(wdc_udma,
  45. "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");
  46. /*
  47. * ALi devices are not plug in. Otherwise these static values would
  48. * need to go. They ought to go away anyway
  49. */
  50. static u8 m5229_revision;
  51. static u8 chip_is_1543c_e;
  52. static struct pci_dev *isa_dev;
  53. /**
  54. * ali_set_pio_mode - set host controller for PIO mode
  55. * @drive: drive
  56. * @pio: PIO mode number
  57. *
  58. * Program the controller for the given PIO mode.
  59. */
  60. static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
  61. {
  62. ide_hwif_t *hwif = HWIF(drive);
  63. struct pci_dev *dev = to_pci_dev(hwif->dev);
  64. int s_time, a_time, c_time;
  65. u8 s_clc, a_clc, r_clc;
  66. unsigned long flags;
  67. int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
  68. int port = hwif->channel ? 0x5c : 0x58;
  69. int portFIFO = hwif->channel ? 0x55 : 0x54;
  70. u8 cd_dma_fifo = 0;
  71. int unit = drive->select.b.unit & 1;
  72. s_time = ide_pio_timings[pio].setup_time;
  73. a_time = ide_pio_timings[pio].active_time;
  74. if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
  75. s_clc = 0;
  76. if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
  77. a_clc = 0;
  78. c_time = ide_pio_timings[pio].cycle_time;
  79. if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
  80. r_clc = 1;
  81. } else {
  82. if (r_clc >= 16)
  83. r_clc = 0;
  84. }
  85. local_irq_save(flags);
  86. /*
  87. * PIO mode => ATA FIFO on, ATAPI FIFO off
  88. */
  89. pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
  90. if (drive->media==ide_disk) {
  91. if (unit) {
  92. pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
  93. } else {
  94. pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
  95. }
  96. } else {
  97. if (unit) {
  98. pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
  99. } else {
  100. pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
  101. }
  102. }
  103. pci_write_config_byte(dev, port, s_clc);
  104. pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) | r_clc);
  105. local_irq_restore(flags);
  106. }
  107. /**
  108. * ali_udma_filter - compute UDMA mask
  109. * @drive: IDE device
  110. *
  111. * Return available UDMA modes.
  112. *
  113. * The actual rules for the ALi are:
  114. * No UDMA on revisions <= 0x20
  115. * Disk only for revisions < 0xC2
  116. * Not WDC drives on M1543C-E (?)
  117. */
  118. static u8 ali_udma_filter(ide_drive_t *drive)
  119. {
  120. if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
  121. if (drive->media != ide_disk)
  122. return 0;
  123. if (chip_is_1543c_e && strstr(drive->id->model, "WDC ") &&
  124. wdc_udma == 0)
  125. return 0;
  126. }
  127. return drive->hwif->ultra_mask;
  128. }
  129. /**
  130. * ali_set_dma_mode - set host controller for DMA mode
  131. * @drive: drive
  132. * @speed: DMA mode
  133. *
  134. * Configure the hardware for the desired IDE transfer mode.
  135. */
  136. static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
  137. {
  138. ide_hwif_t *hwif = HWIF(drive);
  139. struct pci_dev *dev = to_pci_dev(hwif->dev);
  140. u8 speed1 = speed;
  141. u8 unit = (drive->select.b.unit & 0x01);
  142. u8 tmpbyte = 0x00;
  143. int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
  144. if (speed == XFER_UDMA_6)
  145. speed1 = 0x47;
  146. if (speed < XFER_UDMA_0) {
  147. u8 ultra_enable = (unit) ? 0x7f : 0xf7;
  148. /*
  149. * clear "ultra enable" bit
  150. */
  151. pci_read_config_byte(dev, m5229_udma, &tmpbyte);
  152. tmpbyte &= ultra_enable;
  153. pci_write_config_byte(dev, m5229_udma, tmpbyte);
  154. /*
  155. * FIXME: Oh, my... DMA timings are never set.
  156. */
  157. } else {
  158. pci_read_config_byte(dev, m5229_udma, &tmpbyte);
  159. tmpbyte &= (0x0f << ((1-unit) << 2));
  160. /*
  161. * enable ultra dma and set timing
  162. */
  163. tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
  164. pci_write_config_byte(dev, m5229_udma, tmpbyte);
  165. if (speed >= XFER_UDMA_3) {
  166. pci_read_config_byte(dev, 0x4b, &tmpbyte);
  167. tmpbyte |= 1;
  168. pci_write_config_byte(dev, 0x4b, tmpbyte);
  169. }
  170. }
  171. }
  172. /**
  173. * ali15x3_dma_setup - begin a DMA phase
  174. * @drive: target device
  175. *
  176. * Returns 1 if the DMA cannot be performed, zero on success.
  177. */
  178. static int ali15x3_dma_setup(ide_drive_t *drive)
  179. {
  180. if (m5229_revision < 0xC2 && drive->media != ide_disk) {
  181. if (rq_data_dir(drive->hwif->hwgroup->rq))
  182. return 1; /* try PIO instead of DMA */
  183. }
  184. return ide_dma_setup(drive);
  185. }
  186. /**
  187. * init_chipset_ali15x3 - Initialise an ALi IDE controller
  188. * @dev: PCI device
  189. * @name: Name of the controller
  190. *
  191. * This function initializes the ALI IDE controller and where
  192. * appropriate also sets up the 1533 southbridge.
  193. */
  194. static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const char *name)
  195. {
  196. unsigned long flags;
  197. u8 tmpbyte;
  198. struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
  199. m5229_revision = dev->revision;
  200. isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
  201. local_irq_save(flags);
  202. if (m5229_revision < 0xC2) {
  203. /*
  204. * revision 0x20 (1543-E, 1543-F)
  205. * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
  206. * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
  207. */
  208. pci_read_config_byte(dev, 0x4b, &tmpbyte);
  209. /*
  210. * clear bit 7
  211. */
  212. pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
  213. /*
  214. * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
  215. */
  216. if (m5229_revision >= 0x20 && isa_dev) {
  217. pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
  218. chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
  219. }
  220. goto out;
  221. }
  222. /*
  223. * 1543C-B?, 1535, 1535D, 1553
  224. * Note 1: not all "motherboard" support this detection
  225. * Note 2: if no udma 66 device, the detection may "error".
  226. * but in this case, we will not set the device to
  227. * ultra 66, the detection result is not important
  228. */
  229. /*
  230. * enable "Cable Detection", m5229, 0x4b, bit3
  231. */
  232. pci_read_config_byte(dev, 0x4b, &tmpbyte);
  233. pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
  234. /*
  235. * We should only tune the 1533 enable if we are using an ALi
  236. * North bridge. We might have no north found on some zany
  237. * box without a device at 0:0.0. The ALi bridge will be at
  238. * 0:0.0 so if we didn't find one we know what is cooking.
  239. */
  240. if (north && north->vendor != PCI_VENDOR_ID_AL)
  241. goto out;
  242. if (m5229_revision < 0xC5 && isa_dev)
  243. {
  244. /*
  245. * set south-bridge's enable bit, m1533, 0x79
  246. */
  247. pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
  248. if (m5229_revision == 0xC2) {
  249. /*
  250. * 1543C-B0 (m1533, 0x79, bit 2)
  251. */
  252. pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
  253. } else if (m5229_revision >= 0xC3) {
  254. /*
  255. * 1553/1535 (m1533, 0x79, bit 1)
  256. */
  257. pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
  258. }
  259. }
  260. out:
  261. /*
  262. * CD_ROM DMA on (m5229, 0x53, bit0)
  263. * Enable this bit even if we want to use PIO.
  264. * PIO FIFO off (m5229, 0x53, bit1)
  265. * The hardware will use 0x54h and 0x55h to control PIO FIFO.
  266. * (Not on later devices it seems)
  267. *
  268. * 0x53 changes meaning on later revs - we must no touch
  269. * bit 1 on them. Need to check if 0x20 is the right break.
  270. */
  271. if (m5229_revision >= 0x20) {
  272. pci_read_config_byte(dev, 0x53, &tmpbyte);
  273. if (m5229_revision <= 0x20)
  274. tmpbyte = (tmpbyte & (~0x02)) | 0x01;
  275. else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
  276. tmpbyte |= 0x03;
  277. else
  278. tmpbyte |= 0x01;
  279. pci_write_config_byte(dev, 0x53, tmpbyte);
  280. }
  281. pci_dev_put(north);
  282. pci_dev_put(isa_dev);
  283. local_irq_restore(flags);
  284. return 0;
  285. }
  286. /*
  287. * Cable special cases
  288. */
  289. static const struct dmi_system_id cable_dmi_table[] = {
  290. {
  291. .ident = "HP Pavilion N5430",
  292. .matches = {
  293. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  294. DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
  295. },
  296. },
  297. {
  298. .ident = "Toshiba Satellite S1800-814",
  299. .matches = {
  300. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  301. DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
  302. },
  303. },
  304. { }
  305. };
  306. static int ali_cable_override(struct pci_dev *pdev)
  307. {
  308. /* Fujitsu P2000 */
  309. if (pdev->subsystem_vendor == 0x10CF &&
  310. pdev->subsystem_device == 0x10AF)
  311. return 1;
  312. /* Mitac 8317 (Winbook-A) and relatives */
  313. if (pdev->subsystem_vendor == 0x1071 &&
  314. pdev->subsystem_device == 0x8317)
  315. return 1;
  316. /* Systems by DMI */
  317. if (dmi_check_system(cable_dmi_table))
  318. return 1;
  319. return 0;
  320. }
  321. /**
  322. * ali_cable_detect - cable detection
  323. * @hwif: IDE interface
  324. *
  325. * This checks if the controller and the cable are capable
  326. * of UDMA66 transfers. It doesn't check the drives.
  327. * But see note 2 below!
  328. *
  329. * FIXME: frobs bits that are not defined on newer ALi devicea
  330. */
  331. static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
  332. {
  333. struct pci_dev *dev = to_pci_dev(hwif->dev);
  334. unsigned long flags;
  335. u8 cbl = ATA_CBL_PATA40, tmpbyte;
  336. local_irq_save(flags);
  337. if (m5229_revision >= 0xC2) {
  338. /*
  339. * m5229 80-pin cable detection (from Host View)
  340. *
  341. * 0x4a bit0 is 0 => primary channel has 80-pin
  342. * 0x4a bit1 is 0 => secondary channel has 80-pin
  343. *
  344. * Certain laptops use short but suitable cables
  345. * and don't implement the detect logic.
  346. */
  347. if (ali_cable_override(dev))
  348. cbl = ATA_CBL_PATA40_SHORT;
  349. else {
  350. pci_read_config_byte(dev, 0x4a, &tmpbyte);
  351. if ((tmpbyte & (1 << hwif->channel)) == 0)
  352. cbl = ATA_CBL_PATA80;
  353. }
  354. }
  355. local_irq_restore(flags);
  356. return cbl;
  357. }
  358. #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
  359. /**
  360. * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
  361. * @hwif: interface to configure
  362. *
  363. * Obtain the IRQ tables for an ALi based IDE solution on the PC
  364. * class platforms. This part of the code isn't applicable to the
  365. * Sparc and PowerPC systems.
  366. */
  367. static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
  368. {
  369. struct pci_dev *dev = to_pci_dev(hwif->dev);
  370. u8 ideic, inmir;
  371. s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
  372. 1, 11, 0, 12, 0, 14, 0, 15 };
  373. int irq = -1;
  374. if (dev->device == PCI_DEVICE_ID_AL_M5229)
  375. hwif->irq = hwif->channel ? 15 : 14;
  376. if (isa_dev) {
  377. /*
  378. * read IDE interface control
  379. */
  380. pci_read_config_byte(isa_dev, 0x58, &ideic);
  381. /* bit0, bit1 */
  382. ideic = ideic & 0x03;
  383. /* get IRQ for IDE Controller */
  384. if ((hwif->channel && ideic == 0x03) ||
  385. (!hwif->channel && !ideic)) {
  386. /*
  387. * get SIRQ1 routing table
  388. */
  389. pci_read_config_byte(isa_dev, 0x44, &inmir);
  390. inmir = inmir & 0x0f;
  391. irq = irq_routing_table[inmir];
  392. } else if (hwif->channel && !(ideic & 0x01)) {
  393. /*
  394. * get SIRQ2 routing table
  395. */
  396. pci_read_config_byte(isa_dev, 0x75, &inmir);
  397. inmir = inmir & 0x0f;
  398. irq = irq_routing_table[inmir];
  399. }
  400. if(irq >= 0)
  401. hwif->irq = irq;
  402. }
  403. }
  404. #else
  405. #define init_hwif_ali15x3 NULL
  406. #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
  407. /**
  408. * init_dma_ali15x3 - set up DMA on ALi15x3
  409. * @hwif: IDE interface
  410. * @d: IDE port info
  411. *
  412. * Set up the DMA functionality on the ALi 15x3.
  413. */
  414. static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
  415. const struct ide_port_info *d)
  416. {
  417. struct pci_dev *dev = to_pci_dev(hwif->dev);
  418. unsigned long base = ide_pci_dma_base(hwif, d);
  419. if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
  420. return -1;
  421. if (!hwif->channel)
  422. outb(inb(base + 2) & 0x60, base + 2);
  423. printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
  424. hwif->name, base, base + 7);
  425. if (ide_allocate_dma_engine(hwif))
  426. return -1;
  427. ide_setup_dma(hwif, base);
  428. return 0;
  429. }
  430. static const struct ide_port_ops ali_port_ops = {
  431. .set_pio_mode = ali_set_pio_mode,
  432. .set_dma_mode = ali_set_dma_mode,
  433. .udma_filter = ali_udma_filter,
  434. .cable_detect = ali_cable_detect,
  435. };
  436. static const struct ide_dma_ops ali_dma_ops = {
  437. .dma_host_set = ide_dma_host_set,
  438. .dma_setup = ali15x3_dma_setup,
  439. .dma_exec_cmd = ide_dma_exec_cmd,
  440. .dma_start = ide_dma_start,
  441. .dma_end = __ide_dma_end,
  442. .dma_test_irq = ide_dma_test_irq,
  443. .dma_lost_irq = ide_dma_lost_irq,
  444. .dma_timeout = ide_dma_timeout,
  445. };
  446. static const struct ide_port_info ali15x3_chipset __devinitdata = {
  447. .name = "ALI15X3",
  448. .init_chipset = init_chipset_ali15x3,
  449. .init_hwif = init_hwif_ali15x3,
  450. .init_dma = init_dma_ali15x3,
  451. .port_ops = &ali_port_ops,
  452. .pio_mask = ATA_PIO5,
  453. .swdma_mask = ATA_SWDMA2,
  454. .mwdma_mask = ATA_MWDMA2,
  455. };
  456. /**
  457. * alim15x3_init_one - set up an ALi15x3 IDE controller
  458. * @dev: PCI device to set up
  459. *
  460. * Perform the actual set up for an ALi15x3 that has been found by the
  461. * hot plug layer.
  462. */
  463. static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  464. {
  465. struct ide_port_info d = ali15x3_chipset;
  466. u8 rev = dev->revision, idx = id->driver_data;
  467. /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
  468. if (rev <= 0xC4)
  469. d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
  470. if (rev >= 0x20) {
  471. if (rev == 0x20)
  472. d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
  473. if (rev < 0xC2)
  474. d.udma_mask = ATA_UDMA2;
  475. else if (rev == 0xC2 || rev == 0xC3)
  476. d.udma_mask = ATA_UDMA4;
  477. else if (rev == 0xC4)
  478. d.udma_mask = ATA_UDMA5;
  479. else
  480. d.udma_mask = ATA_UDMA6;
  481. d.dma_ops = &ali_dma_ops;
  482. } else {
  483. d.host_flags |= IDE_HFLAG_NO_DMA;
  484. d.mwdma_mask = d.swdma_mask = 0;
  485. }
  486. if (idx == 0)
  487. d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
  488. return ide_setup_pci_device(dev, &d);
  489. }
  490. static const struct pci_device_id alim15x3_pci_tbl[] = {
  491. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
  492. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
  493. { 0, },
  494. };
  495. MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
  496. static struct pci_driver driver = {
  497. .name = "ALI15x3_IDE",
  498. .id_table = alim15x3_pci_tbl,
  499. .probe = alim15x3_init_one,
  500. };
  501. static int __init ali15x3_ide_init(void)
  502. {
  503. return ide_pci_register_driver(&driver);
  504. }
  505. module_init(ali15x3_ide_init);
  506. MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
  507. MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
  508. MODULE_LICENSE("GPL");