i2c-sh_mobile.c 11 KB

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  1. /*
  2. * SuperH Mobile I2C Controller
  3. *
  4. * Copyright (C) 2008 Magnus Damm
  5. *
  6. * Portions of the code based on out-of-tree driver i2c-sh7343.c
  7. * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/delay.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/i2c.h>
  29. #include <linux/err.h>
  30. #include <linux/clk.h>
  31. #include <linux/io.h>
  32. enum sh_mobile_i2c_op {
  33. OP_START = 0,
  34. OP_TX_ONLY,
  35. OP_TX_STOP,
  36. OP_TX_TO_RX,
  37. OP_RX_ONLY,
  38. OP_RX_STOP,
  39. };
  40. struct sh_mobile_i2c_data {
  41. struct device *dev;
  42. void __iomem *reg;
  43. struct i2c_adapter adap;
  44. struct clk *clk;
  45. u_int8_t iccl;
  46. u_int8_t icch;
  47. spinlock_t lock;
  48. wait_queue_head_t wait;
  49. struct i2c_msg *msg;
  50. int pos;
  51. int sr;
  52. };
  53. #define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
  54. /* Register offsets */
  55. #define ICDR(pd) (pd->reg + 0x00)
  56. #define ICCR(pd) (pd->reg + 0x04)
  57. #define ICSR(pd) (pd->reg + 0x08)
  58. #define ICIC(pd) (pd->reg + 0x0c)
  59. #define ICCL(pd) (pd->reg + 0x10)
  60. #define ICCH(pd) (pd->reg + 0x14)
  61. /* Register bits */
  62. #define ICCR_ICE 0x80
  63. #define ICCR_RACK 0x40
  64. #define ICCR_TRS 0x10
  65. #define ICCR_BBSY 0x04
  66. #define ICCR_SCP 0x01
  67. #define ICSR_SCLM 0x80
  68. #define ICSR_SDAM 0x40
  69. #define SW_DONE 0x20
  70. #define ICSR_BUSY 0x10
  71. #define ICSR_AL 0x08
  72. #define ICSR_TACK 0x04
  73. #define ICSR_WAIT 0x02
  74. #define ICSR_DTE 0x01
  75. #define ICIC_ALE 0x08
  76. #define ICIC_TACKE 0x04
  77. #define ICIC_WAITE 0x02
  78. #define ICIC_DTEE 0x01
  79. static void activate_ch(struct sh_mobile_i2c_data *pd)
  80. {
  81. /* Make sure the clock is enabled */
  82. clk_enable(pd->clk);
  83. /* Enable channel and configure rx ack */
  84. iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
  85. /* Mask all interrupts */
  86. iowrite8(0, ICIC(pd));
  87. /* Set the clock */
  88. iowrite8(pd->iccl, ICCL(pd));
  89. iowrite8(pd->icch, ICCH(pd));
  90. }
  91. static void deactivate_ch(struct sh_mobile_i2c_data *pd)
  92. {
  93. /* Clear/disable interrupts */
  94. iowrite8(0, ICSR(pd));
  95. iowrite8(0, ICIC(pd));
  96. /* Disable channel */
  97. iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
  98. /* Disable clock */
  99. clk_disable(pd->clk);
  100. }
  101. static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
  102. enum sh_mobile_i2c_op op, unsigned char data)
  103. {
  104. unsigned char ret = 0;
  105. unsigned long flags;
  106. dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
  107. spin_lock_irqsave(&pd->lock, flags);
  108. switch (op) {
  109. case OP_START:
  110. iowrite8(0x94, ICCR(pd));
  111. break;
  112. case OP_TX_ONLY:
  113. iowrite8(data, ICDR(pd));
  114. break;
  115. case OP_TX_STOP:
  116. iowrite8(data, ICDR(pd));
  117. iowrite8(0x90, ICCR(pd));
  118. iowrite8(ICIC_ALE | ICIC_TACKE, ICIC(pd));
  119. break;
  120. case OP_TX_TO_RX:
  121. iowrite8(data, ICDR(pd));
  122. iowrite8(0x81, ICCR(pd));
  123. break;
  124. case OP_RX_ONLY:
  125. ret = ioread8(ICDR(pd));
  126. break;
  127. case OP_RX_STOP:
  128. ret = ioread8(ICDR(pd));
  129. iowrite8(0xc0, ICCR(pd));
  130. break;
  131. }
  132. spin_unlock_irqrestore(&pd->lock, flags);
  133. dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
  134. return ret;
  135. }
  136. static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
  137. {
  138. struct platform_device *dev = dev_id;
  139. struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
  140. struct i2c_msg *msg = pd->msg;
  141. unsigned char data, sr;
  142. int wakeup = 0;
  143. sr = ioread8(ICSR(pd));
  144. pd->sr |= sr;
  145. dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
  146. (msg->flags & I2C_M_RD) ? "read" : "write",
  147. pd->pos, msg->len);
  148. if (sr & (ICSR_AL | ICSR_TACK)) {
  149. iowrite8(0, ICIC(pd)); /* disable interrupts */
  150. wakeup = 1;
  151. goto do_wakeup;
  152. }
  153. if (pd->pos == msg->len) {
  154. i2c_op(pd, OP_RX_ONLY, 0);
  155. wakeup = 1;
  156. goto do_wakeup;
  157. }
  158. if (pd->pos == -1) {
  159. data = (msg->addr & 0x7f) << 1;
  160. data |= (msg->flags & I2C_M_RD) ? 1 : 0;
  161. } else
  162. data = msg->buf[pd->pos];
  163. if ((pd->pos == -1) || !(msg->flags & I2C_M_RD)) {
  164. if (msg->flags & I2C_M_RD)
  165. i2c_op(pd, OP_TX_TO_RX, data);
  166. else if (pd->pos == (msg->len - 1)) {
  167. i2c_op(pd, OP_TX_STOP, data);
  168. wakeup = 1;
  169. } else
  170. i2c_op(pd, OP_TX_ONLY, data);
  171. } else {
  172. if (pd->pos == (msg->len - 1))
  173. data = i2c_op(pd, OP_RX_STOP, 0);
  174. else
  175. data = i2c_op(pd, OP_RX_ONLY, 0);
  176. msg->buf[pd->pos] = data;
  177. }
  178. pd->pos++;
  179. do_wakeup:
  180. if (wakeup) {
  181. pd->sr |= SW_DONE;
  182. wake_up(&pd->wait);
  183. }
  184. return IRQ_HANDLED;
  185. }
  186. static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
  187. {
  188. /* Initialize channel registers */
  189. iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
  190. /* Enable channel and configure rx ack */
  191. iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
  192. /* Set the clock */
  193. iowrite8(pd->iccl, ICCL(pd));
  194. iowrite8(pd->icch, ICCH(pd));
  195. pd->msg = usr_msg;
  196. pd->pos = -1;
  197. pd->sr = 0;
  198. /* Enable all interrupts except wait */
  199. iowrite8(ioread8(ICIC(pd)) | ICIC_ALE | ICIC_TACKE | ICIC_DTEE,
  200. ICIC(pd));
  201. return 0;
  202. }
  203. static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
  204. struct i2c_msg *msgs,
  205. int num)
  206. {
  207. struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
  208. struct i2c_msg *msg;
  209. int err = 0;
  210. u_int8_t val;
  211. int i, k, retry_count;
  212. activate_ch(pd);
  213. /* Process all messages */
  214. for (i = 0; i < num; i++) {
  215. msg = &msgs[i];
  216. err = start_ch(pd, msg);
  217. if (err)
  218. break;
  219. i2c_op(pd, OP_START, 0);
  220. /* The interrupt handler takes care of the rest... */
  221. k = wait_event_timeout(pd->wait,
  222. pd->sr & (ICSR_TACK | SW_DONE),
  223. 5 * HZ);
  224. if (!k)
  225. dev_err(pd->dev, "Transfer request timed out\n");
  226. retry_count = 10;
  227. again:
  228. val = ioread8(ICSR(pd));
  229. dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
  230. if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
  231. err = -EIO;
  232. break;
  233. }
  234. /* the interrupt handler may wake us up before the
  235. * transfer is finished, so poll the hardware
  236. * until we're done.
  237. */
  238. if (!(!(val & ICSR_BUSY) && (val & ICSR_SCLM) &&
  239. (val & ICSR_SDAM))) {
  240. msleep(1);
  241. if (retry_count--)
  242. goto again;
  243. err = -EIO;
  244. dev_err(pd->dev, "Polling timed out\n");
  245. break;
  246. }
  247. }
  248. deactivate_ch(pd);
  249. if (!err)
  250. err = num;
  251. return err;
  252. }
  253. static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
  254. {
  255. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  256. }
  257. static struct i2c_algorithm sh_mobile_i2c_algorithm = {
  258. .functionality = sh_mobile_i2c_func,
  259. .master_xfer = sh_mobile_i2c_xfer,
  260. };
  261. static void sh_mobile_i2c_setup_channel(struct platform_device *dev)
  262. {
  263. struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
  264. unsigned long peripheral_clk = clk_get_rate(pd->clk);
  265. u_int32_t num;
  266. u_int32_t denom;
  267. u_int32_t tmp;
  268. spin_lock_init(&pd->lock);
  269. init_waitqueue_head(&pd->wait);
  270. /* Calculate the value for iccl. From the data sheet:
  271. * iccl = (p clock / transfer rate) * (L / (L + H))
  272. * where L and H are the SCL low/high ratio (5/4 in this case).
  273. * We also round off the result.
  274. */
  275. num = peripheral_clk * 5;
  276. denom = NORMAL_SPEED * 9;
  277. tmp = num * 10 / denom;
  278. if (tmp % 10 >= 5)
  279. pd->iccl = (u_int8_t)((num/denom) + 1);
  280. else
  281. pd->iccl = (u_int8_t)(num/denom);
  282. /* Calculate the value for icch. From the data sheet:
  283. icch = (p clock / transfer rate) * (H / (L + H)) */
  284. num = peripheral_clk * 4;
  285. tmp = num * 10 / denom;
  286. if (tmp % 10 >= 5)
  287. pd->icch = (u_int8_t)((num/denom) + 1);
  288. else
  289. pd->icch = (u_int8_t)(num/denom);
  290. }
  291. static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
  292. {
  293. struct resource *res;
  294. int ret = -ENXIO;
  295. int q, m;
  296. int k = 0;
  297. int n = 0;
  298. while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
  299. for (n = res->start; hook && n <= res->end; n++) {
  300. if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
  301. dev->dev.bus_id, dev))
  302. goto rollback;
  303. }
  304. k++;
  305. }
  306. if (hook)
  307. return k > 0 ? 0 : -ENOENT;
  308. k--;
  309. ret = 0;
  310. rollback:
  311. for (q = k; k >= 0; k--) {
  312. for (m = n; m >= res->start; m--)
  313. free_irq(m, dev);
  314. res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1);
  315. m = res->end;
  316. }
  317. return ret;
  318. }
  319. static int sh_mobile_i2c_probe(struct platform_device *dev)
  320. {
  321. struct sh_mobile_i2c_data *pd;
  322. struct i2c_adapter *adap;
  323. struct resource *res;
  324. int size;
  325. int ret;
  326. pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
  327. if (pd == NULL) {
  328. dev_err(&dev->dev, "cannot allocate private data\n");
  329. return -ENOMEM;
  330. }
  331. pd->clk = clk_get(&dev->dev, "peripheral_clk");
  332. if (IS_ERR(pd->clk)) {
  333. dev_err(&dev->dev, "cannot get peripheral clock\n");
  334. ret = PTR_ERR(pd->clk);
  335. goto err;
  336. }
  337. ret = sh_mobile_i2c_hook_irqs(dev, 1);
  338. if (ret) {
  339. dev_err(&dev->dev, "cannot request IRQ\n");
  340. goto err_clk;
  341. }
  342. pd->dev = &dev->dev;
  343. platform_set_drvdata(dev, pd);
  344. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  345. if (res == NULL) {
  346. dev_err(&dev->dev, "cannot find IO resource\n");
  347. ret = -ENOENT;
  348. goto err_irq;
  349. }
  350. size = (res->end - res->start) + 1;
  351. pd->reg = ioremap(res->start, size);
  352. if (pd->reg == NULL) {
  353. dev_err(&dev->dev, "cannot map IO\n");
  354. ret = -ENXIO;
  355. goto err_irq;
  356. }
  357. /* setup the private data */
  358. adap = &pd->adap;
  359. i2c_set_adapdata(adap, pd);
  360. adap->owner = THIS_MODULE;
  361. adap->algo = &sh_mobile_i2c_algorithm;
  362. adap->dev.parent = &dev->dev;
  363. adap->retries = 5;
  364. adap->nr = dev->id;
  365. strlcpy(adap->name, dev->name, sizeof(adap->name));
  366. sh_mobile_i2c_setup_channel(dev);
  367. ret = i2c_add_numbered_adapter(adap);
  368. if (ret < 0) {
  369. dev_err(&dev->dev, "cannot add numbered adapter\n");
  370. goto err_all;
  371. }
  372. return 0;
  373. err_all:
  374. iounmap(pd->reg);
  375. err_irq:
  376. sh_mobile_i2c_hook_irqs(dev, 0);
  377. err_clk:
  378. clk_put(pd->clk);
  379. err:
  380. kfree(pd);
  381. return ret;
  382. }
  383. static int sh_mobile_i2c_remove(struct platform_device *dev)
  384. {
  385. struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
  386. i2c_del_adapter(&pd->adap);
  387. iounmap(pd->reg);
  388. sh_mobile_i2c_hook_irqs(dev, 0);
  389. clk_put(pd->clk);
  390. kfree(pd);
  391. return 0;
  392. }
  393. static struct platform_driver sh_mobile_i2c_driver = {
  394. .driver = {
  395. .name = "i2c-sh_mobile",
  396. .owner = THIS_MODULE,
  397. },
  398. .probe = sh_mobile_i2c_probe,
  399. .remove = sh_mobile_i2c_remove,
  400. };
  401. static int __init sh_mobile_i2c_adap_init(void)
  402. {
  403. return platform_driver_register(&sh_mobile_i2c_driver);
  404. }
  405. static void __exit sh_mobile_i2c_adap_exit(void)
  406. {
  407. platform_driver_unregister(&sh_mobile_i2c_driver);
  408. }
  409. module_init(sh_mobile_i2c_adap_init);
  410. module_exit(sh_mobile_i2c_adap_exit);
  411. MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
  412. MODULE_AUTHOR("Magnus Damm");
  413. MODULE_LICENSE("GPL v2");