synclink_cs.c 115 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/slab.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/vmalloc.h>
  54. #include <linux/init.h>
  55. #include <linux/delay.h>
  56. #include <linux/ioctl.h>
  57. #include <linux/synclink.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  73. #define SYNCLINK_GENERIC_HDLC 1
  74. #else
  75. #define SYNCLINK_GENERIC_HDLC 0
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int flags;
  126. int count; /* count of opens */
  127. int line;
  128. unsigned short close_delay;
  129. unsigned short closing_wait; /* time to wait before closing */
  130. struct mgsl_icount icount;
  131. struct tty_struct *tty;
  132. int timeout;
  133. int x_char; /* xon/xoff character */
  134. int blocked_open; /* # of blocked opens */
  135. unsigned char read_status_mask;
  136. unsigned char ignore_status_mask;
  137. unsigned char *tx_buf;
  138. int tx_put;
  139. int tx_get;
  140. int tx_count;
  141. /* circular list of fixed length rx buffers */
  142. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  143. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  144. int rx_put; /* index of next empty rx buffer */
  145. int rx_get; /* index of next full rx buffer */
  146. int rx_buf_size; /* size in bytes of single rx buffer */
  147. int rx_buf_count; /* total number of rx buffers */
  148. int rx_frame_count; /* number of full rx buffers */
  149. wait_queue_head_t open_wait;
  150. wait_queue_head_t close_wait;
  151. wait_queue_head_t status_event_wait_q;
  152. wait_queue_head_t event_wait_q;
  153. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  154. struct _mgslpc_info *next_device; /* device list link */
  155. unsigned short imra_value;
  156. unsigned short imrb_value;
  157. unsigned char pim_value;
  158. spinlock_t lock;
  159. struct work_struct task; /* task structure for scheduling bh */
  160. u32 max_frame_size;
  161. u32 pending_bh;
  162. bool bh_running;
  163. bool bh_requested;
  164. int dcd_chkcount; /* check counts to prevent */
  165. int cts_chkcount; /* too many IRQs if a signal */
  166. int dsr_chkcount; /* is floating */
  167. int ri_chkcount;
  168. bool rx_enabled;
  169. bool rx_overflow;
  170. bool tx_enabled;
  171. bool tx_active;
  172. bool tx_aborting;
  173. u32 idle_mode;
  174. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  175. char device_name[25]; /* device instance name */
  176. unsigned int io_base; /* base I/O address of adapter */
  177. unsigned int irq_level;
  178. MGSL_PARAMS params; /* communications parameters */
  179. unsigned char serial_signals; /* current serial signal states */
  180. bool irq_occurred; /* for diagnostics use */
  181. char testing_irq;
  182. unsigned int init_error; /* startup error (DIAGS) */
  183. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  184. bool drop_rts_on_tx_done;
  185. struct _input_signal_events input_signal_events;
  186. /* PCMCIA support */
  187. struct pcmcia_device *p_dev;
  188. dev_node_t node;
  189. int stop;
  190. /* SPPP/Cisco HDLC device parts */
  191. int netcount;
  192. int dosyncppp;
  193. spinlock_t netlock;
  194. #if SYNCLINK_GENERIC_HDLC
  195. struct net_device *netdev;
  196. #endif
  197. } MGSLPC_INFO;
  198. #define MGSLPC_MAGIC 0x5402
  199. /*
  200. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  201. */
  202. #define TXBUFSIZE 4096
  203. #define CHA 0x00 /* channel A offset */
  204. #define CHB 0x40 /* channel B offset */
  205. /*
  206. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  207. */
  208. #undef PVR
  209. #define RXFIFO 0
  210. #define TXFIFO 0
  211. #define STAR 0x20
  212. #define CMDR 0x20
  213. #define RSTA 0x21
  214. #define PRE 0x21
  215. #define MODE 0x22
  216. #define TIMR 0x23
  217. #define XAD1 0x24
  218. #define XAD2 0x25
  219. #define RAH1 0x26
  220. #define RAH2 0x27
  221. #define DAFO 0x27
  222. #define RAL1 0x28
  223. #define RFC 0x28
  224. #define RHCR 0x29
  225. #define RAL2 0x29
  226. #define RBCL 0x2a
  227. #define XBCL 0x2a
  228. #define RBCH 0x2b
  229. #define XBCH 0x2b
  230. #define CCR0 0x2c
  231. #define CCR1 0x2d
  232. #define CCR2 0x2e
  233. #define CCR3 0x2f
  234. #define VSTR 0x34
  235. #define BGR 0x34
  236. #define RLCR 0x35
  237. #define AML 0x36
  238. #define AMH 0x37
  239. #define GIS 0x38
  240. #define IVA 0x38
  241. #define IPC 0x39
  242. #define ISR 0x3a
  243. #define IMR 0x3a
  244. #define PVR 0x3c
  245. #define PIS 0x3d
  246. #define PIM 0x3d
  247. #define PCR 0x3e
  248. #define CCR4 0x3f
  249. // IMR/ISR
  250. #define IRQ_BREAK_ON BIT15 // rx break detected
  251. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  252. #define IRQ_ALLSENT BIT13 // all sent
  253. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  254. #define IRQ_TIMER BIT11 // timer interrupt
  255. #define IRQ_CTS BIT10 // CTS status change
  256. #define IRQ_TXREPEAT BIT9 // tx message repeat
  257. #define IRQ_TXFIFO BIT8 // transmit pool ready
  258. #define IRQ_RXEOM BIT7 // receive message end
  259. #define IRQ_EXITHUNT BIT6 // receive frame start
  260. #define IRQ_RXTIME BIT6 // rx char timeout
  261. #define IRQ_DCD BIT2 // carrier detect status change
  262. #define IRQ_OVERRUN BIT1 // receive frame overflow
  263. #define IRQ_RXFIFO BIT0 // receive pool full
  264. // STAR
  265. #define XFW BIT6 // transmit FIFO write enable
  266. #define CEC BIT2 // command executing
  267. #define CTS BIT1 // CTS state
  268. #define PVR_DTR BIT0
  269. #define PVR_DSR BIT1
  270. #define PVR_RI BIT2
  271. #define PVR_AUTOCTS BIT3
  272. #define PVR_RS232 0x20 /* 0010b */
  273. #define PVR_V35 0xe0 /* 1110b */
  274. #define PVR_RS422 0x40 /* 0100b */
  275. /* Register access functions */
  276. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  277. #define read_reg(info, reg) inb((info)->io_base + (reg))
  278. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  279. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  280. #define set_reg_bits(info, reg, mask) \
  281. write_reg(info, (reg), \
  282. (unsigned char) (read_reg(info, (reg)) | (mask)))
  283. #define clear_reg_bits(info, reg, mask) \
  284. write_reg(info, (reg), \
  285. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  286. /*
  287. * interrupt enable/disable routines
  288. */
  289. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  290. {
  291. if (channel == CHA) {
  292. info->imra_value |= mask;
  293. write_reg16(info, CHA + IMR, info->imra_value);
  294. } else {
  295. info->imrb_value |= mask;
  296. write_reg16(info, CHB + IMR, info->imrb_value);
  297. }
  298. }
  299. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  300. {
  301. if (channel == CHA) {
  302. info->imra_value &= ~mask;
  303. write_reg16(info, CHA + IMR, info->imra_value);
  304. } else {
  305. info->imrb_value &= ~mask;
  306. write_reg16(info, CHB + IMR, info->imrb_value);
  307. }
  308. }
  309. #define port_irq_disable(info, mask) \
  310. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  311. #define port_irq_enable(info, mask) \
  312. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  313. static void rx_start(MGSLPC_INFO *info);
  314. static void rx_stop(MGSLPC_INFO *info);
  315. static void tx_start(MGSLPC_INFO *info);
  316. static void tx_stop(MGSLPC_INFO *info);
  317. static void tx_set_idle(MGSLPC_INFO *info);
  318. static void get_signals(MGSLPC_INFO *info);
  319. static void set_signals(MGSLPC_INFO *info);
  320. static void reset_device(MGSLPC_INFO *info);
  321. static void hdlc_mode(MGSLPC_INFO *info);
  322. static void async_mode(MGSLPC_INFO *info);
  323. static void tx_timeout(unsigned long context);
  324. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  325. #if SYNCLINK_GENERIC_HDLC
  326. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  327. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  328. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  329. static int hdlcdev_init(MGSLPC_INFO *info);
  330. static void hdlcdev_exit(MGSLPC_INFO *info);
  331. #endif
  332. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  333. static bool register_test(MGSLPC_INFO *info);
  334. static bool irq_test(MGSLPC_INFO *info);
  335. static int adapter_test(MGSLPC_INFO *info);
  336. static int claim_resources(MGSLPC_INFO *info);
  337. static void release_resources(MGSLPC_INFO *info);
  338. static void mgslpc_add_device(MGSLPC_INFO *info);
  339. static void mgslpc_remove_device(MGSLPC_INFO *info);
  340. static bool rx_get_frame(MGSLPC_INFO *info);
  341. static void rx_reset_buffers(MGSLPC_INFO *info);
  342. static int rx_alloc_buffers(MGSLPC_INFO *info);
  343. static void rx_free_buffers(MGSLPC_INFO *info);
  344. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  345. /*
  346. * Bottom half interrupt handlers
  347. */
  348. static void bh_handler(struct work_struct *work);
  349. static void bh_transmit(MGSLPC_INFO *info);
  350. static void bh_status(MGSLPC_INFO *info);
  351. /*
  352. * ioctl handlers
  353. */
  354. static int tiocmget(struct tty_struct *tty, struct file *file);
  355. static int tiocmset(struct tty_struct *tty, struct file *file,
  356. unsigned int set, unsigned int clear);
  357. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  358. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  359. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  360. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  361. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  362. static int set_txenable(MGSLPC_INFO *info, int enable);
  363. static int tx_abort(MGSLPC_INFO *info);
  364. static int set_rxenable(MGSLPC_INFO *info, int enable);
  365. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  366. static MGSLPC_INFO *mgslpc_device_list = NULL;
  367. static int mgslpc_device_count = 0;
  368. /*
  369. * Set this param to non-zero to load eax with the
  370. * .text section address and breakpoint on module load.
  371. * This is useful for use with gdb and add-symbol-file command.
  372. */
  373. static int break_on_load=0;
  374. /*
  375. * Driver major number, defaults to zero to get auto
  376. * assigned major number. May be forced as module parameter.
  377. */
  378. static int ttymajor=0;
  379. static int debug_level = 0;
  380. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  381. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  382. module_param(break_on_load, bool, 0);
  383. module_param(ttymajor, int, 0);
  384. module_param(debug_level, int, 0);
  385. module_param_array(maxframe, int, NULL, 0);
  386. module_param_array(dosyncppp, int, NULL, 0);
  387. MODULE_LICENSE("GPL");
  388. static char *driver_name = "SyncLink PC Card driver";
  389. static char *driver_version = "$Revision: 4.34 $";
  390. static struct tty_driver *serial_driver;
  391. /* number of characters left in xmit buffer before we ask for more */
  392. #define WAKEUP_CHARS 256
  393. static void mgslpc_change_params(MGSLPC_INFO *info);
  394. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  395. /* PCMCIA prototypes */
  396. static int mgslpc_config(struct pcmcia_device *link);
  397. static void mgslpc_release(u_long arg);
  398. static void mgslpc_detach(struct pcmcia_device *p_dev);
  399. /*
  400. * 1st function defined in .text section. Calling this function in
  401. * init_module() followed by a breakpoint allows a remote debugger
  402. * (gdb) to get the .text address for the add-symbol-file command.
  403. * This allows remote debugging of dynamically loadable modules.
  404. */
  405. static void* mgslpc_get_text_ptr(void)
  406. {
  407. return mgslpc_get_text_ptr;
  408. }
  409. /**
  410. * line discipline callback wrappers
  411. *
  412. * The wrappers maintain line discipline references
  413. * while calling into the line discipline.
  414. *
  415. * ldisc_receive_buf - pass receive data to line discipline
  416. */
  417. static void ldisc_receive_buf(struct tty_struct *tty,
  418. const __u8 *data, char *flags, int count)
  419. {
  420. struct tty_ldisc *ld;
  421. if (!tty)
  422. return;
  423. ld = tty_ldisc_ref(tty);
  424. if (ld) {
  425. if (ld->receive_buf)
  426. ld->receive_buf(tty, data, flags, count);
  427. tty_ldisc_deref(ld);
  428. }
  429. }
  430. static int mgslpc_probe(struct pcmcia_device *link)
  431. {
  432. MGSLPC_INFO *info;
  433. int ret;
  434. if (debug_level >= DEBUG_LEVEL_INFO)
  435. printk("mgslpc_attach\n");
  436. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  437. if (!info) {
  438. printk("Error can't allocate device instance data\n");
  439. return -ENOMEM;
  440. }
  441. info->magic = MGSLPC_MAGIC;
  442. INIT_WORK(&info->task, bh_handler);
  443. info->max_frame_size = 4096;
  444. info->close_delay = 5*HZ/10;
  445. info->closing_wait = 30*HZ;
  446. init_waitqueue_head(&info->open_wait);
  447. init_waitqueue_head(&info->close_wait);
  448. init_waitqueue_head(&info->status_event_wait_q);
  449. init_waitqueue_head(&info->event_wait_q);
  450. spin_lock_init(&info->lock);
  451. spin_lock_init(&info->netlock);
  452. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  453. info->idle_mode = HDLC_TXIDLE_FLAGS;
  454. info->imra_value = 0xffff;
  455. info->imrb_value = 0xffff;
  456. info->pim_value = 0xff;
  457. info->p_dev = link;
  458. link->priv = info;
  459. /* Initialize the struct pcmcia_device structure */
  460. /* Interrupt setup */
  461. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  462. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  463. link->irq.Handler = NULL;
  464. link->conf.Attributes = 0;
  465. link->conf.IntType = INT_MEMORY_AND_IO;
  466. ret = mgslpc_config(link);
  467. if (ret)
  468. return ret;
  469. mgslpc_add_device(info);
  470. return 0;
  471. }
  472. /* Card has been inserted.
  473. */
  474. #define CS_CHECK(fn, ret) \
  475. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  476. static int mgslpc_config(struct pcmcia_device *link)
  477. {
  478. MGSLPC_INFO *info = link->priv;
  479. tuple_t tuple;
  480. cisparse_t parse;
  481. int last_fn, last_ret;
  482. u_char buf[64];
  483. cistpl_cftable_entry_t dflt = { 0 };
  484. cistpl_cftable_entry_t *cfg;
  485. if (debug_level >= DEBUG_LEVEL_INFO)
  486. printk("mgslpc_config(0x%p)\n", link);
  487. tuple.Attributes = 0;
  488. tuple.TupleData = buf;
  489. tuple.TupleDataMax = sizeof(buf);
  490. tuple.TupleOffset = 0;
  491. /* get CIS configuration entry */
  492. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  493. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  494. cfg = &(parse.cftable_entry);
  495. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  496. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  497. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  498. if (cfg->index == 0)
  499. goto cs_failed;
  500. link->conf.ConfigIndex = cfg->index;
  501. link->conf.Attributes |= CONF_ENABLE_IRQ;
  502. /* IO window settings */
  503. link->io.NumPorts1 = 0;
  504. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  505. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  506. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  507. if (!(io->flags & CISTPL_IO_8BIT))
  508. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  509. if (!(io->flags & CISTPL_IO_16BIT))
  510. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  511. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  512. link->io.BasePort1 = io->win[0].base;
  513. link->io.NumPorts1 = io->win[0].len;
  514. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  515. }
  516. link->conf.Attributes = CONF_ENABLE_IRQ;
  517. link->conf.IntType = INT_MEMORY_AND_IO;
  518. link->conf.ConfigIndex = 8;
  519. link->conf.Present = PRESENT_OPTION;
  520. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  521. link->irq.Handler = mgslpc_isr;
  522. link->irq.Instance = info;
  523. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  524. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  525. info->io_base = link->io.BasePort1;
  526. info->irq_level = link->irq.AssignedIRQ;
  527. /* add to linked list of devices */
  528. sprintf(info->node.dev_name, "mgslpc0");
  529. info->node.major = info->node.minor = 0;
  530. link->dev_node = &info->node;
  531. printk(KERN_INFO "%s: index 0x%02x:",
  532. info->node.dev_name, link->conf.ConfigIndex);
  533. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  534. printk(", irq %d", link->irq.AssignedIRQ);
  535. if (link->io.NumPorts1)
  536. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  537. link->io.BasePort1+link->io.NumPorts1-1);
  538. printk("\n");
  539. return 0;
  540. cs_failed:
  541. cs_error(link, last_fn, last_ret);
  542. mgslpc_release((u_long)link);
  543. return -ENODEV;
  544. }
  545. /* Card has been removed.
  546. * Unregister device and release PCMCIA configuration.
  547. * If device is open, postpone until it is closed.
  548. */
  549. static void mgslpc_release(u_long arg)
  550. {
  551. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  552. if (debug_level >= DEBUG_LEVEL_INFO)
  553. printk("mgslpc_release(0x%p)\n", link);
  554. pcmcia_disable_device(link);
  555. }
  556. static void mgslpc_detach(struct pcmcia_device *link)
  557. {
  558. if (debug_level >= DEBUG_LEVEL_INFO)
  559. printk("mgslpc_detach(0x%p)\n", link);
  560. ((MGSLPC_INFO *)link->priv)->stop = 1;
  561. mgslpc_release((u_long)link);
  562. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  563. }
  564. static int mgslpc_suspend(struct pcmcia_device *link)
  565. {
  566. MGSLPC_INFO *info = link->priv;
  567. info->stop = 1;
  568. return 0;
  569. }
  570. static int mgslpc_resume(struct pcmcia_device *link)
  571. {
  572. MGSLPC_INFO *info = link->priv;
  573. info->stop = 0;
  574. return 0;
  575. }
  576. static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
  577. char *name, const char *routine)
  578. {
  579. #ifdef MGSLPC_PARANOIA_CHECK
  580. static const char *badmagic =
  581. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  582. static const char *badinfo =
  583. "Warning: null mgslpc_info for (%s) in %s\n";
  584. if (!info) {
  585. printk(badinfo, name, routine);
  586. return true;
  587. }
  588. if (info->magic != MGSLPC_MAGIC) {
  589. printk(badmagic, name, routine);
  590. return true;
  591. }
  592. #else
  593. if (!info)
  594. return true;
  595. #endif
  596. return false;
  597. }
  598. #define CMD_RXFIFO BIT7 // release current rx FIFO
  599. #define CMD_RXRESET BIT6 // receiver reset
  600. #define CMD_RXFIFO_READ BIT5
  601. #define CMD_START_TIMER BIT4
  602. #define CMD_TXFIFO BIT3 // release current tx FIFO
  603. #define CMD_TXEOM BIT1 // transmit end message
  604. #define CMD_TXRESET BIT0 // transmit reset
  605. static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  606. {
  607. int i = 0;
  608. /* wait for command completion */
  609. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  610. udelay(1);
  611. if (i++ == 1000)
  612. return false;
  613. }
  614. return true;
  615. }
  616. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  617. {
  618. wait_command_complete(info, channel);
  619. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  620. }
  621. static void tx_pause(struct tty_struct *tty)
  622. {
  623. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  624. unsigned long flags;
  625. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  626. return;
  627. if (debug_level >= DEBUG_LEVEL_INFO)
  628. printk("tx_pause(%s)\n",info->device_name);
  629. spin_lock_irqsave(&info->lock,flags);
  630. if (info->tx_enabled)
  631. tx_stop(info);
  632. spin_unlock_irqrestore(&info->lock,flags);
  633. }
  634. static void tx_release(struct tty_struct *tty)
  635. {
  636. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  637. unsigned long flags;
  638. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  639. return;
  640. if (debug_level >= DEBUG_LEVEL_INFO)
  641. printk("tx_release(%s)\n",info->device_name);
  642. spin_lock_irqsave(&info->lock,flags);
  643. if (!info->tx_enabled)
  644. tx_start(info);
  645. spin_unlock_irqrestore(&info->lock,flags);
  646. }
  647. /* Return next bottom half action to perform.
  648. * or 0 if nothing to do.
  649. */
  650. static int bh_action(MGSLPC_INFO *info)
  651. {
  652. unsigned long flags;
  653. int rc = 0;
  654. spin_lock_irqsave(&info->lock,flags);
  655. if (info->pending_bh & BH_RECEIVE) {
  656. info->pending_bh &= ~BH_RECEIVE;
  657. rc = BH_RECEIVE;
  658. } else if (info->pending_bh & BH_TRANSMIT) {
  659. info->pending_bh &= ~BH_TRANSMIT;
  660. rc = BH_TRANSMIT;
  661. } else if (info->pending_bh & BH_STATUS) {
  662. info->pending_bh &= ~BH_STATUS;
  663. rc = BH_STATUS;
  664. }
  665. if (!rc) {
  666. /* Mark BH routine as complete */
  667. info->bh_running = false;
  668. info->bh_requested = false;
  669. }
  670. spin_unlock_irqrestore(&info->lock,flags);
  671. return rc;
  672. }
  673. static void bh_handler(struct work_struct *work)
  674. {
  675. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  676. int action;
  677. if (!info)
  678. return;
  679. if (debug_level >= DEBUG_LEVEL_BH)
  680. printk( "%s(%d):bh_handler(%s) entry\n",
  681. __FILE__,__LINE__,info->device_name);
  682. info->bh_running = true;
  683. while((action = bh_action(info)) != 0) {
  684. /* Process work item */
  685. if ( debug_level >= DEBUG_LEVEL_BH )
  686. printk( "%s(%d):bh_handler() work item action=%d\n",
  687. __FILE__,__LINE__,action);
  688. switch (action) {
  689. case BH_RECEIVE:
  690. while(rx_get_frame(info));
  691. break;
  692. case BH_TRANSMIT:
  693. bh_transmit(info);
  694. break;
  695. case BH_STATUS:
  696. bh_status(info);
  697. break;
  698. default:
  699. /* unknown work item ID */
  700. printk("Unknown work item ID=%08X!\n", action);
  701. break;
  702. }
  703. }
  704. if (debug_level >= DEBUG_LEVEL_BH)
  705. printk( "%s(%d):bh_handler(%s) exit\n",
  706. __FILE__,__LINE__,info->device_name);
  707. }
  708. static void bh_transmit(MGSLPC_INFO *info)
  709. {
  710. struct tty_struct *tty = info->tty;
  711. if (debug_level >= DEBUG_LEVEL_BH)
  712. printk("bh_transmit() entry on %s\n", info->device_name);
  713. if (tty)
  714. tty_wakeup(tty);
  715. }
  716. static void bh_status(MGSLPC_INFO *info)
  717. {
  718. info->ri_chkcount = 0;
  719. info->dsr_chkcount = 0;
  720. info->dcd_chkcount = 0;
  721. info->cts_chkcount = 0;
  722. }
  723. /* eom: non-zero = end of frame */
  724. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  725. {
  726. unsigned char data[2];
  727. unsigned char fifo_count, read_count, i;
  728. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  729. if (debug_level >= DEBUG_LEVEL_ISR)
  730. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  731. if (!info->rx_enabled)
  732. return;
  733. if (info->rx_frame_count >= info->rx_buf_count) {
  734. /* no more free buffers */
  735. issue_command(info, CHA, CMD_RXRESET);
  736. info->pending_bh |= BH_RECEIVE;
  737. info->rx_overflow = true;
  738. info->icount.buf_overrun++;
  739. return;
  740. }
  741. if (eom) {
  742. /* end of frame, get FIFO count from RBCL register */
  743. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  744. fifo_count = 32;
  745. } else
  746. fifo_count = 32;
  747. do {
  748. if (fifo_count == 1) {
  749. read_count = 1;
  750. data[0] = read_reg(info, CHA + RXFIFO);
  751. } else {
  752. read_count = 2;
  753. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  754. }
  755. fifo_count -= read_count;
  756. if (!fifo_count && eom)
  757. buf->status = data[--read_count];
  758. for (i = 0; i < read_count; i++) {
  759. if (buf->count >= info->max_frame_size) {
  760. /* frame too large, reset receiver and reset current buffer */
  761. issue_command(info, CHA, CMD_RXRESET);
  762. buf->count = 0;
  763. return;
  764. }
  765. *(buf->data + buf->count) = data[i];
  766. buf->count++;
  767. }
  768. } while (fifo_count);
  769. if (eom) {
  770. info->pending_bh |= BH_RECEIVE;
  771. info->rx_frame_count++;
  772. info->rx_put++;
  773. if (info->rx_put >= info->rx_buf_count)
  774. info->rx_put = 0;
  775. }
  776. issue_command(info, CHA, CMD_RXFIFO);
  777. }
  778. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  779. {
  780. unsigned char data, status, flag;
  781. int fifo_count;
  782. int work = 0;
  783. struct tty_struct *tty = info->tty;
  784. struct mgsl_icount *icount = &info->icount;
  785. if (tcd) {
  786. /* early termination, get FIFO count from RBCL register */
  787. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  788. /* Zero fifo count could mean 0 or 32 bytes available.
  789. * If BIT5 of STAR is set then at least 1 byte is available.
  790. */
  791. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  792. fifo_count = 32;
  793. } else
  794. fifo_count = 32;
  795. tty_buffer_request_room(tty, fifo_count);
  796. /* Flush received async data to receive data buffer. */
  797. while (fifo_count) {
  798. data = read_reg(info, CHA + RXFIFO);
  799. status = read_reg(info, CHA + RXFIFO);
  800. fifo_count -= 2;
  801. icount->rx++;
  802. flag = TTY_NORMAL;
  803. // if no frameing/crc error then save data
  804. // BIT7:parity error
  805. // BIT6:framing error
  806. if (status & (BIT7 + BIT6)) {
  807. if (status & BIT7)
  808. icount->parity++;
  809. else
  810. icount->frame++;
  811. /* discard char if tty control flags say so */
  812. if (status & info->ignore_status_mask)
  813. continue;
  814. status &= info->read_status_mask;
  815. if (status & BIT7)
  816. flag = TTY_PARITY;
  817. else if (status & BIT6)
  818. flag = TTY_FRAME;
  819. }
  820. work += tty_insert_flip_char(tty, data, flag);
  821. }
  822. issue_command(info, CHA, CMD_RXFIFO);
  823. if (debug_level >= DEBUG_LEVEL_ISR) {
  824. printk("%s(%d):rx_ready_async",
  825. __FILE__,__LINE__);
  826. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  827. __FILE__,__LINE__,icount->rx,icount->brk,
  828. icount->parity,icount->frame,icount->overrun);
  829. }
  830. if (work)
  831. tty_flip_buffer_push(tty);
  832. }
  833. static void tx_done(MGSLPC_INFO *info)
  834. {
  835. if (!info->tx_active)
  836. return;
  837. info->tx_active = false;
  838. info->tx_aborting = false;
  839. if (info->params.mode == MGSL_MODE_ASYNC)
  840. return;
  841. info->tx_count = info->tx_put = info->tx_get = 0;
  842. del_timer(&info->tx_timer);
  843. if (info->drop_rts_on_tx_done) {
  844. get_signals(info);
  845. if (info->serial_signals & SerialSignal_RTS) {
  846. info->serial_signals &= ~SerialSignal_RTS;
  847. set_signals(info);
  848. }
  849. info->drop_rts_on_tx_done = false;
  850. }
  851. #if SYNCLINK_GENERIC_HDLC
  852. if (info->netcount)
  853. hdlcdev_tx_done(info);
  854. else
  855. #endif
  856. {
  857. if (info->tty->stopped || info->tty->hw_stopped) {
  858. tx_stop(info);
  859. return;
  860. }
  861. info->pending_bh |= BH_TRANSMIT;
  862. }
  863. }
  864. static void tx_ready(MGSLPC_INFO *info)
  865. {
  866. unsigned char fifo_count = 32;
  867. int c;
  868. if (debug_level >= DEBUG_LEVEL_ISR)
  869. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  870. if (info->params.mode == MGSL_MODE_HDLC) {
  871. if (!info->tx_active)
  872. return;
  873. } else {
  874. if (info->tty->stopped || info->tty->hw_stopped) {
  875. tx_stop(info);
  876. return;
  877. }
  878. if (!info->tx_count)
  879. info->tx_active = false;
  880. }
  881. if (!info->tx_count)
  882. return;
  883. while (info->tx_count && fifo_count) {
  884. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  885. if (c == 1) {
  886. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  887. } else {
  888. write_reg16(info, CHA + TXFIFO,
  889. *((unsigned short*)(info->tx_buf + info->tx_get)));
  890. }
  891. info->tx_count -= c;
  892. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  893. fifo_count -= c;
  894. }
  895. if (info->params.mode == MGSL_MODE_ASYNC) {
  896. if (info->tx_count < WAKEUP_CHARS)
  897. info->pending_bh |= BH_TRANSMIT;
  898. issue_command(info, CHA, CMD_TXFIFO);
  899. } else {
  900. if (info->tx_count)
  901. issue_command(info, CHA, CMD_TXFIFO);
  902. else
  903. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  904. }
  905. }
  906. static void cts_change(MGSLPC_INFO *info)
  907. {
  908. get_signals(info);
  909. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  910. irq_disable(info, CHB, IRQ_CTS);
  911. info->icount.cts++;
  912. if (info->serial_signals & SerialSignal_CTS)
  913. info->input_signal_events.cts_up++;
  914. else
  915. info->input_signal_events.cts_down++;
  916. wake_up_interruptible(&info->status_event_wait_q);
  917. wake_up_interruptible(&info->event_wait_q);
  918. if (info->flags & ASYNC_CTS_FLOW) {
  919. if (info->tty->hw_stopped) {
  920. if (info->serial_signals & SerialSignal_CTS) {
  921. if (debug_level >= DEBUG_LEVEL_ISR)
  922. printk("CTS tx start...");
  923. if (info->tty)
  924. info->tty->hw_stopped = 0;
  925. tx_start(info);
  926. info->pending_bh |= BH_TRANSMIT;
  927. return;
  928. }
  929. } else {
  930. if (!(info->serial_signals & SerialSignal_CTS)) {
  931. if (debug_level >= DEBUG_LEVEL_ISR)
  932. printk("CTS tx stop...");
  933. if (info->tty)
  934. info->tty->hw_stopped = 1;
  935. tx_stop(info);
  936. }
  937. }
  938. }
  939. info->pending_bh |= BH_STATUS;
  940. }
  941. static void dcd_change(MGSLPC_INFO *info)
  942. {
  943. get_signals(info);
  944. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  945. irq_disable(info, CHB, IRQ_DCD);
  946. info->icount.dcd++;
  947. if (info->serial_signals & SerialSignal_DCD) {
  948. info->input_signal_events.dcd_up++;
  949. }
  950. else
  951. info->input_signal_events.dcd_down++;
  952. #if SYNCLINK_GENERIC_HDLC
  953. if (info->netcount) {
  954. if (info->serial_signals & SerialSignal_DCD)
  955. netif_carrier_on(info->netdev);
  956. else
  957. netif_carrier_off(info->netdev);
  958. }
  959. #endif
  960. wake_up_interruptible(&info->status_event_wait_q);
  961. wake_up_interruptible(&info->event_wait_q);
  962. if (info->flags & ASYNC_CHECK_CD) {
  963. if (debug_level >= DEBUG_LEVEL_ISR)
  964. printk("%s CD now %s...", info->device_name,
  965. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  966. if (info->serial_signals & SerialSignal_DCD)
  967. wake_up_interruptible(&info->open_wait);
  968. else {
  969. if (debug_level >= DEBUG_LEVEL_ISR)
  970. printk("doing serial hangup...");
  971. if (info->tty)
  972. tty_hangup(info->tty);
  973. }
  974. }
  975. info->pending_bh |= BH_STATUS;
  976. }
  977. static void dsr_change(MGSLPC_INFO *info)
  978. {
  979. get_signals(info);
  980. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  981. port_irq_disable(info, PVR_DSR);
  982. info->icount.dsr++;
  983. if (info->serial_signals & SerialSignal_DSR)
  984. info->input_signal_events.dsr_up++;
  985. else
  986. info->input_signal_events.dsr_down++;
  987. wake_up_interruptible(&info->status_event_wait_q);
  988. wake_up_interruptible(&info->event_wait_q);
  989. info->pending_bh |= BH_STATUS;
  990. }
  991. static void ri_change(MGSLPC_INFO *info)
  992. {
  993. get_signals(info);
  994. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  995. port_irq_disable(info, PVR_RI);
  996. info->icount.rng++;
  997. if (info->serial_signals & SerialSignal_RI)
  998. info->input_signal_events.ri_up++;
  999. else
  1000. info->input_signal_events.ri_down++;
  1001. wake_up_interruptible(&info->status_event_wait_q);
  1002. wake_up_interruptible(&info->event_wait_q);
  1003. info->pending_bh |= BH_STATUS;
  1004. }
  1005. /* Interrupt service routine entry point.
  1006. *
  1007. * Arguments:
  1008. *
  1009. * irq interrupt number that caused interrupt
  1010. * dev_id device ID supplied during interrupt registration
  1011. */
  1012. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  1013. {
  1014. MGSLPC_INFO *info = dev_id;
  1015. unsigned short isr;
  1016. unsigned char gis, pis;
  1017. int count=0;
  1018. if (debug_level >= DEBUG_LEVEL_ISR)
  1019. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  1020. if (!(info->p_dev->_locked))
  1021. return IRQ_HANDLED;
  1022. spin_lock(&info->lock);
  1023. while ((gis = read_reg(info, CHA + GIS))) {
  1024. if (debug_level >= DEBUG_LEVEL_ISR)
  1025. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1026. if ((gis & 0x70) || count > 1000) {
  1027. printk("synclink_cs:hardware failed or ejected\n");
  1028. break;
  1029. }
  1030. count++;
  1031. if (gis & (BIT1 + BIT0)) {
  1032. isr = read_reg16(info, CHB + ISR);
  1033. if (isr & IRQ_DCD)
  1034. dcd_change(info);
  1035. if (isr & IRQ_CTS)
  1036. cts_change(info);
  1037. }
  1038. if (gis & (BIT3 + BIT2))
  1039. {
  1040. isr = read_reg16(info, CHA + ISR);
  1041. if (isr & IRQ_TIMER) {
  1042. info->irq_occurred = true;
  1043. irq_disable(info, CHA, IRQ_TIMER);
  1044. }
  1045. /* receive IRQs */
  1046. if (isr & IRQ_EXITHUNT) {
  1047. info->icount.exithunt++;
  1048. wake_up_interruptible(&info->event_wait_q);
  1049. }
  1050. if (isr & IRQ_BREAK_ON) {
  1051. info->icount.brk++;
  1052. if (info->flags & ASYNC_SAK)
  1053. do_SAK(info->tty);
  1054. }
  1055. if (isr & IRQ_RXTIME) {
  1056. issue_command(info, CHA, CMD_RXFIFO_READ);
  1057. }
  1058. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1059. if (info->params.mode == MGSL_MODE_HDLC)
  1060. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1061. else
  1062. rx_ready_async(info, isr & IRQ_RXEOM);
  1063. }
  1064. /* transmit IRQs */
  1065. if (isr & IRQ_UNDERRUN) {
  1066. if (info->tx_aborting)
  1067. info->icount.txabort++;
  1068. else
  1069. info->icount.txunder++;
  1070. tx_done(info);
  1071. }
  1072. else if (isr & IRQ_ALLSENT) {
  1073. info->icount.txok++;
  1074. tx_done(info);
  1075. }
  1076. else if (isr & IRQ_TXFIFO)
  1077. tx_ready(info);
  1078. }
  1079. if (gis & BIT7) {
  1080. pis = read_reg(info, CHA + PIS);
  1081. if (pis & BIT1)
  1082. dsr_change(info);
  1083. if (pis & BIT2)
  1084. ri_change(info);
  1085. }
  1086. }
  1087. /* Request bottom half processing if there's something
  1088. * for it to do and the bh is not already running
  1089. */
  1090. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1091. if ( debug_level >= DEBUG_LEVEL_ISR )
  1092. printk("%s(%d):%s queueing bh task.\n",
  1093. __FILE__,__LINE__,info->device_name);
  1094. schedule_work(&info->task);
  1095. info->bh_requested = true;
  1096. }
  1097. spin_unlock(&info->lock);
  1098. if (debug_level >= DEBUG_LEVEL_ISR)
  1099. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1100. __FILE__, __LINE__, info->irq_level);
  1101. return IRQ_HANDLED;
  1102. }
  1103. /* Initialize and start device.
  1104. */
  1105. static int startup(MGSLPC_INFO * info)
  1106. {
  1107. int retval = 0;
  1108. if (debug_level >= DEBUG_LEVEL_INFO)
  1109. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1110. if (info->flags & ASYNC_INITIALIZED)
  1111. return 0;
  1112. if (!info->tx_buf) {
  1113. /* allocate a page of memory for a transmit buffer */
  1114. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1115. if (!info->tx_buf) {
  1116. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1117. __FILE__,__LINE__,info->device_name);
  1118. return -ENOMEM;
  1119. }
  1120. }
  1121. info->pending_bh = 0;
  1122. memset(&info->icount, 0, sizeof(info->icount));
  1123. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1124. /* Allocate and claim adapter resources */
  1125. retval = claim_resources(info);
  1126. /* perform existance check and diagnostics */
  1127. if ( !retval )
  1128. retval = adapter_test(info);
  1129. if ( retval ) {
  1130. if (capable(CAP_SYS_ADMIN) && info->tty)
  1131. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1132. release_resources(info);
  1133. return retval;
  1134. }
  1135. /* program hardware for current parameters */
  1136. mgslpc_change_params(info);
  1137. if (info->tty)
  1138. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1139. info->flags |= ASYNC_INITIALIZED;
  1140. return 0;
  1141. }
  1142. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1143. */
  1144. static void shutdown(MGSLPC_INFO * info)
  1145. {
  1146. unsigned long flags;
  1147. if (!(info->flags & ASYNC_INITIALIZED))
  1148. return;
  1149. if (debug_level >= DEBUG_LEVEL_INFO)
  1150. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1151. __FILE__,__LINE__, info->device_name );
  1152. /* clear status wait queue because status changes */
  1153. /* can't happen after shutting down the hardware */
  1154. wake_up_interruptible(&info->status_event_wait_q);
  1155. wake_up_interruptible(&info->event_wait_q);
  1156. del_timer_sync(&info->tx_timer);
  1157. if (info->tx_buf) {
  1158. free_page((unsigned long) info->tx_buf);
  1159. info->tx_buf = NULL;
  1160. }
  1161. spin_lock_irqsave(&info->lock,flags);
  1162. rx_stop(info);
  1163. tx_stop(info);
  1164. /* TODO:disable interrupts instead of reset to preserve signal states */
  1165. reset_device(info);
  1166. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1167. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1168. set_signals(info);
  1169. }
  1170. spin_unlock_irqrestore(&info->lock,flags);
  1171. release_resources(info);
  1172. if (info->tty)
  1173. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1174. info->flags &= ~ASYNC_INITIALIZED;
  1175. }
  1176. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1177. {
  1178. unsigned long flags;
  1179. spin_lock_irqsave(&info->lock,flags);
  1180. rx_stop(info);
  1181. tx_stop(info);
  1182. info->tx_count = info->tx_put = info->tx_get = 0;
  1183. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1184. hdlc_mode(info);
  1185. else
  1186. async_mode(info);
  1187. set_signals(info);
  1188. info->dcd_chkcount = 0;
  1189. info->cts_chkcount = 0;
  1190. info->ri_chkcount = 0;
  1191. info->dsr_chkcount = 0;
  1192. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1193. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1194. get_signals(info);
  1195. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1196. rx_start(info);
  1197. spin_unlock_irqrestore(&info->lock,flags);
  1198. }
  1199. /* Reconfigure adapter based on new parameters
  1200. */
  1201. static void mgslpc_change_params(MGSLPC_INFO *info)
  1202. {
  1203. unsigned cflag;
  1204. int bits_per_char;
  1205. if (!info->tty || !info->tty->termios)
  1206. return;
  1207. if (debug_level >= DEBUG_LEVEL_INFO)
  1208. printk("%s(%d):mgslpc_change_params(%s)\n",
  1209. __FILE__,__LINE__, info->device_name );
  1210. cflag = info->tty->termios->c_cflag;
  1211. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1212. /* otherwise assert DTR and RTS */
  1213. if (cflag & CBAUD)
  1214. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1215. else
  1216. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1217. /* byte size and parity */
  1218. switch (cflag & CSIZE) {
  1219. case CS5: info->params.data_bits = 5; break;
  1220. case CS6: info->params.data_bits = 6; break;
  1221. case CS7: info->params.data_bits = 7; break;
  1222. case CS8: info->params.data_bits = 8; break;
  1223. default: info->params.data_bits = 7; break;
  1224. }
  1225. if (cflag & CSTOPB)
  1226. info->params.stop_bits = 2;
  1227. else
  1228. info->params.stop_bits = 1;
  1229. info->params.parity = ASYNC_PARITY_NONE;
  1230. if (cflag & PARENB) {
  1231. if (cflag & PARODD)
  1232. info->params.parity = ASYNC_PARITY_ODD;
  1233. else
  1234. info->params.parity = ASYNC_PARITY_EVEN;
  1235. #ifdef CMSPAR
  1236. if (cflag & CMSPAR)
  1237. info->params.parity = ASYNC_PARITY_SPACE;
  1238. #endif
  1239. }
  1240. /* calculate number of jiffies to transmit a full
  1241. * FIFO (32 bytes) at specified data rate
  1242. */
  1243. bits_per_char = info->params.data_bits +
  1244. info->params.stop_bits + 1;
  1245. /* if port data rate is set to 460800 or less then
  1246. * allow tty settings to override, otherwise keep the
  1247. * current data rate.
  1248. */
  1249. if (info->params.data_rate <= 460800) {
  1250. info->params.data_rate = tty_get_baud_rate(info->tty);
  1251. }
  1252. if ( info->params.data_rate ) {
  1253. info->timeout = (32*HZ*bits_per_char) /
  1254. info->params.data_rate;
  1255. }
  1256. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1257. if (cflag & CRTSCTS)
  1258. info->flags |= ASYNC_CTS_FLOW;
  1259. else
  1260. info->flags &= ~ASYNC_CTS_FLOW;
  1261. if (cflag & CLOCAL)
  1262. info->flags &= ~ASYNC_CHECK_CD;
  1263. else
  1264. info->flags |= ASYNC_CHECK_CD;
  1265. /* process tty input control flags */
  1266. info->read_status_mask = 0;
  1267. if (I_INPCK(info->tty))
  1268. info->read_status_mask |= BIT7 | BIT6;
  1269. if (I_IGNPAR(info->tty))
  1270. info->ignore_status_mask |= BIT7 | BIT6;
  1271. mgslpc_program_hw(info);
  1272. }
  1273. /* Add a character to the transmit buffer
  1274. */
  1275. static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1276. {
  1277. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1278. unsigned long flags;
  1279. if (debug_level >= DEBUG_LEVEL_INFO) {
  1280. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1281. __FILE__,__LINE__,ch,info->device_name);
  1282. }
  1283. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1284. return 0;
  1285. if (!info->tx_buf)
  1286. return 0;
  1287. spin_lock_irqsave(&info->lock,flags);
  1288. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1289. if (info->tx_count < TXBUFSIZE - 1) {
  1290. info->tx_buf[info->tx_put++] = ch;
  1291. info->tx_put &= TXBUFSIZE-1;
  1292. info->tx_count++;
  1293. }
  1294. }
  1295. spin_unlock_irqrestore(&info->lock,flags);
  1296. return 1;
  1297. }
  1298. /* Enable transmitter so remaining characters in the
  1299. * transmit buffer are sent.
  1300. */
  1301. static void mgslpc_flush_chars(struct tty_struct *tty)
  1302. {
  1303. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1304. unsigned long flags;
  1305. if (debug_level >= DEBUG_LEVEL_INFO)
  1306. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1307. __FILE__,__LINE__,info->device_name,info->tx_count);
  1308. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1309. return;
  1310. if (info->tx_count <= 0 || tty->stopped ||
  1311. tty->hw_stopped || !info->tx_buf)
  1312. return;
  1313. if (debug_level >= DEBUG_LEVEL_INFO)
  1314. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1315. __FILE__,__LINE__,info->device_name);
  1316. spin_lock_irqsave(&info->lock,flags);
  1317. if (!info->tx_active)
  1318. tx_start(info);
  1319. spin_unlock_irqrestore(&info->lock,flags);
  1320. }
  1321. /* Send a block of data
  1322. *
  1323. * Arguments:
  1324. *
  1325. * tty pointer to tty information structure
  1326. * buf pointer to buffer containing send data
  1327. * count size of send data in bytes
  1328. *
  1329. * Returns: number of characters written
  1330. */
  1331. static int mgslpc_write(struct tty_struct * tty,
  1332. const unsigned char *buf, int count)
  1333. {
  1334. int c, ret = 0;
  1335. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1336. unsigned long flags;
  1337. if (debug_level >= DEBUG_LEVEL_INFO)
  1338. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1339. __FILE__,__LINE__,info->device_name,count);
  1340. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1341. !info->tx_buf)
  1342. goto cleanup;
  1343. if (info->params.mode == MGSL_MODE_HDLC) {
  1344. if (count > TXBUFSIZE) {
  1345. ret = -EIO;
  1346. goto cleanup;
  1347. }
  1348. if (info->tx_active)
  1349. goto cleanup;
  1350. else if (info->tx_count)
  1351. goto start;
  1352. }
  1353. for (;;) {
  1354. c = min(count,
  1355. min(TXBUFSIZE - info->tx_count - 1,
  1356. TXBUFSIZE - info->tx_put));
  1357. if (c <= 0)
  1358. break;
  1359. memcpy(info->tx_buf + info->tx_put, buf, c);
  1360. spin_lock_irqsave(&info->lock,flags);
  1361. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1362. info->tx_count += c;
  1363. spin_unlock_irqrestore(&info->lock,flags);
  1364. buf += c;
  1365. count -= c;
  1366. ret += c;
  1367. }
  1368. start:
  1369. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1370. spin_lock_irqsave(&info->lock,flags);
  1371. if (!info->tx_active)
  1372. tx_start(info);
  1373. spin_unlock_irqrestore(&info->lock,flags);
  1374. }
  1375. cleanup:
  1376. if (debug_level >= DEBUG_LEVEL_INFO)
  1377. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1378. __FILE__,__LINE__,info->device_name,ret);
  1379. return ret;
  1380. }
  1381. /* Return the count of free bytes in transmit buffer
  1382. */
  1383. static int mgslpc_write_room(struct tty_struct *tty)
  1384. {
  1385. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1386. int ret;
  1387. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1388. return 0;
  1389. if (info->params.mode == MGSL_MODE_HDLC) {
  1390. /* HDLC (frame oriented) mode */
  1391. if (info->tx_active)
  1392. return 0;
  1393. else
  1394. return HDLC_MAX_FRAME_SIZE;
  1395. } else {
  1396. ret = TXBUFSIZE - info->tx_count - 1;
  1397. if (ret < 0)
  1398. ret = 0;
  1399. }
  1400. if (debug_level >= DEBUG_LEVEL_INFO)
  1401. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1402. __FILE__,__LINE__, info->device_name, ret);
  1403. return ret;
  1404. }
  1405. /* Return the count of bytes in transmit buffer
  1406. */
  1407. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1408. {
  1409. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1410. int rc;
  1411. if (debug_level >= DEBUG_LEVEL_INFO)
  1412. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1413. __FILE__,__LINE__, info->device_name );
  1414. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1415. return 0;
  1416. if (info->params.mode == MGSL_MODE_HDLC)
  1417. rc = info->tx_active ? info->max_frame_size : 0;
  1418. else
  1419. rc = info->tx_count;
  1420. if (debug_level >= DEBUG_LEVEL_INFO)
  1421. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1422. __FILE__,__LINE__, info->device_name, rc);
  1423. return rc;
  1424. }
  1425. /* Discard all data in the send buffer
  1426. */
  1427. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1428. {
  1429. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1430. unsigned long flags;
  1431. if (debug_level >= DEBUG_LEVEL_INFO)
  1432. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1433. __FILE__,__LINE__, info->device_name );
  1434. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1435. return;
  1436. spin_lock_irqsave(&info->lock,flags);
  1437. info->tx_count = info->tx_put = info->tx_get = 0;
  1438. del_timer(&info->tx_timer);
  1439. spin_unlock_irqrestore(&info->lock,flags);
  1440. wake_up_interruptible(&tty->write_wait);
  1441. tty_wakeup(tty);
  1442. }
  1443. /* Send a high-priority XON/XOFF character
  1444. */
  1445. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1446. {
  1447. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1448. unsigned long flags;
  1449. if (debug_level >= DEBUG_LEVEL_INFO)
  1450. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1451. __FILE__,__LINE__, info->device_name, ch );
  1452. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1453. return;
  1454. info->x_char = ch;
  1455. if (ch) {
  1456. spin_lock_irqsave(&info->lock,flags);
  1457. if (!info->tx_enabled)
  1458. tx_start(info);
  1459. spin_unlock_irqrestore(&info->lock,flags);
  1460. }
  1461. }
  1462. /* Signal remote device to throttle send data (our receive data)
  1463. */
  1464. static void mgslpc_throttle(struct tty_struct * tty)
  1465. {
  1466. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1467. unsigned long flags;
  1468. if (debug_level >= DEBUG_LEVEL_INFO)
  1469. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1470. __FILE__,__LINE__, info->device_name );
  1471. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1472. return;
  1473. if (I_IXOFF(tty))
  1474. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1475. if (tty->termios->c_cflag & CRTSCTS) {
  1476. spin_lock_irqsave(&info->lock,flags);
  1477. info->serial_signals &= ~SerialSignal_RTS;
  1478. set_signals(info);
  1479. spin_unlock_irqrestore(&info->lock,flags);
  1480. }
  1481. }
  1482. /* Signal remote device to stop throttling send data (our receive data)
  1483. */
  1484. static void mgslpc_unthrottle(struct tty_struct * tty)
  1485. {
  1486. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1487. unsigned long flags;
  1488. if (debug_level >= DEBUG_LEVEL_INFO)
  1489. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1490. __FILE__,__LINE__, info->device_name );
  1491. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1492. return;
  1493. if (I_IXOFF(tty)) {
  1494. if (info->x_char)
  1495. info->x_char = 0;
  1496. else
  1497. mgslpc_send_xchar(tty, START_CHAR(tty));
  1498. }
  1499. if (tty->termios->c_cflag & CRTSCTS) {
  1500. spin_lock_irqsave(&info->lock,flags);
  1501. info->serial_signals |= SerialSignal_RTS;
  1502. set_signals(info);
  1503. spin_unlock_irqrestore(&info->lock,flags);
  1504. }
  1505. }
  1506. /* get the current serial statistics
  1507. */
  1508. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1509. {
  1510. int err;
  1511. if (debug_level >= DEBUG_LEVEL_INFO)
  1512. printk("get_params(%s)\n", info->device_name);
  1513. if (!user_icount) {
  1514. memset(&info->icount, 0, sizeof(info->icount));
  1515. } else {
  1516. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1517. if (err)
  1518. return -EFAULT;
  1519. }
  1520. return 0;
  1521. }
  1522. /* get the current serial parameters
  1523. */
  1524. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1525. {
  1526. int err;
  1527. if (debug_level >= DEBUG_LEVEL_INFO)
  1528. printk("get_params(%s)\n", info->device_name);
  1529. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1530. if (err)
  1531. return -EFAULT;
  1532. return 0;
  1533. }
  1534. /* set the serial parameters
  1535. *
  1536. * Arguments:
  1537. *
  1538. * info pointer to device instance data
  1539. * new_params user buffer containing new serial params
  1540. *
  1541. * Returns: 0 if success, otherwise error code
  1542. */
  1543. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1544. {
  1545. unsigned long flags;
  1546. MGSL_PARAMS tmp_params;
  1547. int err;
  1548. if (debug_level >= DEBUG_LEVEL_INFO)
  1549. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1550. info->device_name );
  1551. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1552. if (err) {
  1553. if ( debug_level >= DEBUG_LEVEL_INFO )
  1554. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1555. __FILE__,__LINE__,info->device_name);
  1556. return -EFAULT;
  1557. }
  1558. spin_lock_irqsave(&info->lock,flags);
  1559. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1560. spin_unlock_irqrestore(&info->lock,flags);
  1561. mgslpc_change_params(info);
  1562. return 0;
  1563. }
  1564. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1565. {
  1566. int err;
  1567. if (debug_level >= DEBUG_LEVEL_INFO)
  1568. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1569. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1570. if (err)
  1571. return -EFAULT;
  1572. return 0;
  1573. }
  1574. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1575. {
  1576. unsigned long flags;
  1577. if (debug_level >= DEBUG_LEVEL_INFO)
  1578. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1579. spin_lock_irqsave(&info->lock,flags);
  1580. info->idle_mode = idle_mode;
  1581. tx_set_idle(info);
  1582. spin_unlock_irqrestore(&info->lock,flags);
  1583. return 0;
  1584. }
  1585. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1586. {
  1587. int err;
  1588. if (debug_level >= DEBUG_LEVEL_INFO)
  1589. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1590. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1591. if (err)
  1592. return -EFAULT;
  1593. return 0;
  1594. }
  1595. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1596. {
  1597. unsigned long flags;
  1598. unsigned char val;
  1599. if (debug_level >= DEBUG_LEVEL_INFO)
  1600. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1601. spin_lock_irqsave(&info->lock,flags);
  1602. info->if_mode = if_mode;
  1603. val = read_reg(info, PVR) & 0x0f;
  1604. switch (info->if_mode)
  1605. {
  1606. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1607. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1608. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1609. }
  1610. write_reg(info, PVR, val);
  1611. spin_unlock_irqrestore(&info->lock,flags);
  1612. return 0;
  1613. }
  1614. static int set_txenable(MGSLPC_INFO * info, int enable)
  1615. {
  1616. unsigned long flags;
  1617. if (debug_level >= DEBUG_LEVEL_INFO)
  1618. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1619. spin_lock_irqsave(&info->lock,flags);
  1620. if (enable) {
  1621. if (!info->tx_enabled)
  1622. tx_start(info);
  1623. } else {
  1624. if (info->tx_enabled)
  1625. tx_stop(info);
  1626. }
  1627. spin_unlock_irqrestore(&info->lock,flags);
  1628. return 0;
  1629. }
  1630. static int tx_abort(MGSLPC_INFO * info)
  1631. {
  1632. unsigned long flags;
  1633. if (debug_level >= DEBUG_LEVEL_INFO)
  1634. printk("tx_abort(%s)\n", info->device_name);
  1635. spin_lock_irqsave(&info->lock,flags);
  1636. if (info->tx_active && info->tx_count &&
  1637. info->params.mode == MGSL_MODE_HDLC) {
  1638. /* clear data count so FIFO is not filled on next IRQ.
  1639. * This results in underrun and abort transmission.
  1640. */
  1641. info->tx_count = info->tx_put = info->tx_get = 0;
  1642. info->tx_aborting = true;
  1643. }
  1644. spin_unlock_irqrestore(&info->lock,flags);
  1645. return 0;
  1646. }
  1647. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1648. {
  1649. unsigned long flags;
  1650. if (debug_level >= DEBUG_LEVEL_INFO)
  1651. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1652. spin_lock_irqsave(&info->lock,flags);
  1653. if (enable) {
  1654. if (!info->rx_enabled)
  1655. rx_start(info);
  1656. } else {
  1657. if (info->rx_enabled)
  1658. rx_stop(info);
  1659. }
  1660. spin_unlock_irqrestore(&info->lock,flags);
  1661. return 0;
  1662. }
  1663. /* wait for specified event to occur
  1664. *
  1665. * Arguments: info pointer to device instance data
  1666. * mask pointer to bitmask of events to wait for
  1667. * Return Value: 0 if successful and bit mask updated with
  1668. * of events triggerred,
  1669. * otherwise error code
  1670. */
  1671. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1672. {
  1673. unsigned long flags;
  1674. int s;
  1675. int rc=0;
  1676. struct mgsl_icount cprev, cnow;
  1677. int events;
  1678. int mask;
  1679. struct _input_signal_events oldsigs, newsigs;
  1680. DECLARE_WAITQUEUE(wait, current);
  1681. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1682. if (rc)
  1683. return -EFAULT;
  1684. if (debug_level >= DEBUG_LEVEL_INFO)
  1685. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1686. spin_lock_irqsave(&info->lock,flags);
  1687. /* return immediately if state matches requested events */
  1688. get_signals(info);
  1689. s = info->serial_signals;
  1690. events = mask &
  1691. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1692. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1693. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1694. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1695. if (events) {
  1696. spin_unlock_irqrestore(&info->lock,flags);
  1697. goto exit;
  1698. }
  1699. /* save current irq counts */
  1700. cprev = info->icount;
  1701. oldsigs = info->input_signal_events;
  1702. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1703. (mask & MgslEvent_ExitHuntMode))
  1704. irq_enable(info, CHA, IRQ_EXITHUNT);
  1705. set_current_state(TASK_INTERRUPTIBLE);
  1706. add_wait_queue(&info->event_wait_q, &wait);
  1707. spin_unlock_irqrestore(&info->lock,flags);
  1708. for(;;) {
  1709. schedule();
  1710. if (signal_pending(current)) {
  1711. rc = -ERESTARTSYS;
  1712. break;
  1713. }
  1714. /* get current irq counts */
  1715. spin_lock_irqsave(&info->lock,flags);
  1716. cnow = info->icount;
  1717. newsigs = info->input_signal_events;
  1718. set_current_state(TASK_INTERRUPTIBLE);
  1719. spin_unlock_irqrestore(&info->lock,flags);
  1720. /* if no change, wait aborted for some reason */
  1721. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1722. newsigs.dsr_down == oldsigs.dsr_down &&
  1723. newsigs.dcd_up == oldsigs.dcd_up &&
  1724. newsigs.dcd_down == oldsigs.dcd_down &&
  1725. newsigs.cts_up == oldsigs.cts_up &&
  1726. newsigs.cts_down == oldsigs.cts_down &&
  1727. newsigs.ri_up == oldsigs.ri_up &&
  1728. newsigs.ri_down == oldsigs.ri_down &&
  1729. cnow.exithunt == cprev.exithunt &&
  1730. cnow.rxidle == cprev.rxidle) {
  1731. rc = -EIO;
  1732. break;
  1733. }
  1734. events = mask &
  1735. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1736. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1737. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1738. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1739. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1740. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1741. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1742. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1743. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1744. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1745. if (events)
  1746. break;
  1747. cprev = cnow;
  1748. oldsigs = newsigs;
  1749. }
  1750. remove_wait_queue(&info->event_wait_q, &wait);
  1751. set_current_state(TASK_RUNNING);
  1752. if (mask & MgslEvent_ExitHuntMode) {
  1753. spin_lock_irqsave(&info->lock,flags);
  1754. if (!waitqueue_active(&info->event_wait_q))
  1755. irq_disable(info, CHA, IRQ_EXITHUNT);
  1756. spin_unlock_irqrestore(&info->lock,flags);
  1757. }
  1758. exit:
  1759. if (rc == 0)
  1760. PUT_USER(rc, events, mask_ptr);
  1761. return rc;
  1762. }
  1763. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1764. {
  1765. unsigned long flags;
  1766. int rc;
  1767. struct mgsl_icount cprev, cnow;
  1768. DECLARE_WAITQUEUE(wait, current);
  1769. /* save current irq counts */
  1770. spin_lock_irqsave(&info->lock,flags);
  1771. cprev = info->icount;
  1772. add_wait_queue(&info->status_event_wait_q, &wait);
  1773. set_current_state(TASK_INTERRUPTIBLE);
  1774. spin_unlock_irqrestore(&info->lock,flags);
  1775. for(;;) {
  1776. schedule();
  1777. if (signal_pending(current)) {
  1778. rc = -ERESTARTSYS;
  1779. break;
  1780. }
  1781. /* get new irq counts */
  1782. spin_lock_irqsave(&info->lock,flags);
  1783. cnow = info->icount;
  1784. set_current_state(TASK_INTERRUPTIBLE);
  1785. spin_unlock_irqrestore(&info->lock,flags);
  1786. /* if no change, wait aborted for some reason */
  1787. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1788. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1789. rc = -EIO;
  1790. break;
  1791. }
  1792. /* check for change in caller specified modem input */
  1793. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1794. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1795. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1796. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1797. rc = 0;
  1798. break;
  1799. }
  1800. cprev = cnow;
  1801. }
  1802. remove_wait_queue(&info->status_event_wait_q, &wait);
  1803. set_current_state(TASK_RUNNING);
  1804. return rc;
  1805. }
  1806. /* return the state of the serial control and status signals
  1807. */
  1808. static int tiocmget(struct tty_struct *tty, struct file *file)
  1809. {
  1810. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1811. unsigned int result;
  1812. unsigned long flags;
  1813. spin_lock_irqsave(&info->lock,flags);
  1814. get_signals(info);
  1815. spin_unlock_irqrestore(&info->lock,flags);
  1816. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1817. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1818. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1819. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1820. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1821. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1822. if (debug_level >= DEBUG_LEVEL_INFO)
  1823. printk("%s(%d):%s tiocmget() value=%08X\n",
  1824. __FILE__,__LINE__, info->device_name, result );
  1825. return result;
  1826. }
  1827. /* set modem control signals (DTR/RTS)
  1828. */
  1829. static int tiocmset(struct tty_struct *tty, struct file *file,
  1830. unsigned int set, unsigned int clear)
  1831. {
  1832. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1833. unsigned long flags;
  1834. if (debug_level >= DEBUG_LEVEL_INFO)
  1835. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1836. __FILE__,__LINE__,info->device_name, set, clear);
  1837. if (set & TIOCM_RTS)
  1838. info->serial_signals |= SerialSignal_RTS;
  1839. if (set & TIOCM_DTR)
  1840. info->serial_signals |= SerialSignal_DTR;
  1841. if (clear & TIOCM_RTS)
  1842. info->serial_signals &= ~SerialSignal_RTS;
  1843. if (clear & TIOCM_DTR)
  1844. info->serial_signals &= ~SerialSignal_DTR;
  1845. spin_lock_irqsave(&info->lock,flags);
  1846. set_signals(info);
  1847. spin_unlock_irqrestore(&info->lock,flags);
  1848. return 0;
  1849. }
  1850. /* Set or clear transmit break condition
  1851. *
  1852. * Arguments: tty pointer to tty instance data
  1853. * break_state -1=set break condition, 0=clear
  1854. */
  1855. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1856. {
  1857. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1858. unsigned long flags;
  1859. if (debug_level >= DEBUG_LEVEL_INFO)
  1860. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1861. __FILE__,__LINE__, info->device_name, break_state);
  1862. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1863. return;
  1864. spin_lock_irqsave(&info->lock,flags);
  1865. if (break_state == -1)
  1866. set_reg_bits(info, CHA+DAFO, BIT6);
  1867. else
  1868. clear_reg_bits(info, CHA+DAFO, BIT6);
  1869. spin_unlock_irqrestore(&info->lock,flags);
  1870. }
  1871. /* Service an IOCTL request
  1872. *
  1873. * Arguments:
  1874. *
  1875. * tty pointer to tty instance data
  1876. * file pointer to associated file object for device
  1877. * cmd IOCTL command code
  1878. * arg command argument/context
  1879. *
  1880. * Return Value: 0 if success, otherwise error code
  1881. */
  1882. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1883. unsigned int cmd, unsigned long arg)
  1884. {
  1885. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1886. if (debug_level >= DEBUG_LEVEL_INFO)
  1887. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1888. info->device_name, cmd );
  1889. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1890. return -ENODEV;
  1891. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1892. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1893. if (tty->flags & (1 << TTY_IO_ERROR))
  1894. return -EIO;
  1895. }
  1896. return ioctl_common(info, cmd, arg);
  1897. }
  1898. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1899. {
  1900. int error;
  1901. struct mgsl_icount cnow; /* kernel counter temps */
  1902. struct serial_icounter_struct __user *p_cuser; /* user space */
  1903. void __user *argp = (void __user *)arg;
  1904. unsigned long flags;
  1905. switch (cmd) {
  1906. case MGSL_IOCGPARAMS:
  1907. return get_params(info, argp);
  1908. case MGSL_IOCSPARAMS:
  1909. return set_params(info, argp);
  1910. case MGSL_IOCGTXIDLE:
  1911. return get_txidle(info, argp);
  1912. case MGSL_IOCSTXIDLE:
  1913. return set_txidle(info, (int)arg);
  1914. case MGSL_IOCGIF:
  1915. return get_interface(info, argp);
  1916. case MGSL_IOCSIF:
  1917. return set_interface(info,(int)arg);
  1918. case MGSL_IOCTXENABLE:
  1919. return set_txenable(info,(int)arg);
  1920. case MGSL_IOCRXENABLE:
  1921. return set_rxenable(info,(int)arg);
  1922. case MGSL_IOCTXABORT:
  1923. return tx_abort(info);
  1924. case MGSL_IOCGSTATS:
  1925. return get_stats(info, argp);
  1926. case MGSL_IOCWAITEVENT:
  1927. return wait_events(info, argp);
  1928. case TIOCMIWAIT:
  1929. return modem_input_wait(info,(int)arg);
  1930. case TIOCGICOUNT:
  1931. spin_lock_irqsave(&info->lock,flags);
  1932. cnow = info->icount;
  1933. spin_unlock_irqrestore(&info->lock,flags);
  1934. p_cuser = argp;
  1935. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1936. if (error) return error;
  1937. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1938. if (error) return error;
  1939. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1940. if (error) return error;
  1941. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1942. if (error) return error;
  1943. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1944. if (error) return error;
  1945. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1946. if (error) return error;
  1947. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1948. if (error) return error;
  1949. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1950. if (error) return error;
  1951. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1952. if (error) return error;
  1953. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1954. if (error) return error;
  1955. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1956. if (error) return error;
  1957. return 0;
  1958. default:
  1959. return -ENOIOCTLCMD;
  1960. }
  1961. return 0;
  1962. }
  1963. /* Set new termios settings
  1964. *
  1965. * Arguments:
  1966. *
  1967. * tty pointer to tty structure
  1968. * termios pointer to buffer to hold returned old termios
  1969. */
  1970. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1971. {
  1972. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1973. unsigned long flags;
  1974. if (debug_level >= DEBUG_LEVEL_INFO)
  1975. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1976. tty->driver->name );
  1977. /* just return if nothing has changed */
  1978. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1979. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1980. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1981. return;
  1982. mgslpc_change_params(info);
  1983. /* Handle transition to B0 status */
  1984. if (old_termios->c_cflag & CBAUD &&
  1985. !(tty->termios->c_cflag & CBAUD)) {
  1986. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1987. spin_lock_irqsave(&info->lock,flags);
  1988. set_signals(info);
  1989. spin_unlock_irqrestore(&info->lock,flags);
  1990. }
  1991. /* Handle transition away from B0 status */
  1992. if (!(old_termios->c_cflag & CBAUD) &&
  1993. tty->termios->c_cflag & CBAUD) {
  1994. info->serial_signals |= SerialSignal_DTR;
  1995. if (!(tty->termios->c_cflag & CRTSCTS) ||
  1996. !test_bit(TTY_THROTTLED, &tty->flags)) {
  1997. info->serial_signals |= SerialSignal_RTS;
  1998. }
  1999. spin_lock_irqsave(&info->lock,flags);
  2000. set_signals(info);
  2001. spin_unlock_irqrestore(&info->lock,flags);
  2002. }
  2003. /* Handle turning off CRTSCTS */
  2004. if (old_termios->c_cflag & CRTSCTS &&
  2005. !(tty->termios->c_cflag & CRTSCTS)) {
  2006. tty->hw_stopped = 0;
  2007. tx_release(tty);
  2008. }
  2009. }
  2010. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2011. {
  2012. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2013. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2014. return;
  2015. if (debug_level >= DEBUG_LEVEL_INFO)
  2016. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2017. __FILE__,__LINE__, info->device_name, info->count);
  2018. if (!info->count)
  2019. return;
  2020. if (tty_hung_up_p(filp))
  2021. goto cleanup;
  2022. if ((tty->count == 1) && (info->count != 1)) {
  2023. /*
  2024. * tty->count is 1 and the tty structure will be freed.
  2025. * info->count should be one in this case.
  2026. * if it's not, correct it so that the port is shutdown.
  2027. */
  2028. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2029. "info->count is %d\n", info->count);
  2030. info->count = 1;
  2031. }
  2032. info->count--;
  2033. /* if at least one open remaining, leave hardware active */
  2034. if (info->count)
  2035. goto cleanup;
  2036. info->flags |= ASYNC_CLOSING;
  2037. /* set tty->closing to notify line discipline to
  2038. * only process XON/XOFF characters. Only the N_TTY
  2039. * discipline appears to use this (ppp does not).
  2040. */
  2041. tty->closing = 1;
  2042. /* wait for transmit data to clear all layers */
  2043. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2044. if (debug_level >= DEBUG_LEVEL_INFO)
  2045. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2046. __FILE__,__LINE__, info->device_name );
  2047. tty_wait_until_sent(tty, info->closing_wait);
  2048. }
  2049. if (info->flags & ASYNC_INITIALIZED)
  2050. mgslpc_wait_until_sent(tty, info->timeout);
  2051. mgslpc_flush_buffer(tty);
  2052. tty_ldisc_flush(tty);
  2053. shutdown(info);
  2054. tty->closing = 0;
  2055. info->tty = NULL;
  2056. if (info->blocked_open) {
  2057. if (info->close_delay) {
  2058. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2059. }
  2060. wake_up_interruptible(&info->open_wait);
  2061. }
  2062. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2063. wake_up_interruptible(&info->close_wait);
  2064. cleanup:
  2065. if (debug_level >= DEBUG_LEVEL_INFO)
  2066. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2067. tty->driver->name, info->count);
  2068. }
  2069. /* Wait until the transmitter is empty.
  2070. */
  2071. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2072. {
  2073. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2074. unsigned long orig_jiffies, char_time;
  2075. if (!info )
  2076. return;
  2077. if (debug_level >= DEBUG_LEVEL_INFO)
  2078. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2079. __FILE__,__LINE__, info->device_name );
  2080. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2081. return;
  2082. if (!(info->flags & ASYNC_INITIALIZED))
  2083. goto exit;
  2084. orig_jiffies = jiffies;
  2085. /* Set check interval to 1/5 of estimated time to
  2086. * send a character, and make it at least 1. The check
  2087. * interval should also be less than the timeout.
  2088. * Note: use tight timings here to satisfy the NIST-PCTS.
  2089. */
  2090. if ( info->params.data_rate ) {
  2091. char_time = info->timeout/(32 * 5);
  2092. if (!char_time)
  2093. char_time++;
  2094. } else
  2095. char_time = 1;
  2096. if (timeout)
  2097. char_time = min_t(unsigned long, char_time, timeout);
  2098. if (info->params.mode == MGSL_MODE_HDLC) {
  2099. while (info->tx_active) {
  2100. msleep_interruptible(jiffies_to_msecs(char_time));
  2101. if (signal_pending(current))
  2102. break;
  2103. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2104. break;
  2105. }
  2106. } else {
  2107. while ((info->tx_count || info->tx_active) &&
  2108. info->tx_enabled) {
  2109. msleep_interruptible(jiffies_to_msecs(char_time));
  2110. if (signal_pending(current))
  2111. break;
  2112. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2113. break;
  2114. }
  2115. }
  2116. exit:
  2117. if (debug_level >= DEBUG_LEVEL_INFO)
  2118. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2119. __FILE__,__LINE__, info->device_name );
  2120. }
  2121. /* Called by tty_hangup() when a hangup is signaled.
  2122. * This is the same as closing all open files for the port.
  2123. */
  2124. static void mgslpc_hangup(struct tty_struct *tty)
  2125. {
  2126. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2127. if (debug_level >= DEBUG_LEVEL_INFO)
  2128. printk("%s(%d):mgslpc_hangup(%s)\n",
  2129. __FILE__,__LINE__, info->device_name );
  2130. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2131. return;
  2132. mgslpc_flush_buffer(tty);
  2133. shutdown(info);
  2134. info->count = 0;
  2135. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2136. info->tty = NULL;
  2137. wake_up_interruptible(&info->open_wait);
  2138. }
  2139. /* Block the current process until the specified port
  2140. * is ready to be opened.
  2141. */
  2142. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2143. MGSLPC_INFO *info)
  2144. {
  2145. DECLARE_WAITQUEUE(wait, current);
  2146. int retval;
  2147. bool do_clocal = false;
  2148. bool extra_count = false;
  2149. unsigned long flags;
  2150. if (debug_level >= DEBUG_LEVEL_INFO)
  2151. printk("%s(%d):block_til_ready on %s\n",
  2152. __FILE__,__LINE__, tty->driver->name );
  2153. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2154. /* nonblock mode is set or port is not enabled */
  2155. /* just verify that callout device is not active */
  2156. info->flags |= ASYNC_NORMAL_ACTIVE;
  2157. return 0;
  2158. }
  2159. if (tty->termios->c_cflag & CLOCAL)
  2160. do_clocal = true;
  2161. /* Wait for carrier detect and the line to become
  2162. * free (i.e., not in use by the callout). While we are in
  2163. * this loop, info->count is dropped by one, so that
  2164. * mgslpc_close() knows when to free things. We restore it upon
  2165. * exit, either normal or abnormal.
  2166. */
  2167. retval = 0;
  2168. add_wait_queue(&info->open_wait, &wait);
  2169. if (debug_level >= DEBUG_LEVEL_INFO)
  2170. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2171. __FILE__,__LINE__, tty->driver->name, info->count );
  2172. spin_lock_irqsave(&info->lock, flags);
  2173. if (!tty_hung_up_p(filp)) {
  2174. extra_count = true;
  2175. info->count--;
  2176. }
  2177. spin_unlock_irqrestore(&info->lock, flags);
  2178. info->blocked_open++;
  2179. while (1) {
  2180. if ((tty->termios->c_cflag & CBAUD)) {
  2181. spin_lock_irqsave(&info->lock,flags);
  2182. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2183. set_signals(info);
  2184. spin_unlock_irqrestore(&info->lock,flags);
  2185. }
  2186. set_current_state(TASK_INTERRUPTIBLE);
  2187. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2188. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2189. -EAGAIN : -ERESTARTSYS;
  2190. break;
  2191. }
  2192. spin_lock_irqsave(&info->lock,flags);
  2193. get_signals(info);
  2194. spin_unlock_irqrestore(&info->lock,flags);
  2195. if (!(info->flags & ASYNC_CLOSING) &&
  2196. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2197. break;
  2198. }
  2199. if (signal_pending(current)) {
  2200. retval = -ERESTARTSYS;
  2201. break;
  2202. }
  2203. if (debug_level >= DEBUG_LEVEL_INFO)
  2204. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2205. __FILE__,__LINE__, tty->driver->name, info->count );
  2206. schedule();
  2207. }
  2208. set_current_state(TASK_RUNNING);
  2209. remove_wait_queue(&info->open_wait, &wait);
  2210. if (extra_count)
  2211. info->count++;
  2212. info->blocked_open--;
  2213. if (debug_level >= DEBUG_LEVEL_INFO)
  2214. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2215. __FILE__,__LINE__, tty->driver->name, info->count );
  2216. if (!retval)
  2217. info->flags |= ASYNC_NORMAL_ACTIVE;
  2218. return retval;
  2219. }
  2220. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2221. {
  2222. MGSLPC_INFO *info;
  2223. int retval, line;
  2224. unsigned long flags;
  2225. /* verify range of specified line number */
  2226. line = tty->index;
  2227. if ((line < 0) || (line >= mgslpc_device_count)) {
  2228. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2229. __FILE__,__LINE__,line);
  2230. return -ENODEV;
  2231. }
  2232. /* find the info structure for the specified line */
  2233. info = mgslpc_device_list;
  2234. while(info && info->line != line)
  2235. info = info->next_device;
  2236. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2237. return -ENODEV;
  2238. tty->driver_data = info;
  2239. info->tty = tty;
  2240. if (debug_level >= DEBUG_LEVEL_INFO)
  2241. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2242. __FILE__,__LINE__,tty->driver->name, info->count);
  2243. /* If port is closing, signal caller to try again */
  2244. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2245. if (info->flags & ASYNC_CLOSING)
  2246. interruptible_sleep_on(&info->close_wait);
  2247. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2248. -EAGAIN : -ERESTARTSYS);
  2249. goto cleanup;
  2250. }
  2251. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2252. spin_lock_irqsave(&info->netlock, flags);
  2253. if (info->netcount) {
  2254. retval = -EBUSY;
  2255. spin_unlock_irqrestore(&info->netlock, flags);
  2256. goto cleanup;
  2257. }
  2258. info->count++;
  2259. spin_unlock_irqrestore(&info->netlock, flags);
  2260. if (info->count == 1) {
  2261. /* 1st open on this device, init hardware */
  2262. retval = startup(info);
  2263. if (retval < 0)
  2264. goto cleanup;
  2265. }
  2266. retval = block_til_ready(tty, filp, info);
  2267. if (retval) {
  2268. if (debug_level >= DEBUG_LEVEL_INFO)
  2269. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2270. __FILE__,__LINE__, info->device_name, retval);
  2271. goto cleanup;
  2272. }
  2273. if (debug_level >= DEBUG_LEVEL_INFO)
  2274. printk("%s(%d):mgslpc_open(%s) success\n",
  2275. __FILE__,__LINE__, info->device_name);
  2276. retval = 0;
  2277. cleanup:
  2278. if (retval) {
  2279. if (tty->count == 1)
  2280. info->tty = NULL; /* tty layer will release tty struct */
  2281. if(info->count)
  2282. info->count--;
  2283. }
  2284. return retval;
  2285. }
  2286. /*
  2287. * /proc fs routines....
  2288. */
  2289. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2290. {
  2291. char stat_buf[30];
  2292. int ret;
  2293. unsigned long flags;
  2294. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2295. info->device_name, info->io_base, info->irq_level);
  2296. /* output current serial signal states */
  2297. spin_lock_irqsave(&info->lock,flags);
  2298. get_signals(info);
  2299. spin_unlock_irqrestore(&info->lock,flags);
  2300. stat_buf[0] = 0;
  2301. stat_buf[1] = 0;
  2302. if (info->serial_signals & SerialSignal_RTS)
  2303. strcat(stat_buf, "|RTS");
  2304. if (info->serial_signals & SerialSignal_CTS)
  2305. strcat(stat_buf, "|CTS");
  2306. if (info->serial_signals & SerialSignal_DTR)
  2307. strcat(stat_buf, "|DTR");
  2308. if (info->serial_signals & SerialSignal_DSR)
  2309. strcat(stat_buf, "|DSR");
  2310. if (info->serial_signals & SerialSignal_DCD)
  2311. strcat(stat_buf, "|CD");
  2312. if (info->serial_signals & SerialSignal_RI)
  2313. strcat(stat_buf, "|RI");
  2314. if (info->params.mode == MGSL_MODE_HDLC) {
  2315. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2316. info->icount.txok, info->icount.rxok);
  2317. if (info->icount.txunder)
  2318. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2319. if (info->icount.txabort)
  2320. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2321. if (info->icount.rxshort)
  2322. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2323. if (info->icount.rxlong)
  2324. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2325. if (info->icount.rxover)
  2326. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2327. if (info->icount.rxcrc)
  2328. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2329. } else {
  2330. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2331. info->icount.tx, info->icount.rx);
  2332. if (info->icount.frame)
  2333. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2334. if (info->icount.parity)
  2335. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2336. if (info->icount.brk)
  2337. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2338. if (info->icount.overrun)
  2339. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2340. }
  2341. /* Append serial signal status to end */
  2342. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2343. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2344. info->tx_active,info->bh_requested,info->bh_running,
  2345. info->pending_bh);
  2346. return ret;
  2347. }
  2348. /* Called to print information about devices
  2349. */
  2350. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2351. int *eof, void *data)
  2352. {
  2353. int len = 0, l;
  2354. off_t begin = 0;
  2355. MGSLPC_INFO *info;
  2356. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2357. info = mgslpc_device_list;
  2358. while( info ) {
  2359. l = line_info(page + len, info);
  2360. len += l;
  2361. if (len+begin > off+count)
  2362. goto done;
  2363. if (len+begin < off) {
  2364. begin += len;
  2365. len = 0;
  2366. }
  2367. info = info->next_device;
  2368. }
  2369. *eof = 1;
  2370. done:
  2371. if (off >= len+begin)
  2372. return 0;
  2373. *start = page + (off-begin);
  2374. return ((count < begin+len-off) ? count : begin+len-off);
  2375. }
  2376. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2377. {
  2378. /* each buffer has header and data */
  2379. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2380. /* calculate total allocation size for 8 buffers */
  2381. info->rx_buf_total_size = info->rx_buf_size * 8;
  2382. /* limit total allocated memory */
  2383. if (info->rx_buf_total_size > 0x10000)
  2384. info->rx_buf_total_size = 0x10000;
  2385. /* calculate number of buffers */
  2386. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2387. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2388. if (info->rx_buf == NULL)
  2389. return -ENOMEM;
  2390. rx_reset_buffers(info);
  2391. return 0;
  2392. }
  2393. static void rx_free_buffers(MGSLPC_INFO *info)
  2394. {
  2395. kfree(info->rx_buf);
  2396. info->rx_buf = NULL;
  2397. }
  2398. static int claim_resources(MGSLPC_INFO *info)
  2399. {
  2400. if (rx_alloc_buffers(info) < 0 ) {
  2401. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2402. release_resources(info);
  2403. return -ENODEV;
  2404. }
  2405. return 0;
  2406. }
  2407. static void release_resources(MGSLPC_INFO *info)
  2408. {
  2409. if (debug_level >= DEBUG_LEVEL_INFO)
  2410. printk("release_resources(%s)\n", info->device_name);
  2411. rx_free_buffers(info);
  2412. }
  2413. /* Add the specified device instance data structure to the
  2414. * global linked list of devices and increment the device count.
  2415. *
  2416. * Arguments: info pointer to device instance data
  2417. */
  2418. static void mgslpc_add_device(MGSLPC_INFO *info)
  2419. {
  2420. info->next_device = NULL;
  2421. info->line = mgslpc_device_count;
  2422. sprintf(info->device_name,"ttySLP%d",info->line);
  2423. if (info->line < MAX_DEVICE_COUNT) {
  2424. if (maxframe[info->line])
  2425. info->max_frame_size = maxframe[info->line];
  2426. info->dosyncppp = dosyncppp[info->line];
  2427. }
  2428. mgslpc_device_count++;
  2429. if (!mgslpc_device_list)
  2430. mgslpc_device_list = info;
  2431. else {
  2432. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2433. while( current_dev->next_device )
  2434. current_dev = current_dev->next_device;
  2435. current_dev->next_device = info;
  2436. }
  2437. if (info->max_frame_size < 4096)
  2438. info->max_frame_size = 4096;
  2439. else if (info->max_frame_size > 65535)
  2440. info->max_frame_size = 65535;
  2441. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2442. info->device_name, info->io_base, info->irq_level);
  2443. #if SYNCLINK_GENERIC_HDLC
  2444. hdlcdev_init(info);
  2445. #endif
  2446. }
  2447. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2448. {
  2449. MGSLPC_INFO *info = mgslpc_device_list;
  2450. MGSLPC_INFO *last = NULL;
  2451. while(info) {
  2452. if (info == remove_info) {
  2453. if (last)
  2454. last->next_device = info->next_device;
  2455. else
  2456. mgslpc_device_list = info->next_device;
  2457. #if SYNCLINK_GENERIC_HDLC
  2458. hdlcdev_exit(info);
  2459. #endif
  2460. release_resources(info);
  2461. kfree(info);
  2462. mgslpc_device_count--;
  2463. return;
  2464. }
  2465. last = info;
  2466. info = info->next_device;
  2467. }
  2468. }
  2469. static struct pcmcia_device_id mgslpc_ids[] = {
  2470. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2471. PCMCIA_DEVICE_NULL
  2472. };
  2473. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2474. static struct pcmcia_driver mgslpc_driver = {
  2475. .owner = THIS_MODULE,
  2476. .drv = {
  2477. .name = "synclink_cs",
  2478. },
  2479. .probe = mgslpc_probe,
  2480. .remove = mgslpc_detach,
  2481. .id_table = mgslpc_ids,
  2482. .suspend = mgslpc_suspend,
  2483. .resume = mgslpc_resume,
  2484. };
  2485. static const struct tty_operations mgslpc_ops = {
  2486. .open = mgslpc_open,
  2487. .close = mgslpc_close,
  2488. .write = mgslpc_write,
  2489. .put_char = mgslpc_put_char,
  2490. .flush_chars = mgslpc_flush_chars,
  2491. .write_room = mgslpc_write_room,
  2492. .chars_in_buffer = mgslpc_chars_in_buffer,
  2493. .flush_buffer = mgslpc_flush_buffer,
  2494. .ioctl = mgslpc_ioctl,
  2495. .throttle = mgslpc_throttle,
  2496. .unthrottle = mgslpc_unthrottle,
  2497. .send_xchar = mgslpc_send_xchar,
  2498. .break_ctl = mgslpc_break,
  2499. .wait_until_sent = mgslpc_wait_until_sent,
  2500. .read_proc = mgslpc_read_proc,
  2501. .set_termios = mgslpc_set_termios,
  2502. .stop = tx_pause,
  2503. .start = tx_release,
  2504. .hangup = mgslpc_hangup,
  2505. .tiocmget = tiocmget,
  2506. .tiocmset = tiocmset,
  2507. };
  2508. static void synclink_cs_cleanup(void)
  2509. {
  2510. int rc;
  2511. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2512. while(mgslpc_device_list)
  2513. mgslpc_remove_device(mgslpc_device_list);
  2514. if (serial_driver) {
  2515. if ((rc = tty_unregister_driver(serial_driver)))
  2516. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2517. __FILE__,__LINE__,rc);
  2518. put_tty_driver(serial_driver);
  2519. }
  2520. pcmcia_unregister_driver(&mgslpc_driver);
  2521. }
  2522. static int __init synclink_cs_init(void)
  2523. {
  2524. int rc;
  2525. if (break_on_load) {
  2526. mgslpc_get_text_ptr();
  2527. BREAKPOINT();
  2528. }
  2529. printk("%s %s\n", driver_name, driver_version);
  2530. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2531. return rc;
  2532. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2533. if (!serial_driver) {
  2534. rc = -ENOMEM;
  2535. goto error;
  2536. }
  2537. /* Initialize the tty_driver structure */
  2538. serial_driver->owner = THIS_MODULE;
  2539. serial_driver->driver_name = "synclink_cs";
  2540. serial_driver->name = "ttySLP";
  2541. serial_driver->major = ttymajor;
  2542. serial_driver->minor_start = 64;
  2543. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2544. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2545. serial_driver->init_termios = tty_std_termios;
  2546. serial_driver->init_termios.c_cflag =
  2547. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2548. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2549. tty_set_operations(serial_driver, &mgslpc_ops);
  2550. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2551. printk("%s(%d):Couldn't register serial driver\n",
  2552. __FILE__,__LINE__);
  2553. put_tty_driver(serial_driver);
  2554. serial_driver = NULL;
  2555. goto error;
  2556. }
  2557. printk("%s %s, tty major#%d\n",
  2558. driver_name, driver_version,
  2559. serial_driver->major);
  2560. return 0;
  2561. error:
  2562. synclink_cs_cleanup();
  2563. return rc;
  2564. }
  2565. static void __exit synclink_cs_exit(void)
  2566. {
  2567. synclink_cs_cleanup();
  2568. }
  2569. module_init(synclink_cs_init);
  2570. module_exit(synclink_cs_exit);
  2571. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2572. {
  2573. unsigned int M, N;
  2574. unsigned char val;
  2575. /* note:standard BRG mode is broken in V3.2 chip
  2576. * so enhanced mode is always used
  2577. */
  2578. if (rate) {
  2579. N = 3686400 / rate;
  2580. if (!N)
  2581. N = 1;
  2582. N >>= 1;
  2583. for (M = 1; N > 64 && M < 16; M++)
  2584. N >>= 1;
  2585. N--;
  2586. /* BGR[5..0] = N
  2587. * BGR[9..6] = M
  2588. * BGR[7..0] contained in BGR register
  2589. * BGR[9..8] contained in CCR2[7..6]
  2590. * divisor = (N+1)*2^M
  2591. *
  2592. * Note: M *must* not be zero (causes asymetric duty cycle)
  2593. */
  2594. write_reg(info, (unsigned char) (channel + BGR),
  2595. (unsigned char) ((M << 6) + N));
  2596. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2597. val |= ((M << 4) & 0xc0);
  2598. write_reg(info, (unsigned char) (channel + CCR2), val);
  2599. }
  2600. }
  2601. /* Enabled the AUX clock output at the specified frequency.
  2602. */
  2603. static void enable_auxclk(MGSLPC_INFO *info)
  2604. {
  2605. unsigned char val;
  2606. /* MODE
  2607. *
  2608. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2609. * 05 ADM Address Mode, 0 = no addr recognition
  2610. * 04 TMD Timer Mode, 0 = external
  2611. * 03 RAC Receiver Active, 0 = inactive
  2612. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2613. * 01 TRS Timer Resolution, 1=512
  2614. * 00 TLP Test Loop, 0 = no loop
  2615. *
  2616. * 1000 0010
  2617. */
  2618. val = 0x82;
  2619. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2620. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2621. val |= BIT2;
  2622. write_reg(info, CHB + MODE, val);
  2623. /* CCR0
  2624. *
  2625. * 07 PU Power Up, 1=active, 0=power down
  2626. * 06 MCE Master Clock Enable, 1=enabled
  2627. * 05 Reserved, 0
  2628. * 04..02 SC[2..0] Encoding
  2629. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2630. *
  2631. * 11000000
  2632. */
  2633. write_reg(info, CHB + CCR0, 0xc0);
  2634. /* CCR1
  2635. *
  2636. * 07 SFLG Shared Flag, 0 = disable shared flags
  2637. * 06 GALP Go Active On Loop, 0 = not used
  2638. * 05 GLP Go On Loop, 0 = not used
  2639. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2640. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2641. * 02..00 CM[2..0] Clock Mode
  2642. *
  2643. * 0001 0111
  2644. */
  2645. write_reg(info, CHB + CCR1, 0x17);
  2646. /* CCR2 (Channel B)
  2647. *
  2648. * 07..06 BGR[9..8] Baud rate bits 9..8
  2649. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2650. * 04 SSEL Clock source select, 1=submode b
  2651. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2652. * 02 RWX Read/Write Exchange 0=disabled
  2653. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2654. * 00 DIV, data inversion 0=disabled, 1=enabled
  2655. *
  2656. * 0011 1000
  2657. */
  2658. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2659. write_reg(info, CHB + CCR2, 0x38);
  2660. else
  2661. write_reg(info, CHB + CCR2, 0x30);
  2662. /* CCR4
  2663. *
  2664. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2665. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2666. * 05 TST1 Test Pin, 0=normal operation
  2667. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2668. * 03..02 Reserved, must be 0
  2669. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2670. *
  2671. * 0101 0000
  2672. */
  2673. write_reg(info, CHB + CCR4, 0x50);
  2674. /* if auxclk not enabled, set internal BRG so
  2675. * CTS transitions can be detected (requires TxC)
  2676. */
  2677. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2678. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2679. else
  2680. mgslpc_set_rate(info, CHB, 921600);
  2681. }
  2682. static void loopback_enable(MGSLPC_INFO *info)
  2683. {
  2684. unsigned char val;
  2685. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2686. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2687. write_reg(info, CHA + CCR1, val);
  2688. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2689. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2690. write_reg(info, CHA + CCR2, val);
  2691. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2692. if (info->params.clock_speed)
  2693. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2694. else
  2695. mgslpc_set_rate(info, CHA, 1843200);
  2696. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2697. val = read_reg(info, CHA + MODE) | BIT0;
  2698. write_reg(info, CHA + MODE, val);
  2699. }
  2700. static void hdlc_mode(MGSLPC_INFO *info)
  2701. {
  2702. unsigned char val;
  2703. unsigned char clkmode, clksubmode;
  2704. /* disable all interrupts */
  2705. irq_disable(info, CHA, 0xffff);
  2706. irq_disable(info, CHB, 0xffff);
  2707. port_irq_disable(info, 0xff);
  2708. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2709. clkmode = clksubmode = 0;
  2710. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2711. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2712. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2713. clkmode = 7;
  2714. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2715. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2716. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2717. clkmode = 7;
  2718. clksubmode = 1;
  2719. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2720. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2721. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2722. clkmode = 6;
  2723. clksubmode = 1;
  2724. } else {
  2725. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2726. clkmode = 6;
  2727. }
  2728. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2729. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2730. clksubmode = 1;
  2731. }
  2732. /* MODE
  2733. *
  2734. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2735. * 05 ADM Address Mode, 0 = no addr recognition
  2736. * 04 TMD Timer Mode, 0 = external
  2737. * 03 RAC Receiver Active, 0 = inactive
  2738. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2739. * 01 TRS Timer Resolution, 1=512
  2740. * 00 TLP Test Loop, 0 = no loop
  2741. *
  2742. * 1000 0010
  2743. */
  2744. val = 0x82;
  2745. if (info->params.loopback)
  2746. val |= BIT0;
  2747. /* preserve RTS state */
  2748. if (info->serial_signals & SerialSignal_RTS)
  2749. val |= BIT2;
  2750. write_reg(info, CHA + MODE, val);
  2751. /* CCR0
  2752. *
  2753. * 07 PU Power Up, 1=active, 0=power down
  2754. * 06 MCE Master Clock Enable, 1=enabled
  2755. * 05 Reserved, 0
  2756. * 04..02 SC[2..0] Encoding
  2757. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2758. *
  2759. * 11000000
  2760. */
  2761. val = 0xc0;
  2762. switch (info->params.encoding)
  2763. {
  2764. case HDLC_ENCODING_NRZI:
  2765. val |= BIT3;
  2766. break;
  2767. case HDLC_ENCODING_BIPHASE_SPACE:
  2768. val |= BIT4;
  2769. break; // FM0
  2770. case HDLC_ENCODING_BIPHASE_MARK:
  2771. val |= BIT4 + BIT2;
  2772. break; // FM1
  2773. case HDLC_ENCODING_BIPHASE_LEVEL:
  2774. val |= BIT4 + BIT3;
  2775. break; // Manchester
  2776. }
  2777. write_reg(info, CHA + CCR0, val);
  2778. /* CCR1
  2779. *
  2780. * 07 SFLG Shared Flag, 0 = disable shared flags
  2781. * 06 GALP Go Active On Loop, 0 = not used
  2782. * 05 GLP Go On Loop, 0 = not used
  2783. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2784. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2785. * 02..00 CM[2..0] Clock Mode
  2786. *
  2787. * 0001 0000
  2788. */
  2789. val = 0x10 + clkmode;
  2790. write_reg(info, CHA + CCR1, val);
  2791. /* CCR2
  2792. *
  2793. * 07..06 BGR[9..8] Baud rate bits 9..8
  2794. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2795. * 04 SSEL Clock source select, 1=submode b
  2796. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2797. * 02 RWX Read/Write Exchange 0=disabled
  2798. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2799. * 00 DIV, data inversion 0=disabled, 1=enabled
  2800. *
  2801. * 0000 0000
  2802. */
  2803. val = 0x00;
  2804. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2805. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2806. val |= BIT5;
  2807. if (clksubmode)
  2808. val |= BIT4;
  2809. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2810. val |= BIT1;
  2811. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2812. val |= BIT0;
  2813. write_reg(info, CHA + CCR2, val);
  2814. /* CCR3
  2815. *
  2816. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2817. * 05 EPT Enable preamble transmission, 1=enabled
  2818. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2819. * 03 CRL CRC Reset Level, 0=FFFF
  2820. * 02 RCRC Rx CRC 0=On 1=Off
  2821. * 01 TCRC Tx CRC 0=On 1=Off
  2822. * 00 PSD DPLL Phase Shift Disable
  2823. *
  2824. * 0000 0000
  2825. */
  2826. val = 0x00;
  2827. if (info->params.crc_type == HDLC_CRC_NONE)
  2828. val |= BIT2 + BIT1;
  2829. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2830. val |= BIT5;
  2831. switch (info->params.preamble_length)
  2832. {
  2833. case HDLC_PREAMBLE_LENGTH_16BITS:
  2834. val |= BIT6;
  2835. break;
  2836. case HDLC_PREAMBLE_LENGTH_32BITS:
  2837. val |= BIT6;
  2838. break;
  2839. case HDLC_PREAMBLE_LENGTH_64BITS:
  2840. val |= BIT7 + BIT6;
  2841. break;
  2842. }
  2843. write_reg(info, CHA + CCR3, val);
  2844. /* PRE - Preamble pattern */
  2845. val = 0;
  2846. switch (info->params.preamble)
  2847. {
  2848. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2849. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2850. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2851. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2852. }
  2853. write_reg(info, CHA + PRE, val);
  2854. /* CCR4
  2855. *
  2856. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2857. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2858. * 05 TST1 Test Pin, 0=normal operation
  2859. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2860. * 03..02 Reserved, must be 0
  2861. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2862. *
  2863. * 0101 0000
  2864. */
  2865. val = 0x50;
  2866. write_reg(info, CHA + CCR4, val);
  2867. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2868. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2869. else
  2870. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2871. /* RLCR Receive length check register
  2872. *
  2873. * 7 1=enable receive length check
  2874. * 6..0 Max frame length = (RL + 1) * 32
  2875. */
  2876. write_reg(info, CHA + RLCR, 0);
  2877. /* XBCH Transmit Byte Count High
  2878. *
  2879. * 07 DMA mode, 0 = interrupt driven
  2880. * 06 NRM, 0=ABM (ignored)
  2881. * 05 CAS Carrier Auto Start
  2882. * 04 XC Transmit Continuously (ignored)
  2883. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2884. *
  2885. * 0000 0000
  2886. */
  2887. val = 0x00;
  2888. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2889. val |= BIT5;
  2890. write_reg(info, CHA + XBCH, val);
  2891. enable_auxclk(info);
  2892. if (info->params.loopback || info->testing_irq)
  2893. loopback_enable(info);
  2894. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2895. {
  2896. irq_enable(info, CHB, IRQ_CTS);
  2897. /* PVR[3] 1=AUTO CTS active */
  2898. set_reg_bits(info, CHA + PVR, BIT3);
  2899. } else
  2900. clear_reg_bits(info, CHA + PVR, BIT3);
  2901. irq_enable(info, CHA,
  2902. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2903. IRQ_UNDERRUN + IRQ_TXFIFO);
  2904. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2905. wait_command_complete(info, CHA);
  2906. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2907. /* Master clock mode enabled above to allow reset commands
  2908. * to complete even if no data clocks are present.
  2909. *
  2910. * Disable master clock mode for normal communications because
  2911. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2912. * IRQ when in master clock mode.
  2913. *
  2914. * Leave master clock mode enabled for IRQ test because the
  2915. * timer IRQ used by the test can only happen in master clock mode.
  2916. */
  2917. if (!info->testing_irq)
  2918. clear_reg_bits(info, CHA + CCR0, BIT6);
  2919. tx_set_idle(info);
  2920. tx_stop(info);
  2921. rx_stop(info);
  2922. }
  2923. static void rx_stop(MGSLPC_INFO *info)
  2924. {
  2925. if (debug_level >= DEBUG_LEVEL_ISR)
  2926. printk("%s(%d):rx_stop(%s)\n",
  2927. __FILE__,__LINE__, info->device_name );
  2928. /* MODE:03 RAC Receiver Active, 0=inactive */
  2929. clear_reg_bits(info, CHA + MODE, BIT3);
  2930. info->rx_enabled = false;
  2931. info->rx_overflow = false;
  2932. }
  2933. static void rx_start(MGSLPC_INFO *info)
  2934. {
  2935. if (debug_level >= DEBUG_LEVEL_ISR)
  2936. printk("%s(%d):rx_start(%s)\n",
  2937. __FILE__,__LINE__, info->device_name );
  2938. rx_reset_buffers(info);
  2939. info->rx_enabled = false;
  2940. info->rx_overflow = false;
  2941. /* MODE:03 RAC Receiver Active, 1=active */
  2942. set_reg_bits(info, CHA + MODE, BIT3);
  2943. info->rx_enabled = true;
  2944. }
  2945. static void tx_start(MGSLPC_INFO *info)
  2946. {
  2947. if (debug_level >= DEBUG_LEVEL_ISR)
  2948. printk("%s(%d):tx_start(%s)\n",
  2949. __FILE__,__LINE__, info->device_name );
  2950. if (info->tx_count) {
  2951. /* If auto RTS enabled and RTS is inactive, then assert */
  2952. /* RTS and set a flag indicating that the driver should */
  2953. /* negate RTS when the transmission completes. */
  2954. info->drop_rts_on_tx_done = false;
  2955. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2956. get_signals(info);
  2957. if (!(info->serial_signals & SerialSignal_RTS)) {
  2958. info->serial_signals |= SerialSignal_RTS;
  2959. set_signals(info);
  2960. info->drop_rts_on_tx_done = true;
  2961. }
  2962. }
  2963. if (info->params.mode == MGSL_MODE_ASYNC) {
  2964. if (!info->tx_active) {
  2965. info->tx_active = true;
  2966. tx_ready(info);
  2967. }
  2968. } else {
  2969. info->tx_active = true;
  2970. tx_ready(info);
  2971. mod_timer(&info->tx_timer, jiffies +
  2972. msecs_to_jiffies(5000));
  2973. }
  2974. }
  2975. if (!info->tx_enabled)
  2976. info->tx_enabled = true;
  2977. }
  2978. static void tx_stop(MGSLPC_INFO *info)
  2979. {
  2980. if (debug_level >= DEBUG_LEVEL_ISR)
  2981. printk("%s(%d):tx_stop(%s)\n",
  2982. __FILE__,__LINE__, info->device_name );
  2983. del_timer(&info->tx_timer);
  2984. info->tx_enabled = false;
  2985. info->tx_active = false;
  2986. }
  2987. /* Reset the adapter to a known state and prepare it for further use.
  2988. */
  2989. static void reset_device(MGSLPC_INFO *info)
  2990. {
  2991. /* power up both channels (set BIT7) */
  2992. write_reg(info, CHA + CCR0, 0x80);
  2993. write_reg(info, CHB + CCR0, 0x80);
  2994. write_reg(info, CHA + MODE, 0);
  2995. write_reg(info, CHB + MODE, 0);
  2996. /* disable all interrupts */
  2997. irq_disable(info, CHA, 0xffff);
  2998. irq_disable(info, CHB, 0xffff);
  2999. port_irq_disable(info, 0xff);
  3000. /* PCR Port Configuration Register
  3001. *
  3002. * 07..04 DEC[3..0] Serial I/F select outputs
  3003. * 03 output, 1=AUTO CTS control enabled
  3004. * 02 RI Ring Indicator input 0=active
  3005. * 01 DSR input 0=active
  3006. * 00 DTR output 0=active
  3007. *
  3008. * 0000 0110
  3009. */
  3010. write_reg(info, PCR, 0x06);
  3011. /* PVR Port Value Register
  3012. *
  3013. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3014. * 03 AUTO CTS output 1=enabled
  3015. * 02 RI Ring Indicator input
  3016. * 01 DSR input
  3017. * 00 DTR output (1=inactive)
  3018. *
  3019. * 0000 0001
  3020. */
  3021. // write_reg(info, PVR, PVR_DTR);
  3022. /* IPC Interrupt Port Configuration
  3023. *
  3024. * 07 VIS 1=Masked interrupts visible
  3025. * 06..05 Reserved, 0
  3026. * 04..03 SLA Slave address, 00 ignored
  3027. * 02 CASM Cascading Mode, 1=daisy chain
  3028. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3029. *
  3030. * 0000 0101
  3031. */
  3032. write_reg(info, IPC, 0x05);
  3033. }
  3034. static void async_mode(MGSLPC_INFO *info)
  3035. {
  3036. unsigned char val;
  3037. /* disable all interrupts */
  3038. irq_disable(info, CHA, 0xffff);
  3039. irq_disable(info, CHB, 0xffff);
  3040. port_irq_disable(info, 0xff);
  3041. /* MODE
  3042. *
  3043. * 07 Reserved, 0
  3044. * 06 FRTS RTS State, 0=active
  3045. * 05 FCTS Flow Control on CTS
  3046. * 04 FLON Flow Control Enable
  3047. * 03 RAC Receiver Active, 0 = inactive
  3048. * 02 RTS 0=Auto RTS, 1=manual RTS
  3049. * 01 TRS Timer Resolution, 1=512
  3050. * 00 TLP Test Loop, 0 = no loop
  3051. *
  3052. * 0000 0110
  3053. */
  3054. val = 0x06;
  3055. if (info->params.loopback)
  3056. val |= BIT0;
  3057. /* preserve RTS state */
  3058. if (!(info->serial_signals & SerialSignal_RTS))
  3059. val |= BIT6;
  3060. write_reg(info, CHA + MODE, val);
  3061. /* CCR0
  3062. *
  3063. * 07 PU Power Up, 1=active, 0=power down
  3064. * 06 MCE Master Clock Enable, 1=enabled
  3065. * 05 Reserved, 0
  3066. * 04..02 SC[2..0] Encoding, 000=NRZ
  3067. * 01..00 SM[1..0] Serial Mode, 11=Async
  3068. *
  3069. * 1000 0011
  3070. */
  3071. write_reg(info, CHA + CCR0, 0x83);
  3072. /* CCR1
  3073. *
  3074. * 07..05 Reserved, 0
  3075. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3076. * 03 BCR Bit Clock Rate, 1=16x
  3077. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3078. *
  3079. * 0001 1111
  3080. */
  3081. write_reg(info, CHA + CCR1, 0x1f);
  3082. /* CCR2 (channel A)
  3083. *
  3084. * 07..06 BGR[9..8] Baud rate bits 9..8
  3085. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3086. * 04 SSEL Clock source select, 1=submode b
  3087. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3088. * 02 RWX Read/Write Exchange 0=disabled
  3089. * 01 Reserved, 0
  3090. * 00 DIV, data inversion 0=disabled, 1=enabled
  3091. *
  3092. * 0001 0000
  3093. */
  3094. write_reg(info, CHA + CCR2, 0x10);
  3095. /* CCR3
  3096. *
  3097. * 07..01 Reserved, 0
  3098. * 00 PSD DPLL Phase Shift Disable
  3099. *
  3100. * 0000 0000
  3101. */
  3102. write_reg(info, CHA + CCR3, 0);
  3103. /* CCR4
  3104. *
  3105. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3106. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3107. * 05 TST1 Test Pin, 0=normal operation
  3108. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3109. * 03..00 Reserved, must be 0
  3110. *
  3111. * 0101 0000
  3112. */
  3113. write_reg(info, CHA + CCR4, 0x50);
  3114. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3115. /* DAFO Data Format
  3116. *
  3117. * 07 Reserved, 0
  3118. * 06 XBRK transmit break, 0=normal operation
  3119. * 05 Stop bits (0=1, 1=2)
  3120. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3121. * 02 PAREN Parity Enable
  3122. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3123. *
  3124. */
  3125. val = 0x00;
  3126. if (info->params.data_bits != 8)
  3127. val |= BIT0; /* 7 bits */
  3128. if (info->params.stop_bits != 1)
  3129. val |= BIT5;
  3130. if (info->params.parity != ASYNC_PARITY_NONE)
  3131. {
  3132. val |= BIT2; /* Parity enable */
  3133. if (info->params.parity == ASYNC_PARITY_ODD)
  3134. val |= BIT3;
  3135. else
  3136. val |= BIT4;
  3137. }
  3138. write_reg(info, CHA + DAFO, val);
  3139. /* RFC Rx FIFO Control
  3140. *
  3141. * 07 Reserved, 0
  3142. * 06 DPS, 1=parity bit not stored in data byte
  3143. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3144. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3145. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3146. * 01 Reserved, 0
  3147. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3148. *
  3149. * 0101 1100
  3150. */
  3151. write_reg(info, CHA + RFC, 0x5c);
  3152. /* RLCR Receive length check register
  3153. *
  3154. * Max frame length = (RL + 1) * 32
  3155. */
  3156. write_reg(info, CHA + RLCR, 0);
  3157. /* XBCH Transmit Byte Count High
  3158. *
  3159. * 07 DMA mode, 0 = interrupt driven
  3160. * 06 NRM, 0=ABM (ignored)
  3161. * 05 CAS Carrier Auto Start
  3162. * 04 XC Transmit Continuously (ignored)
  3163. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3164. *
  3165. * 0000 0000
  3166. */
  3167. val = 0x00;
  3168. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3169. val |= BIT5;
  3170. write_reg(info, CHA + XBCH, val);
  3171. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3172. irq_enable(info, CHA, IRQ_CTS);
  3173. /* MODE:03 RAC Receiver Active, 1=active */
  3174. set_reg_bits(info, CHA + MODE, BIT3);
  3175. enable_auxclk(info);
  3176. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3177. irq_enable(info, CHB, IRQ_CTS);
  3178. /* PVR[3] 1=AUTO CTS active */
  3179. set_reg_bits(info, CHA + PVR, BIT3);
  3180. } else
  3181. clear_reg_bits(info, CHA + PVR, BIT3);
  3182. irq_enable(info, CHA,
  3183. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3184. IRQ_ALLSENT + IRQ_TXFIFO);
  3185. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3186. wait_command_complete(info, CHA);
  3187. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3188. }
  3189. /* Set the HDLC idle mode for the transmitter.
  3190. */
  3191. static void tx_set_idle(MGSLPC_INFO *info)
  3192. {
  3193. /* Note: ESCC2 only supports flags and one idle modes */
  3194. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3195. set_reg_bits(info, CHA + CCR1, BIT3);
  3196. else
  3197. clear_reg_bits(info, CHA + CCR1, BIT3);
  3198. }
  3199. /* get state of the V24 status (input) signals.
  3200. */
  3201. static void get_signals(MGSLPC_INFO *info)
  3202. {
  3203. unsigned char status = 0;
  3204. /* preserve DTR and RTS */
  3205. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3206. if (read_reg(info, CHB + VSTR) & BIT7)
  3207. info->serial_signals |= SerialSignal_DCD;
  3208. if (read_reg(info, CHB + STAR) & BIT1)
  3209. info->serial_signals |= SerialSignal_CTS;
  3210. status = read_reg(info, CHA + PVR);
  3211. if (!(status & PVR_RI))
  3212. info->serial_signals |= SerialSignal_RI;
  3213. if (!(status & PVR_DSR))
  3214. info->serial_signals |= SerialSignal_DSR;
  3215. }
  3216. /* Set the state of DTR and RTS based on contents of
  3217. * serial_signals member of device extension.
  3218. */
  3219. static void set_signals(MGSLPC_INFO *info)
  3220. {
  3221. unsigned char val;
  3222. val = read_reg(info, CHA + MODE);
  3223. if (info->params.mode == MGSL_MODE_ASYNC) {
  3224. if (info->serial_signals & SerialSignal_RTS)
  3225. val &= ~BIT6;
  3226. else
  3227. val |= BIT6;
  3228. } else {
  3229. if (info->serial_signals & SerialSignal_RTS)
  3230. val |= BIT2;
  3231. else
  3232. val &= ~BIT2;
  3233. }
  3234. write_reg(info, CHA + MODE, val);
  3235. if (info->serial_signals & SerialSignal_DTR)
  3236. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3237. else
  3238. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3239. }
  3240. static void rx_reset_buffers(MGSLPC_INFO *info)
  3241. {
  3242. RXBUF *buf;
  3243. int i;
  3244. info->rx_put = 0;
  3245. info->rx_get = 0;
  3246. info->rx_frame_count = 0;
  3247. for (i=0 ; i < info->rx_buf_count ; i++) {
  3248. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3249. buf->status = buf->count = 0;
  3250. }
  3251. }
  3252. /* Attempt to return a received HDLC frame
  3253. * Only frames received without errors are returned.
  3254. *
  3255. * Returns true if frame returned, otherwise false
  3256. */
  3257. static bool rx_get_frame(MGSLPC_INFO *info)
  3258. {
  3259. unsigned short status;
  3260. RXBUF *buf;
  3261. unsigned int framesize = 0;
  3262. unsigned long flags;
  3263. struct tty_struct *tty = info->tty;
  3264. bool return_frame = false;
  3265. if (info->rx_frame_count == 0)
  3266. return false;
  3267. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3268. status = buf->status;
  3269. /* 07 VFR 1=valid frame
  3270. * 06 RDO 1=data overrun
  3271. * 05 CRC 1=OK, 0=error
  3272. * 04 RAB 1=frame aborted
  3273. */
  3274. if ((status & 0xf0) != 0xA0) {
  3275. if (!(status & BIT7) || (status & BIT4))
  3276. info->icount.rxabort++;
  3277. else if (status & BIT6)
  3278. info->icount.rxover++;
  3279. else if (!(status & BIT5)) {
  3280. info->icount.rxcrc++;
  3281. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3282. return_frame = true;
  3283. }
  3284. framesize = 0;
  3285. #if SYNCLINK_GENERIC_HDLC
  3286. {
  3287. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3288. stats->rx_errors++;
  3289. stats->rx_frame_errors++;
  3290. }
  3291. #endif
  3292. } else
  3293. return_frame = true;
  3294. if (return_frame)
  3295. framesize = buf->count;
  3296. if (debug_level >= DEBUG_LEVEL_BH)
  3297. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3298. __FILE__,__LINE__,info->device_name,status,framesize);
  3299. if (debug_level >= DEBUG_LEVEL_DATA)
  3300. trace_block(info, buf->data, framesize, 0);
  3301. if (framesize) {
  3302. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3303. framesize+1 > info->max_frame_size) ||
  3304. framesize > info->max_frame_size)
  3305. info->icount.rxlong++;
  3306. else {
  3307. if (status & BIT5)
  3308. info->icount.rxok++;
  3309. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3310. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3311. ++framesize;
  3312. }
  3313. #if SYNCLINK_GENERIC_HDLC
  3314. if (info->netcount)
  3315. hdlcdev_rx(info, buf->data, framesize);
  3316. else
  3317. #endif
  3318. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3319. }
  3320. }
  3321. spin_lock_irqsave(&info->lock,flags);
  3322. buf->status = buf->count = 0;
  3323. info->rx_frame_count--;
  3324. info->rx_get++;
  3325. if (info->rx_get >= info->rx_buf_count)
  3326. info->rx_get = 0;
  3327. spin_unlock_irqrestore(&info->lock,flags);
  3328. return true;
  3329. }
  3330. static bool register_test(MGSLPC_INFO *info)
  3331. {
  3332. static unsigned char patterns[] =
  3333. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3334. static unsigned int count = ARRAY_SIZE(patterns);
  3335. unsigned int i;
  3336. bool rc = true;
  3337. unsigned long flags;
  3338. spin_lock_irqsave(&info->lock,flags);
  3339. reset_device(info);
  3340. for (i = 0; i < count; i++) {
  3341. write_reg(info, XAD1, patterns[i]);
  3342. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3343. if ((read_reg(info, XAD1) != patterns[i]) ||
  3344. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3345. rc = false;
  3346. break;
  3347. }
  3348. }
  3349. spin_unlock_irqrestore(&info->lock,flags);
  3350. return rc;
  3351. }
  3352. static bool irq_test(MGSLPC_INFO *info)
  3353. {
  3354. unsigned long end_time;
  3355. unsigned long flags;
  3356. spin_lock_irqsave(&info->lock,flags);
  3357. reset_device(info);
  3358. info->testing_irq = true;
  3359. hdlc_mode(info);
  3360. info->irq_occurred = false;
  3361. /* init hdlc mode */
  3362. irq_enable(info, CHA, IRQ_TIMER);
  3363. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3364. issue_command(info, CHA, CMD_START_TIMER);
  3365. spin_unlock_irqrestore(&info->lock,flags);
  3366. end_time=100;
  3367. while(end_time-- && !info->irq_occurred) {
  3368. msleep_interruptible(10);
  3369. }
  3370. info->testing_irq = false;
  3371. spin_lock_irqsave(&info->lock,flags);
  3372. reset_device(info);
  3373. spin_unlock_irqrestore(&info->lock,flags);
  3374. return info->irq_occurred;
  3375. }
  3376. static int adapter_test(MGSLPC_INFO *info)
  3377. {
  3378. if (!register_test(info)) {
  3379. info->init_error = DiagStatus_AddressFailure;
  3380. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3381. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3382. return -ENODEV;
  3383. }
  3384. if (!irq_test(info)) {
  3385. info->init_error = DiagStatus_IrqFailure;
  3386. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3387. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3388. return -ENODEV;
  3389. }
  3390. if (debug_level >= DEBUG_LEVEL_INFO)
  3391. printk("%s(%d):device %s passed diagnostics\n",
  3392. __FILE__,__LINE__,info->device_name);
  3393. return 0;
  3394. }
  3395. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3396. {
  3397. int i;
  3398. int linecount;
  3399. if (xmit)
  3400. printk("%s tx data:\n",info->device_name);
  3401. else
  3402. printk("%s rx data:\n",info->device_name);
  3403. while(count) {
  3404. if (count > 16)
  3405. linecount = 16;
  3406. else
  3407. linecount = count;
  3408. for(i=0;i<linecount;i++)
  3409. printk("%02X ",(unsigned char)data[i]);
  3410. for(;i<17;i++)
  3411. printk(" ");
  3412. for(i=0;i<linecount;i++) {
  3413. if (data[i]>=040 && data[i]<=0176)
  3414. printk("%c",data[i]);
  3415. else
  3416. printk(".");
  3417. }
  3418. printk("\n");
  3419. data += linecount;
  3420. count -= linecount;
  3421. }
  3422. }
  3423. /* HDLC frame time out
  3424. * update stats and do tx completion processing
  3425. */
  3426. static void tx_timeout(unsigned long context)
  3427. {
  3428. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3429. unsigned long flags;
  3430. if ( debug_level >= DEBUG_LEVEL_INFO )
  3431. printk( "%s(%d):tx_timeout(%s)\n",
  3432. __FILE__,__LINE__,info->device_name);
  3433. if(info->tx_active &&
  3434. info->params.mode == MGSL_MODE_HDLC) {
  3435. info->icount.txtimeout++;
  3436. }
  3437. spin_lock_irqsave(&info->lock,flags);
  3438. info->tx_active = false;
  3439. info->tx_count = info->tx_put = info->tx_get = 0;
  3440. spin_unlock_irqrestore(&info->lock,flags);
  3441. #if SYNCLINK_GENERIC_HDLC
  3442. if (info->netcount)
  3443. hdlcdev_tx_done(info);
  3444. else
  3445. #endif
  3446. bh_transmit(info);
  3447. }
  3448. #if SYNCLINK_GENERIC_HDLC
  3449. /**
  3450. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3451. * set encoding and frame check sequence (FCS) options
  3452. *
  3453. * dev pointer to network device structure
  3454. * encoding serial encoding setting
  3455. * parity FCS setting
  3456. *
  3457. * returns 0 if success, otherwise error code
  3458. */
  3459. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3460. unsigned short parity)
  3461. {
  3462. MGSLPC_INFO *info = dev_to_port(dev);
  3463. unsigned char new_encoding;
  3464. unsigned short new_crctype;
  3465. /* return error if TTY interface open */
  3466. if (info->count)
  3467. return -EBUSY;
  3468. switch (encoding)
  3469. {
  3470. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3471. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3472. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3473. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3474. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3475. default: return -EINVAL;
  3476. }
  3477. switch (parity)
  3478. {
  3479. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3480. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3481. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3482. default: return -EINVAL;
  3483. }
  3484. info->params.encoding = new_encoding;
  3485. info->params.crc_type = new_crctype;
  3486. /* if network interface up, reprogram hardware */
  3487. if (info->netcount)
  3488. mgslpc_program_hw(info);
  3489. return 0;
  3490. }
  3491. /**
  3492. * called by generic HDLC layer to send frame
  3493. *
  3494. * skb socket buffer containing HDLC frame
  3495. * dev pointer to network device structure
  3496. *
  3497. * returns 0 if success, otherwise error code
  3498. */
  3499. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3500. {
  3501. MGSLPC_INFO *info = dev_to_port(dev);
  3502. struct net_device_stats *stats = hdlc_stats(dev);
  3503. unsigned long flags;
  3504. if (debug_level >= DEBUG_LEVEL_INFO)
  3505. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3506. /* stop sending until this frame completes */
  3507. netif_stop_queue(dev);
  3508. /* copy data to device buffers */
  3509. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3510. info->tx_get = 0;
  3511. info->tx_put = info->tx_count = skb->len;
  3512. /* update network statistics */
  3513. stats->tx_packets++;
  3514. stats->tx_bytes += skb->len;
  3515. /* done with socket buffer, so free it */
  3516. dev_kfree_skb(skb);
  3517. /* save start time for transmit timeout detection */
  3518. dev->trans_start = jiffies;
  3519. /* start hardware transmitter if necessary */
  3520. spin_lock_irqsave(&info->lock,flags);
  3521. if (!info->tx_active)
  3522. tx_start(info);
  3523. spin_unlock_irqrestore(&info->lock,flags);
  3524. return 0;
  3525. }
  3526. /**
  3527. * called by network layer when interface enabled
  3528. * claim resources and initialize hardware
  3529. *
  3530. * dev pointer to network device structure
  3531. *
  3532. * returns 0 if success, otherwise error code
  3533. */
  3534. static int hdlcdev_open(struct net_device *dev)
  3535. {
  3536. MGSLPC_INFO *info = dev_to_port(dev);
  3537. int rc;
  3538. unsigned long flags;
  3539. if (debug_level >= DEBUG_LEVEL_INFO)
  3540. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3541. /* generic HDLC layer open processing */
  3542. if ((rc = hdlc_open(dev)))
  3543. return rc;
  3544. /* arbitrate between network and tty opens */
  3545. spin_lock_irqsave(&info->netlock, flags);
  3546. if (info->count != 0 || info->netcount != 0) {
  3547. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3548. spin_unlock_irqrestore(&info->netlock, flags);
  3549. return -EBUSY;
  3550. }
  3551. info->netcount=1;
  3552. spin_unlock_irqrestore(&info->netlock, flags);
  3553. /* claim resources and init adapter */
  3554. if ((rc = startup(info)) != 0) {
  3555. spin_lock_irqsave(&info->netlock, flags);
  3556. info->netcount=0;
  3557. spin_unlock_irqrestore(&info->netlock, flags);
  3558. return rc;
  3559. }
  3560. /* assert DTR and RTS, apply hardware settings */
  3561. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3562. mgslpc_program_hw(info);
  3563. /* enable network layer transmit */
  3564. dev->trans_start = jiffies;
  3565. netif_start_queue(dev);
  3566. /* inform generic HDLC layer of current DCD status */
  3567. spin_lock_irqsave(&info->lock, flags);
  3568. get_signals(info);
  3569. spin_unlock_irqrestore(&info->lock, flags);
  3570. if (info->serial_signals & SerialSignal_DCD)
  3571. netif_carrier_on(dev);
  3572. else
  3573. netif_carrier_off(dev);
  3574. return 0;
  3575. }
  3576. /**
  3577. * called by network layer when interface is disabled
  3578. * shutdown hardware and release resources
  3579. *
  3580. * dev pointer to network device structure
  3581. *
  3582. * returns 0 if success, otherwise error code
  3583. */
  3584. static int hdlcdev_close(struct net_device *dev)
  3585. {
  3586. MGSLPC_INFO *info = dev_to_port(dev);
  3587. unsigned long flags;
  3588. if (debug_level >= DEBUG_LEVEL_INFO)
  3589. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3590. netif_stop_queue(dev);
  3591. /* shutdown adapter and release resources */
  3592. shutdown(info);
  3593. hdlc_close(dev);
  3594. spin_lock_irqsave(&info->netlock, flags);
  3595. info->netcount=0;
  3596. spin_unlock_irqrestore(&info->netlock, flags);
  3597. return 0;
  3598. }
  3599. /**
  3600. * called by network layer to process IOCTL call to network device
  3601. *
  3602. * dev pointer to network device structure
  3603. * ifr pointer to network interface request structure
  3604. * cmd IOCTL command code
  3605. *
  3606. * returns 0 if success, otherwise error code
  3607. */
  3608. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3609. {
  3610. const size_t size = sizeof(sync_serial_settings);
  3611. sync_serial_settings new_line;
  3612. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3613. MGSLPC_INFO *info = dev_to_port(dev);
  3614. unsigned int flags;
  3615. if (debug_level >= DEBUG_LEVEL_INFO)
  3616. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3617. /* return error if TTY interface open */
  3618. if (info->count)
  3619. return -EBUSY;
  3620. if (cmd != SIOCWANDEV)
  3621. return hdlc_ioctl(dev, ifr, cmd);
  3622. switch(ifr->ifr_settings.type) {
  3623. case IF_GET_IFACE: /* return current sync_serial_settings */
  3624. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3625. if (ifr->ifr_settings.size < size) {
  3626. ifr->ifr_settings.size = size; /* data size wanted */
  3627. return -ENOBUFS;
  3628. }
  3629. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3630. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3631. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3632. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3633. switch (flags){
  3634. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3635. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3636. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3637. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3638. default: new_line.clock_type = CLOCK_DEFAULT;
  3639. }
  3640. new_line.clock_rate = info->params.clock_speed;
  3641. new_line.loopback = info->params.loopback ? 1:0;
  3642. if (copy_to_user(line, &new_line, size))
  3643. return -EFAULT;
  3644. return 0;
  3645. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3646. if(!capable(CAP_NET_ADMIN))
  3647. return -EPERM;
  3648. if (copy_from_user(&new_line, line, size))
  3649. return -EFAULT;
  3650. switch (new_line.clock_type)
  3651. {
  3652. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3653. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3654. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3655. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3656. case CLOCK_DEFAULT: flags = info->params.flags &
  3657. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3658. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3659. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3660. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3661. default: return -EINVAL;
  3662. }
  3663. if (new_line.loopback != 0 && new_line.loopback != 1)
  3664. return -EINVAL;
  3665. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3666. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3667. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3668. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3669. info->params.flags |= flags;
  3670. info->params.loopback = new_line.loopback;
  3671. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3672. info->params.clock_speed = new_line.clock_rate;
  3673. else
  3674. info->params.clock_speed = 0;
  3675. /* if network interface up, reprogram hardware */
  3676. if (info->netcount)
  3677. mgslpc_program_hw(info);
  3678. return 0;
  3679. default:
  3680. return hdlc_ioctl(dev, ifr, cmd);
  3681. }
  3682. }
  3683. /**
  3684. * called by network layer when transmit timeout is detected
  3685. *
  3686. * dev pointer to network device structure
  3687. */
  3688. static void hdlcdev_tx_timeout(struct net_device *dev)
  3689. {
  3690. MGSLPC_INFO *info = dev_to_port(dev);
  3691. struct net_device_stats *stats = hdlc_stats(dev);
  3692. unsigned long flags;
  3693. if (debug_level >= DEBUG_LEVEL_INFO)
  3694. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3695. stats->tx_errors++;
  3696. stats->tx_aborted_errors++;
  3697. spin_lock_irqsave(&info->lock,flags);
  3698. tx_stop(info);
  3699. spin_unlock_irqrestore(&info->lock,flags);
  3700. netif_wake_queue(dev);
  3701. }
  3702. /**
  3703. * called by device driver when transmit completes
  3704. * reenable network layer transmit if stopped
  3705. *
  3706. * info pointer to device instance information
  3707. */
  3708. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3709. {
  3710. if (netif_queue_stopped(info->netdev))
  3711. netif_wake_queue(info->netdev);
  3712. }
  3713. /**
  3714. * called by device driver when frame received
  3715. * pass frame to network layer
  3716. *
  3717. * info pointer to device instance information
  3718. * buf pointer to buffer contianing frame data
  3719. * size count of data bytes in buf
  3720. */
  3721. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3722. {
  3723. struct sk_buff *skb = dev_alloc_skb(size);
  3724. struct net_device *dev = info->netdev;
  3725. struct net_device_stats *stats = hdlc_stats(dev);
  3726. if (debug_level >= DEBUG_LEVEL_INFO)
  3727. printk("hdlcdev_rx(%s)\n",dev->name);
  3728. if (skb == NULL) {
  3729. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3730. stats->rx_dropped++;
  3731. return;
  3732. }
  3733. memcpy(skb_put(skb, size),buf,size);
  3734. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3735. stats->rx_packets++;
  3736. stats->rx_bytes += size;
  3737. netif_rx(skb);
  3738. info->netdev->last_rx = jiffies;
  3739. }
  3740. /**
  3741. * called by device driver when adding device instance
  3742. * do generic HDLC initialization
  3743. *
  3744. * info pointer to device instance information
  3745. *
  3746. * returns 0 if success, otherwise error code
  3747. */
  3748. static int hdlcdev_init(MGSLPC_INFO *info)
  3749. {
  3750. int rc;
  3751. struct net_device *dev;
  3752. hdlc_device *hdlc;
  3753. /* allocate and initialize network and HDLC layer objects */
  3754. if (!(dev = alloc_hdlcdev(info))) {
  3755. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3756. return -ENOMEM;
  3757. }
  3758. /* for network layer reporting purposes only */
  3759. dev->base_addr = info->io_base;
  3760. dev->irq = info->irq_level;
  3761. /* network layer callbacks and settings */
  3762. dev->do_ioctl = hdlcdev_ioctl;
  3763. dev->open = hdlcdev_open;
  3764. dev->stop = hdlcdev_close;
  3765. dev->tx_timeout = hdlcdev_tx_timeout;
  3766. dev->watchdog_timeo = 10*HZ;
  3767. dev->tx_queue_len = 50;
  3768. /* generic HDLC layer callbacks and settings */
  3769. hdlc = dev_to_hdlc(dev);
  3770. hdlc->attach = hdlcdev_attach;
  3771. hdlc->xmit = hdlcdev_xmit;
  3772. /* register objects with HDLC layer */
  3773. if ((rc = register_hdlc_device(dev))) {
  3774. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3775. free_netdev(dev);
  3776. return rc;
  3777. }
  3778. info->netdev = dev;
  3779. return 0;
  3780. }
  3781. /**
  3782. * called by device driver when removing device instance
  3783. * do generic HDLC cleanup
  3784. *
  3785. * info pointer to device instance information
  3786. */
  3787. static void hdlcdev_exit(MGSLPC_INFO *info)
  3788. {
  3789. unregister_hdlc_device(info->netdev);
  3790. free_netdev(info->netdev);
  3791. info->netdev = NULL;
  3792. }
  3793. #endif /* CONFIG_HDLC */