mxser.c 74 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. * - Fixed sleep with spinlock held in mxser_send_break
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/gfp.h>
  36. #include <linux/ioport.h>
  37. #include <linux/mm.h>
  38. #include <linux/delay.h>
  39. #include <linux/pci.h>
  40. #include <linux/bitops.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.3" /* 1.11 */
  47. #define MXSERMAJOR 174
  48. #define MXSERCUMAJOR 175
  49. #define MXSER_BOARDS 4 /* Max. boards */
  50. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  51. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  52. #define MXSER_ISR_PASS_LIMIT 100
  53. #define MXSER_ERR_IOADDR -1
  54. #define MXSER_ERR_IRQ -2
  55. #define MXSER_ERR_IRQ_CONFLIT -3
  56. #define MXSER_ERR_VECTOR -4
  57. /*CheckIsMoxaMust return value*/
  58. #define MOXA_OTHER_UART 0x00
  59. #define MOXA_MUST_MU150_HWID 0x01
  60. #define MOXA_MUST_MU860_HWID 0x02
  61. #define WAKEUP_CHARS 256
  62. #define UART_MCR_AFE 0x20
  63. #define UART_LSR_SPECIAL 0x1E
  64. #define PCI_DEVICE_ID_CB108 0x1080
  65. #define PCI_DEVICE_ID_CB114 0x1142
  66. #define PCI_DEVICE_ID_CP114UL 0x1143
  67. #define PCI_DEVICE_ID_CB134I 0x1341
  68. #define PCI_DEVICE_ID_CP138U 0x1380
  69. #define PCI_DEVICE_ID_POS104UL 0x1044
  70. #define C168_ASIC_ID 1
  71. #define C104_ASIC_ID 2
  72. #define C102_ASIC_ID 0xB
  73. #define CI132_ASIC_ID 4
  74. #define CI134_ASIC_ID 3
  75. #define CI104J_ASIC_ID 5
  76. #define MXSER_HIGHBAUD 1
  77. #define MXSER_HAS2 2
  78. /* This is only for PCI */
  79. static const struct {
  80. int type;
  81. int tx_fifo;
  82. int rx_fifo;
  83. int xmit_fifo_size;
  84. int rx_high_water;
  85. int rx_trigger;
  86. int rx_low_water;
  87. long max_baud;
  88. } Gpci_uart_info[] = {
  89. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  90. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  91. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  92. };
  93. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  94. struct mxser_cardinfo {
  95. char *name;
  96. unsigned int nports;
  97. unsigned int flags;
  98. };
  99. static const struct mxser_cardinfo mxser_cards[] = {
  100. /* 0*/ { "C168 series", 8, },
  101. { "C104 series", 4, },
  102. { "CI-104J series", 4, },
  103. { "C168H/PCI series", 8, },
  104. { "C104H/PCI series", 4, },
  105. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  106. { "CI-132 series", 4, MXSER_HAS2 },
  107. { "CI-134 series", 4, },
  108. { "CP-132 series", 2, },
  109. { "CP-114 series", 4, },
  110. /*10*/ { "CT-114 series", 4, },
  111. { "CP-102 series", 2, MXSER_HIGHBAUD },
  112. { "CP-104U series", 4, },
  113. { "CP-168U series", 8, },
  114. { "CP-132U series", 2, },
  115. /*15*/ { "CP-134U series", 4, },
  116. { "CP-104JU series", 4, },
  117. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  118. { "CP-118U series", 8, },
  119. { "CP-102UL series", 2, },
  120. /*20*/ { "CP-102U series", 2, },
  121. { "CP-118EL series", 8, },
  122. { "CP-168EL series", 8, },
  123. { "CP-104EL series", 4, },
  124. { "CB-108 series", 8, },
  125. /*25*/ { "CB-114 series", 4, },
  126. { "CB-134I series", 4, },
  127. { "CP-138U series", 8, },
  128. { "POS-104UL series", 4, },
  129. { "CP-114UL series", 4, }
  130. };
  131. /* driver_data correspond to the lines in the structure above
  132. see also ISA probe function before you change something */
  133. static struct pci_device_id mxser_pcibrds[] = {
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  158. { }
  159. };
  160. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  161. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  162. static int ttymajor = MXSERMAJOR;
  163. /* Variables for insmod */
  164. MODULE_AUTHOR("Casper Yang");
  165. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  166. module_param_array(ioaddr, int, NULL, 0);
  167. module_param(ttymajor, int, 0);
  168. MODULE_LICENSE("GPL");
  169. struct mxser_log {
  170. int tick;
  171. unsigned long rxcnt[MXSER_PORTS];
  172. unsigned long txcnt[MXSER_PORTS];
  173. };
  174. struct mxser_mon {
  175. unsigned long rxcnt;
  176. unsigned long txcnt;
  177. unsigned long up_rxcnt;
  178. unsigned long up_txcnt;
  179. int modem_status;
  180. unsigned char hold_reason;
  181. };
  182. struct mxser_mon_ext {
  183. unsigned long rx_cnt[32];
  184. unsigned long tx_cnt[32];
  185. unsigned long up_rxcnt[32];
  186. unsigned long up_txcnt[32];
  187. int modem_status[32];
  188. long baudrate[32];
  189. int databits[32];
  190. int stopbits[32];
  191. int parity[32];
  192. int flowctrl[32];
  193. int fifo[32];
  194. int iftype[32];
  195. };
  196. struct mxser_board;
  197. struct mxser_port {
  198. struct mxser_board *board;
  199. struct tty_struct *tty;
  200. unsigned long ioaddr;
  201. unsigned long opmode_ioaddr;
  202. int max_baud;
  203. int rx_high_water;
  204. int rx_trigger; /* Rx fifo trigger level */
  205. int rx_low_water;
  206. int baud_base; /* max. speed */
  207. int type; /* UART type */
  208. int flags; /* defined in tty.h */
  209. int x_char; /* xon/xoff character */
  210. int IER; /* Interrupt Enable Register */
  211. int MCR; /* Modem control register */
  212. unsigned char stop_rx;
  213. unsigned char ldisc_stop_rx;
  214. int custom_divisor;
  215. int close_delay;
  216. unsigned short closing_wait;
  217. unsigned char err_shadow;
  218. unsigned long event;
  219. int count; /* # of fd on device */
  220. int blocked_open; /* # of blocked opens */
  221. struct async_icount icount; /* kernel counters for 4 input interrupts */
  222. int timeout;
  223. int read_status_mask;
  224. int ignore_status_mask;
  225. int xmit_fifo_size;
  226. unsigned char *xmit_buf;
  227. int xmit_head;
  228. int xmit_tail;
  229. int xmit_cnt;
  230. struct ktermios normal_termios;
  231. struct mxser_mon mon_data;
  232. spinlock_t slock;
  233. wait_queue_head_t open_wait;
  234. wait_queue_head_t delta_msr_wait;
  235. };
  236. struct mxser_board {
  237. unsigned int idx;
  238. int irq;
  239. const struct mxser_cardinfo *info;
  240. unsigned long vector;
  241. unsigned long vector_mask;
  242. int chip_flag;
  243. int uart_type;
  244. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  245. };
  246. struct mxser_mstatus {
  247. tcflag_t cflag;
  248. int cts;
  249. int dsr;
  250. int ri;
  251. int dcd;
  252. };
  253. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  254. static int mxserBoardCAP[MXSER_BOARDS] = {
  255. 0, 0, 0, 0
  256. /* 0x180, 0x280, 0x200, 0x320 */
  257. };
  258. static struct mxser_board mxser_boards[MXSER_BOARDS];
  259. static struct tty_driver *mxvar_sdriver;
  260. static struct mxser_log mxvar_log;
  261. static int mxvar_diagflag;
  262. static unsigned char mxser_msr[MXSER_PORTS + 1];
  263. static struct mxser_mon_ext mon_data_ext;
  264. static int mxser_set_baud_method[MXSER_PORTS + 1];
  265. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  266. {
  267. u8 oldlcr;
  268. u8 efr;
  269. oldlcr = inb(baseio + UART_LCR);
  270. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  271. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  272. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  273. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  274. outb(oldlcr, baseio + UART_LCR);
  275. }
  276. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  277. {
  278. u8 oldlcr;
  279. u8 efr;
  280. oldlcr = inb(baseio + UART_LCR);
  281. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  282. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  283. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  284. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  285. outb(oldlcr, baseio + UART_LCR);
  286. }
  287. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  288. {
  289. u8 oldlcr;
  290. u8 efr;
  291. oldlcr = inb(baseio + UART_LCR);
  292. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  293. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  294. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  295. efr |= MOXA_MUST_EFR_BANK0;
  296. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  297. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  298. outb(oldlcr, baseio + UART_LCR);
  299. }
  300. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  301. {
  302. u8 oldlcr;
  303. u8 efr;
  304. oldlcr = inb(baseio + UART_LCR);
  305. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  306. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  307. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  308. efr |= MOXA_MUST_EFR_BANK0;
  309. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  310. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  311. outb(oldlcr, baseio + UART_LCR);
  312. }
  313. static void mxser_set_must_fifo_value(struct mxser_port *info)
  314. {
  315. u8 oldlcr;
  316. u8 efr;
  317. oldlcr = inb(info->ioaddr + UART_LCR);
  318. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  319. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  320. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  321. efr |= MOXA_MUST_EFR_BANK1;
  322. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  323. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  324. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  325. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  326. outb(oldlcr, info->ioaddr + UART_LCR);
  327. }
  328. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  329. {
  330. u8 oldlcr;
  331. u8 efr;
  332. oldlcr = inb(baseio + UART_LCR);
  333. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  334. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  335. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  336. efr |= MOXA_MUST_EFR_BANK2;
  337. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  338. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  339. outb(oldlcr, baseio + UART_LCR);
  340. }
  341. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  342. {
  343. u8 oldlcr;
  344. u8 efr;
  345. oldlcr = inb(baseio + UART_LCR);
  346. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  347. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  348. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  349. efr |= MOXA_MUST_EFR_BANK2;
  350. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  351. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  352. outb(oldlcr, baseio + UART_LCR);
  353. }
  354. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  355. {
  356. u8 oldlcr;
  357. u8 efr;
  358. oldlcr = inb(baseio + UART_LCR);
  359. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  360. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  361. efr &= ~MOXA_MUST_EFR_SF_MASK;
  362. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  363. outb(oldlcr, baseio + UART_LCR);
  364. }
  365. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  366. {
  367. u8 oldlcr;
  368. u8 efr;
  369. oldlcr = inb(baseio + UART_LCR);
  370. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  371. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  372. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  373. efr |= MOXA_MUST_EFR_SF_TX1;
  374. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  375. outb(oldlcr, baseio + UART_LCR);
  376. }
  377. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  378. {
  379. u8 oldlcr;
  380. u8 efr;
  381. oldlcr = inb(baseio + UART_LCR);
  382. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  383. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  384. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  385. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  386. outb(oldlcr, baseio + UART_LCR);
  387. }
  388. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  389. {
  390. u8 oldlcr;
  391. u8 efr;
  392. oldlcr = inb(baseio + UART_LCR);
  393. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  394. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  395. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  396. efr |= MOXA_MUST_EFR_SF_RX1;
  397. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  398. outb(oldlcr, baseio + UART_LCR);
  399. }
  400. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  401. {
  402. u8 oldlcr;
  403. u8 efr;
  404. oldlcr = inb(baseio + UART_LCR);
  405. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  406. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  407. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  408. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  409. outb(oldlcr, baseio + UART_LCR);
  410. }
  411. #ifdef CONFIG_PCI
  412. static int __devinit CheckIsMoxaMust(unsigned long io)
  413. {
  414. u8 oldmcr, hwid;
  415. int i;
  416. outb(0, io + UART_LCR);
  417. mxser_disable_must_enchance_mode(io);
  418. oldmcr = inb(io + UART_MCR);
  419. outb(0, io + UART_MCR);
  420. mxser_set_must_xon1_value(io, 0x11);
  421. if ((hwid = inb(io + UART_MCR)) != 0) {
  422. outb(oldmcr, io + UART_MCR);
  423. return MOXA_OTHER_UART;
  424. }
  425. mxser_get_must_hardware_id(io, &hwid);
  426. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  427. if (hwid == Gpci_uart_info[i].type)
  428. return (int)hwid;
  429. }
  430. return MOXA_OTHER_UART;
  431. }
  432. #endif
  433. static void process_txrx_fifo(struct mxser_port *info)
  434. {
  435. int i;
  436. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  437. info->rx_trigger = 1;
  438. info->rx_high_water = 1;
  439. info->rx_low_water = 1;
  440. info->xmit_fifo_size = 1;
  441. } else
  442. for (i = 0; i < UART_INFO_NUM; i++)
  443. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  444. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  445. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  446. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  447. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  448. break;
  449. }
  450. }
  451. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  452. {
  453. unsigned char status = 0;
  454. status = inb(baseaddr + UART_MSR);
  455. mxser_msr[port] &= 0x0F;
  456. mxser_msr[port] |= status;
  457. status = mxser_msr[port];
  458. if (mode)
  459. mxser_msr[port] = 0;
  460. return status;
  461. }
  462. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  463. struct mxser_port *port)
  464. {
  465. DECLARE_WAITQUEUE(wait, current);
  466. int retval;
  467. int do_clocal = 0;
  468. unsigned long flags;
  469. /*
  470. * If non-blocking mode is set, or the port is not enabled,
  471. * then make the check up front and then exit.
  472. */
  473. if ((filp->f_flags & O_NONBLOCK) ||
  474. test_bit(TTY_IO_ERROR, &tty->flags)) {
  475. port->flags |= ASYNC_NORMAL_ACTIVE;
  476. return 0;
  477. }
  478. if (tty->termios->c_cflag & CLOCAL)
  479. do_clocal = 1;
  480. /*
  481. * Block waiting for the carrier detect and the line to become
  482. * free (i.e., not in use by the callout). While we are in
  483. * this loop, port->count is dropped by one, so that
  484. * mxser_close() knows when to free things. We restore it upon
  485. * exit, either normal or abnormal.
  486. */
  487. retval = 0;
  488. add_wait_queue(&port->open_wait, &wait);
  489. spin_lock_irqsave(&port->slock, flags);
  490. if (!tty_hung_up_p(filp))
  491. port->count--;
  492. spin_unlock_irqrestore(&port->slock, flags);
  493. port->blocked_open++;
  494. while (1) {
  495. spin_lock_irqsave(&port->slock, flags);
  496. outb(inb(port->ioaddr + UART_MCR) |
  497. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  498. spin_unlock_irqrestore(&port->slock, flags);
  499. set_current_state(TASK_INTERRUPTIBLE);
  500. if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
  501. if (port->flags & ASYNC_HUP_NOTIFY)
  502. retval = -EAGAIN;
  503. else
  504. retval = -ERESTARTSYS;
  505. break;
  506. }
  507. if (!(port->flags & ASYNC_CLOSING) &&
  508. (do_clocal ||
  509. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  510. break;
  511. if (signal_pending(current)) {
  512. retval = -ERESTARTSYS;
  513. break;
  514. }
  515. schedule();
  516. }
  517. set_current_state(TASK_RUNNING);
  518. remove_wait_queue(&port->open_wait, &wait);
  519. if (!tty_hung_up_p(filp))
  520. port->count++;
  521. port->blocked_open--;
  522. if (retval)
  523. return retval;
  524. port->flags |= ASYNC_NORMAL_ACTIVE;
  525. return 0;
  526. }
  527. static int mxser_set_baud(struct mxser_port *info, long newspd)
  528. {
  529. int quot = 0, baud;
  530. unsigned char cval;
  531. if (!info->tty || !info->tty->termios)
  532. return -1;
  533. if (!(info->ioaddr))
  534. return -1;
  535. if (newspd > info->max_baud)
  536. return -1;
  537. if (newspd == 134) {
  538. quot = 2 * info->baud_base / 269;
  539. tty_encode_baud_rate(info->tty, 134, 134);
  540. } else if (newspd) {
  541. quot = info->baud_base / newspd;
  542. if (quot == 0)
  543. quot = 1;
  544. baud = info->baud_base/quot;
  545. tty_encode_baud_rate(info->tty, baud, baud);
  546. } else {
  547. quot = 0;
  548. }
  549. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  550. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  551. if (quot) {
  552. info->MCR |= UART_MCR_DTR;
  553. outb(info->MCR, info->ioaddr + UART_MCR);
  554. } else {
  555. info->MCR &= ~UART_MCR_DTR;
  556. outb(info->MCR, info->ioaddr + UART_MCR);
  557. return 0;
  558. }
  559. cval = inb(info->ioaddr + UART_LCR);
  560. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  561. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  562. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  563. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  564. #ifdef BOTHER
  565. if (C_BAUD(info->tty) == BOTHER) {
  566. quot = info->baud_base % newspd;
  567. quot *= 8;
  568. if (quot % newspd > newspd / 2) {
  569. quot /= newspd;
  570. quot++;
  571. } else
  572. quot /= newspd;
  573. mxser_set_must_enum_value(info->ioaddr, quot);
  574. } else
  575. #endif
  576. mxser_set_must_enum_value(info->ioaddr, 0);
  577. return 0;
  578. }
  579. /*
  580. * This routine is called to set the UART divisor registers to match
  581. * the specified baud rate for a serial port.
  582. */
  583. static int mxser_change_speed(struct mxser_port *info,
  584. struct ktermios *old_termios)
  585. {
  586. unsigned cflag, cval, fcr;
  587. int ret = 0;
  588. unsigned char status;
  589. if (!info->tty || !info->tty->termios)
  590. return ret;
  591. cflag = info->tty->termios->c_cflag;
  592. if (!(info->ioaddr))
  593. return ret;
  594. if (mxser_set_baud_method[info->tty->index] == 0)
  595. mxser_set_baud(info, tty_get_baud_rate(info->tty));
  596. /* byte size and parity */
  597. switch (cflag & CSIZE) {
  598. case CS5:
  599. cval = 0x00;
  600. break;
  601. case CS6:
  602. cval = 0x01;
  603. break;
  604. case CS7:
  605. cval = 0x02;
  606. break;
  607. case CS8:
  608. cval = 0x03;
  609. break;
  610. default:
  611. cval = 0x00;
  612. break; /* too keep GCC shut... */
  613. }
  614. if (cflag & CSTOPB)
  615. cval |= 0x04;
  616. if (cflag & PARENB)
  617. cval |= UART_LCR_PARITY;
  618. if (!(cflag & PARODD))
  619. cval |= UART_LCR_EPAR;
  620. if (cflag & CMSPAR)
  621. cval |= UART_LCR_SPAR;
  622. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  623. if (info->board->chip_flag) {
  624. fcr = UART_FCR_ENABLE_FIFO;
  625. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  626. mxser_set_must_fifo_value(info);
  627. } else
  628. fcr = 0;
  629. } else {
  630. fcr = UART_FCR_ENABLE_FIFO;
  631. if (info->board->chip_flag) {
  632. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  633. mxser_set_must_fifo_value(info);
  634. } else {
  635. switch (info->rx_trigger) {
  636. case 1:
  637. fcr |= UART_FCR_TRIGGER_1;
  638. break;
  639. case 4:
  640. fcr |= UART_FCR_TRIGGER_4;
  641. break;
  642. case 8:
  643. fcr |= UART_FCR_TRIGGER_8;
  644. break;
  645. default:
  646. fcr |= UART_FCR_TRIGGER_14;
  647. break;
  648. }
  649. }
  650. }
  651. /* CTS flow control flag and modem status interrupts */
  652. info->IER &= ~UART_IER_MSI;
  653. info->MCR &= ~UART_MCR_AFE;
  654. if (cflag & CRTSCTS) {
  655. info->flags |= ASYNC_CTS_FLOW;
  656. info->IER |= UART_IER_MSI;
  657. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  658. info->MCR |= UART_MCR_AFE;
  659. } else {
  660. status = inb(info->ioaddr + UART_MSR);
  661. if (info->tty->hw_stopped) {
  662. if (status & UART_MSR_CTS) {
  663. info->tty->hw_stopped = 0;
  664. if (info->type != PORT_16550A &&
  665. !info->board->chip_flag) {
  666. outb(info->IER & ~UART_IER_THRI,
  667. info->ioaddr +
  668. UART_IER);
  669. info->IER |= UART_IER_THRI;
  670. outb(info->IER, info->ioaddr +
  671. UART_IER);
  672. }
  673. tty_wakeup(info->tty);
  674. }
  675. } else {
  676. if (!(status & UART_MSR_CTS)) {
  677. info->tty->hw_stopped = 1;
  678. if ((info->type != PORT_16550A) &&
  679. (!info->board->chip_flag)) {
  680. info->IER &= ~UART_IER_THRI;
  681. outb(info->IER, info->ioaddr +
  682. UART_IER);
  683. }
  684. }
  685. }
  686. }
  687. } else {
  688. info->flags &= ~ASYNC_CTS_FLOW;
  689. }
  690. outb(info->MCR, info->ioaddr + UART_MCR);
  691. if (cflag & CLOCAL) {
  692. info->flags &= ~ASYNC_CHECK_CD;
  693. } else {
  694. info->flags |= ASYNC_CHECK_CD;
  695. info->IER |= UART_IER_MSI;
  696. }
  697. outb(info->IER, info->ioaddr + UART_IER);
  698. /*
  699. * Set up parity check flag
  700. */
  701. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  702. if (I_INPCK(info->tty))
  703. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  704. if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
  705. info->read_status_mask |= UART_LSR_BI;
  706. info->ignore_status_mask = 0;
  707. if (I_IGNBRK(info->tty)) {
  708. info->ignore_status_mask |= UART_LSR_BI;
  709. info->read_status_mask |= UART_LSR_BI;
  710. /*
  711. * If we're ignore parity and break indicators, ignore
  712. * overruns too. (For real raw support).
  713. */
  714. if (I_IGNPAR(info->tty)) {
  715. info->ignore_status_mask |=
  716. UART_LSR_OE |
  717. UART_LSR_PE |
  718. UART_LSR_FE;
  719. info->read_status_mask |=
  720. UART_LSR_OE |
  721. UART_LSR_PE |
  722. UART_LSR_FE;
  723. }
  724. }
  725. if (info->board->chip_flag) {
  726. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->tty));
  727. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->tty));
  728. if (I_IXON(info->tty)) {
  729. mxser_enable_must_rx_software_flow_control(
  730. info->ioaddr);
  731. } else {
  732. mxser_disable_must_rx_software_flow_control(
  733. info->ioaddr);
  734. }
  735. if (I_IXOFF(info->tty)) {
  736. mxser_enable_must_tx_software_flow_control(
  737. info->ioaddr);
  738. } else {
  739. mxser_disable_must_tx_software_flow_control(
  740. info->ioaddr);
  741. }
  742. }
  743. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  744. outb(cval, info->ioaddr + UART_LCR);
  745. return ret;
  746. }
  747. static void mxser_check_modem_status(struct mxser_port *port, int status)
  748. {
  749. /* update input line counters */
  750. if (status & UART_MSR_TERI)
  751. port->icount.rng++;
  752. if (status & UART_MSR_DDSR)
  753. port->icount.dsr++;
  754. if (status & UART_MSR_DDCD)
  755. port->icount.dcd++;
  756. if (status & UART_MSR_DCTS)
  757. port->icount.cts++;
  758. port->mon_data.modem_status = status;
  759. wake_up_interruptible(&port->delta_msr_wait);
  760. if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  761. if (status & UART_MSR_DCD)
  762. wake_up_interruptible(&port->open_wait);
  763. }
  764. if (port->flags & ASYNC_CTS_FLOW) {
  765. if (port->tty->hw_stopped) {
  766. if (status & UART_MSR_CTS) {
  767. port->tty->hw_stopped = 0;
  768. if ((port->type != PORT_16550A) &&
  769. (!port->board->chip_flag)) {
  770. outb(port->IER & ~UART_IER_THRI,
  771. port->ioaddr + UART_IER);
  772. port->IER |= UART_IER_THRI;
  773. outb(port->IER, port->ioaddr +
  774. UART_IER);
  775. }
  776. tty_wakeup(port->tty);
  777. }
  778. } else {
  779. if (!(status & UART_MSR_CTS)) {
  780. port->tty->hw_stopped = 1;
  781. if (port->type != PORT_16550A &&
  782. !port->board->chip_flag) {
  783. port->IER &= ~UART_IER_THRI;
  784. outb(port->IER, port->ioaddr +
  785. UART_IER);
  786. }
  787. }
  788. }
  789. }
  790. }
  791. static int mxser_startup(struct mxser_port *info)
  792. {
  793. unsigned long page;
  794. unsigned long flags;
  795. page = __get_free_page(GFP_KERNEL);
  796. if (!page)
  797. return -ENOMEM;
  798. spin_lock_irqsave(&info->slock, flags);
  799. if (info->flags & ASYNC_INITIALIZED) {
  800. free_page(page);
  801. spin_unlock_irqrestore(&info->slock, flags);
  802. return 0;
  803. }
  804. if (!info->ioaddr || !info->type) {
  805. if (info->tty)
  806. set_bit(TTY_IO_ERROR, &info->tty->flags);
  807. free_page(page);
  808. spin_unlock_irqrestore(&info->slock, flags);
  809. return 0;
  810. }
  811. if (info->xmit_buf)
  812. free_page(page);
  813. else
  814. info->xmit_buf = (unsigned char *) page;
  815. /*
  816. * Clear the FIFO buffers and disable them
  817. * (they will be reenabled in mxser_change_speed())
  818. */
  819. if (info->board->chip_flag)
  820. outb((UART_FCR_CLEAR_RCVR |
  821. UART_FCR_CLEAR_XMIT |
  822. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  823. else
  824. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  825. info->ioaddr + UART_FCR);
  826. /*
  827. * At this point there's no way the LSR could still be 0xFF;
  828. * if it is, then bail out, because there's likely no UART
  829. * here.
  830. */
  831. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  832. spin_unlock_irqrestore(&info->slock, flags);
  833. if (capable(CAP_SYS_ADMIN)) {
  834. if (info->tty)
  835. set_bit(TTY_IO_ERROR, &info->tty->flags);
  836. return 0;
  837. } else
  838. return -ENODEV;
  839. }
  840. /*
  841. * Clear the interrupt registers.
  842. */
  843. (void) inb(info->ioaddr + UART_LSR);
  844. (void) inb(info->ioaddr + UART_RX);
  845. (void) inb(info->ioaddr + UART_IIR);
  846. (void) inb(info->ioaddr + UART_MSR);
  847. /*
  848. * Now, initialize the UART
  849. */
  850. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  851. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  852. outb(info->MCR, info->ioaddr + UART_MCR);
  853. /*
  854. * Finally, enable interrupts
  855. */
  856. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  857. if (info->board->chip_flag)
  858. info->IER |= MOXA_MUST_IER_EGDAI;
  859. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  860. /*
  861. * And clear the interrupt registers again for luck.
  862. */
  863. (void) inb(info->ioaddr + UART_LSR);
  864. (void) inb(info->ioaddr + UART_RX);
  865. (void) inb(info->ioaddr + UART_IIR);
  866. (void) inb(info->ioaddr + UART_MSR);
  867. if (info->tty)
  868. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  869. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  870. /*
  871. * and set the speed of the serial port
  872. */
  873. mxser_change_speed(info, NULL);
  874. info->flags |= ASYNC_INITIALIZED;
  875. spin_unlock_irqrestore(&info->slock, flags);
  876. return 0;
  877. }
  878. /*
  879. * This routine will shutdown a serial port; interrupts maybe disabled, and
  880. * DTR is dropped if the hangup on close termio flag is on.
  881. */
  882. static void mxser_shutdown(struct mxser_port *info)
  883. {
  884. unsigned long flags;
  885. if (!(info->flags & ASYNC_INITIALIZED))
  886. return;
  887. spin_lock_irqsave(&info->slock, flags);
  888. /*
  889. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  890. * here so the queue might never be waken up
  891. */
  892. wake_up_interruptible(&info->delta_msr_wait);
  893. /*
  894. * Free the IRQ, if necessary
  895. */
  896. if (info->xmit_buf) {
  897. free_page((unsigned long) info->xmit_buf);
  898. info->xmit_buf = NULL;
  899. }
  900. info->IER = 0;
  901. outb(0x00, info->ioaddr + UART_IER);
  902. if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
  903. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  904. outb(info->MCR, info->ioaddr + UART_MCR);
  905. /* clear Rx/Tx FIFO's */
  906. if (info->board->chip_flag)
  907. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  908. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  909. info->ioaddr + UART_FCR);
  910. else
  911. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  912. info->ioaddr + UART_FCR);
  913. /* read data port to reset things */
  914. (void) inb(info->ioaddr + UART_RX);
  915. if (info->tty)
  916. set_bit(TTY_IO_ERROR, &info->tty->flags);
  917. info->flags &= ~ASYNC_INITIALIZED;
  918. if (info->board->chip_flag)
  919. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  920. spin_unlock_irqrestore(&info->slock, flags);
  921. }
  922. /*
  923. * This routine is called whenever a serial port is opened. It
  924. * enables interrupts for a serial port, linking in its async structure into
  925. * the IRQ chain. It also performs the serial-specific
  926. * initialization for the tty structure.
  927. */
  928. static int mxser_open(struct tty_struct *tty, struct file *filp)
  929. {
  930. struct mxser_port *info;
  931. unsigned long flags;
  932. int retval, line;
  933. line = tty->index;
  934. if (line == MXSER_PORTS)
  935. return 0;
  936. if (line < 0 || line > MXSER_PORTS)
  937. return -ENODEV;
  938. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  939. if (!info->ioaddr)
  940. return -ENODEV;
  941. tty->driver_data = info;
  942. info->tty = tty;
  943. /*
  944. * Start up serial port
  945. */
  946. spin_lock_irqsave(&info->slock, flags);
  947. info->count++;
  948. spin_unlock_irqrestore(&info->slock, flags);
  949. retval = mxser_startup(info);
  950. if (retval)
  951. return retval;
  952. retval = mxser_block_til_ready(tty, filp, info);
  953. if (retval)
  954. return retval;
  955. /* unmark here for very high baud rate (ex. 921600 bps) used */
  956. tty->low_latency = 1;
  957. return 0;
  958. }
  959. static void mxser_flush_buffer(struct tty_struct *tty)
  960. {
  961. struct mxser_port *info = tty->driver_data;
  962. char fcr;
  963. unsigned long flags;
  964. spin_lock_irqsave(&info->slock, flags);
  965. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  966. fcr = inb(info->ioaddr + UART_FCR);
  967. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  968. info->ioaddr + UART_FCR);
  969. outb(fcr, info->ioaddr + UART_FCR);
  970. spin_unlock_irqrestore(&info->slock, flags);
  971. tty_wakeup(tty);
  972. }
  973. /*
  974. * This routine is called when the serial port gets closed. First, we
  975. * wait for the last remaining data to be sent. Then, we unlink its
  976. * async structure from the interrupt chain if necessary, and we free
  977. * that IRQ if nothing is left in the chain.
  978. */
  979. static void mxser_close(struct tty_struct *tty, struct file *filp)
  980. {
  981. struct mxser_port *info = tty->driver_data;
  982. unsigned long timeout;
  983. unsigned long flags;
  984. if (tty->index == MXSER_PORTS)
  985. return;
  986. if (!info)
  987. return;
  988. spin_lock_irqsave(&info->slock, flags);
  989. if (tty_hung_up_p(filp)) {
  990. spin_unlock_irqrestore(&info->slock, flags);
  991. return;
  992. }
  993. if ((tty->count == 1) && (info->count != 1)) {
  994. /*
  995. * Uh, oh. tty->count is 1, which means that the tty
  996. * structure will be freed. Info->count should always
  997. * be one in these conditions. If it's greater than
  998. * one, we've got real problems, since it means the
  999. * serial port won't be shutdown.
  1000. */
  1001. printk(KERN_ERR "mxser_close: bad serial port count; "
  1002. "tty->count is 1, info->count is %d\n", info->count);
  1003. info->count = 1;
  1004. }
  1005. if (--info->count < 0) {
  1006. printk(KERN_ERR "mxser_close: bad serial port count for "
  1007. "ttys%d: %d\n", tty->index, info->count);
  1008. info->count = 0;
  1009. }
  1010. if (info->count) {
  1011. spin_unlock_irqrestore(&info->slock, flags);
  1012. return;
  1013. }
  1014. info->flags |= ASYNC_CLOSING;
  1015. spin_unlock_irqrestore(&info->slock, flags);
  1016. /*
  1017. * Save the termios structure, since this port may have
  1018. * separate termios for callout and dialin.
  1019. */
  1020. if (info->flags & ASYNC_NORMAL_ACTIVE)
  1021. info->normal_termios = *tty->termios;
  1022. /*
  1023. * Now we wait for the transmit buffer to clear; and we notify
  1024. * the line discipline to only process XON/XOFF characters.
  1025. */
  1026. tty->closing = 1;
  1027. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1028. tty_wait_until_sent(tty, info->closing_wait);
  1029. /*
  1030. * At this point we stop accepting input. To do this, we
  1031. * disable the receive line status interrupts, and tell the
  1032. * interrupt driver to stop checking the data ready bit in the
  1033. * line status register.
  1034. */
  1035. info->IER &= ~UART_IER_RLSI;
  1036. if (info->board->chip_flag)
  1037. info->IER &= ~MOXA_MUST_RECV_ISR;
  1038. if (info->flags & ASYNC_INITIALIZED) {
  1039. outb(info->IER, info->ioaddr + UART_IER);
  1040. /*
  1041. * Before we drop DTR, make sure the UART transmitter
  1042. * has completely drained; this is especially
  1043. * important if there is a transmit FIFO!
  1044. */
  1045. timeout = jiffies + HZ;
  1046. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1047. schedule_timeout_interruptible(5);
  1048. if (time_after(jiffies, timeout))
  1049. break;
  1050. }
  1051. }
  1052. mxser_shutdown(info);
  1053. mxser_flush_buffer(tty);
  1054. tty_ldisc_flush(tty);
  1055. tty->closing = 0;
  1056. info->event = 0;
  1057. info->tty = NULL;
  1058. if (info->blocked_open) {
  1059. if (info->close_delay)
  1060. schedule_timeout_interruptible(info->close_delay);
  1061. wake_up_interruptible(&info->open_wait);
  1062. }
  1063. info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1064. }
  1065. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1066. {
  1067. int c, total = 0;
  1068. struct mxser_port *info = tty->driver_data;
  1069. unsigned long flags;
  1070. if (!info->xmit_buf)
  1071. return 0;
  1072. while (1) {
  1073. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1074. SERIAL_XMIT_SIZE - info->xmit_head));
  1075. if (c <= 0)
  1076. break;
  1077. memcpy(info->xmit_buf + info->xmit_head, buf, c);
  1078. spin_lock_irqsave(&info->slock, flags);
  1079. info->xmit_head = (info->xmit_head + c) &
  1080. (SERIAL_XMIT_SIZE - 1);
  1081. info->xmit_cnt += c;
  1082. spin_unlock_irqrestore(&info->slock, flags);
  1083. buf += c;
  1084. count -= c;
  1085. total += c;
  1086. }
  1087. if (info->xmit_cnt && !tty->stopped) {
  1088. if (!tty->hw_stopped ||
  1089. (info->type == PORT_16550A) ||
  1090. (info->board->chip_flag)) {
  1091. spin_lock_irqsave(&info->slock, flags);
  1092. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1093. UART_IER);
  1094. info->IER |= UART_IER_THRI;
  1095. outb(info->IER, info->ioaddr + UART_IER);
  1096. spin_unlock_irqrestore(&info->slock, flags);
  1097. }
  1098. }
  1099. return total;
  1100. }
  1101. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1102. {
  1103. struct mxser_port *info = tty->driver_data;
  1104. unsigned long flags;
  1105. if (!info->xmit_buf)
  1106. return 0;
  1107. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1108. return 0;
  1109. spin_lock_irqsave(&info->slock, flags);
  1110. info->xmit_buf[info->xmit_head++] = ch;
  1111. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1112. info->xmit_cnt++;
  1113. spin_unlock_irqrestore(&info->slock, flags);
  1114. if (!tty->stopped) {
  1115. if (!tty->hw_stopped ||
  1116. (info->type == PORT_16550A) ||
  1117. info->board->chip_flag) {
  1118. spin_lock_irqsave(&info->slock, flags);
  1119. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1120. info->IER |= UART_IER_THRI;
  1121. outb(info->IER, info->ioaddr + UART_IER);
  1122. spin_unlock_irqrestore(&info->slock, flags);
  1123. }
  1124. }
  1125. return 1;
  1126. }
  1127. static void mxser_flush_chars(struct tty_struct *tty)
  1128. {
  1129. struct mxser_port *info = tty->driver_data;
  1130. unsigned long flags;
  1131. if (info->xmit_cnt <= 0 ||
  1132. tty->stopped ||
  1133. !info->xmit_buf ||
  1134. (tty->hw_stopped &&
  1135. (info->type != PORT_16550A) &&
  1136. (!info->board->chip_flag)
  1137. ))
  1138. return;
  1139. spin_lock_irqsave(&info->slock, flags);
  1140. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1141. info->IER |= UART_IER_THRI;
  1142. outb(info->IER, info->ioaddr + UART_IER);
  1143. spin_unlock_irqrestore(&info->slock, flags);
  1144. }
  1145. static int mxser_write_room(struct tty_struct *tty)
  1146. {
  1147. struct mxser_port *info = tty->driver_data;
  1148. int ret;
  1149. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1150. if (ret < 0)
  1151. ret = 0;
  1152. return ret;
  1153. }
  1154. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1155. {
  1156. struct mxser_port *info = tty->driver_data;
  1157. return info->xmit_cnt;
  1158. }
  1159. /*
  1160. * ------------------------------------------------------------
  1161. * friends of mxser_ioctl()
  1162. * ------------------------------------------------------------
  1163. */
  1164. static int mxser_get_serial_info(struct mxser_port *info,
  1165. struct serial_struct __user *retinfo)
  1166. {
  1167. struct serial_struct tmp = {
  1168. .type = info->type,
  1169. .line = info->tty->index,
  1170. .port = info->ioaddr,
  1171. .irq = info->board->irq,
  1172. .flags = info->flags,
  1173. .baud_base = info->baud_base,
  1174. .close_delay = info->close_delay,
  1175. .closing_wait = info->closing_wait,
  1176. .custom_divisor = info->custom_divisor,
  1177. .hub6 = 0
  1178. };
  1179. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1180. return -EFAULT;
  1181. return 0;
  1182. }
  1183. static int mxser_set_serial_info(struct mxser_port *info,
  1184. struct serial_struct __user *new_info)
  1185. {
  1186. struct serial_struct new_serial;
  1187. speed_t baud;
  1188. unsigned long sl_flags;
  1189. unsigned int flags;
  1190. int retval = 0;
  1191. if (!new_info || !info->ioaddr)
  1192. return -ENODEV;
  1193. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1194. return -EFAULT;
  1195. if (new_serial.irq != info->board->irq ||
  1196. new_serial.port != info->ioaddr)
  1197. return -EINVAL;
  1198. flags = info->flags & ASYNC_SPD_MASK;
  1199. if (!capable(CAP_SYS_ADMIN)) {
  1200. if ((new_serial.baud_base != info->baud_base) ||
  1201. (new_serial.close_delay != info->close_delay) ||
  1202. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
  1203. return -EPERM;
  1204. info->flags = ((info->flags & ~ASYNC_USR_MASK) |
  1205. (new_serial.flags & ASYNC_USR_MASK));
  1206. } else {
  1207. /*
  1208. * OK, past this point, all the error checking has been done.
  1209. * At this point, we start making changes.....
  1210. */
  1211. info->flags = ((info->flags & ~ASYNC_FLAGS) |
  1212. (new_serial.flags & ASYNC_FLAGS));
  1213. info->close_delay = new_serial.close_delay * HZ / 100;
  1214. info->closing_wait = new_serial.closing_wait * HZ / 100;
  1215. info->tty->low_latency =
  1216. (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1217. info->tty->low_latency = 0;
  1218. if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1219. (new_serial.baud_base != info->baud_base ||
  1220. new_serial.custom_divisor !=
  1221. info->custom_divisor)) {
  1222. baud = new_serial.baud_base / new_serial.custom_divisor;
  1223. tty_encode_baud_rate(info->tty, baud, baud);
  1224. }
  1225. }
  1226. info->type = new_serial.type;
  1227. process_txrx_fifo(info);
  1228. if (info->flags & ASYNC_INITIALIZED) {
  1229. if (flags != (info->flags & ASYNC_SPD_MASK)) {
  1230. spin_lock_irqsave(&info->slock, sl_flags);
  1231. mxser_change_speed(info, NULL);
  1232. spin_unlock_irqrestore(&info->slock, sl_flags);
  1233. }
  1234. } else
  1235. retval = mxser_startup(info);
  1236. return retval;
  1237. }
  1238. /*
  1239. * mxser_get_lsr_info - get line status register info
  1240. *
  1241. * Purpose: Let user call ioctl() to get info when the UART physically
  1242. * is emptied. On bus types like RS485, the transmitter must
  1243. * release the bus after transmitting. This must be done when
  1244. * the transmit shift register is empty, not be done when the
  1245. * transmit holding register is empty. This functionality
  1246. * allows an RS485 driver to be written in user space.
  1247. */
  1248. static int mxser_get_lsr_info(struct mxser_port *info,
  1249. unsigned int __user *value)
  1250. {
  1251. unsigned char status;
  1252. unsigned int result;
  1253. unsigned long flags;
  1254. spin_lock_irqsave(&info->slock, flags);
  1255. status = inb(info->ioaddr + UART_LSR);
  1256. spin_unlock_irqrestore(&info->slock, flags);
  1257. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1258. return put_user(result, value);
  1259. }
  1260. /*
  1261. * This routine sends a break character out the serial port.
  1262. */
  1263. static void mxser_send_break(struct mxser_port *info, int duration)
  1264. {
  1265. unsigned long flags;
  1266. if (!info->ioaddr)
  1267. return;
  1268. set_current_state(TASK_INTERRUPTIBLE);
  1269. spin_lock_irqsave(&info->slock, flags);
  1270. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1271. info->ioaddr + UART_LCR);
  1272. spin_unlock_irqrestore(&info->slock, flags);
  1273. schedule_timeout(duration);
  1274. spin_lock_irqsave(&info->slock, flags);
  1275. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1276. info->ioaddr + UART_LCR);
  1277. spin_unlock_irqrestore(&info->slock, flags);
  1278. }
  1279. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1280. {
  1281. struct mxser_port *info = tty->driver_data;
  1282. unsigned char control, status;
  1283. unsigned long flags;
  1284. if (tty->index == MXSER_PORTS)
  1285. return -ENOIOCTLCMD;
  1286. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1287. return -EIO;
  1288. control = info->MCR;
  1289. spin_lock_irqsave(&info->slock, flags);
  1290. status = inb(info->ioaddr + UART_MSR);
  1291. if (status & UART_MSR_ANY_DELTA)
  1292. mxser_check_modem_status(info, status);
  1293. spin_unlock_irqrestore(&info->slock, flags);
  1294. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1295. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1296. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1297. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1298. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1299. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1300. }
  1301. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1302. unsigned int set, unsigned int clear)
  1303. {
  1304. struct mxser_port *info = tty->driver_data;
  1305. unsigned long flags;
  1306. if (tty->index == MXSER_PORTS)
  1307. return -ENOIOCTLCMD;
  1308. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1309. return -EIO;
  1310. spin_lock_irqsave(&info->slock, flags);
  1311. if (set & TIOCM_RTS)
  1312. info->MCR |= UART_MCR_RTS;
  1313. if (set & TIOCM_DTR)
  1314. info->MCR |= UART_MCR_DTR;
  1315. if (clear & TIOCM_RTS)
  1316. info->MCR &= ~UART_MCR_RTS;
  1317. if (clear & TIOCM_DTR)
  1318. info->MCR &= ~UART_MCR_DTR;
  1319. outb(info->MCR, info->ioaddr + UART_MCR);
  1320. spin_unlock_irqrestore(&info->slock, flags);
  1321. return 0;
  1322. }
  1323. static int __init mxser_program_mode(int port)
  1324. {
  1325. int id, i, j, n;
  1326. outb(0, port);
  1327. outb(0, port);
  1328. outb(0, port);
  1329. (void)inb(port);
  1330. (void)inb(port);
  1331. outb(0, port);
  1332. (void)inb(port);
  1333. id = inb(port + 1) & 0x1F;
  1334. if ((id != C168_ASIC_ID) &&
  1335. (id != C104_ASIC_ID) &&
  1336. (id != C102_ASIC_ID) &&
  1337. (id != CI132_ASIC_ID) &&
  1338. (id != CI134_ASIC_ID) &&
  1339. (id != CI104J_ASIC_ID))
  1340. return -1;
  1341. for (i = 0, j = 0; i < 4; i++) {
  1342. n = inb(port + 2);
  1343. if (n == 'M') {
  1344. j = 1;
  1345. } else if ((j == 1) && (n == 1)) {
  1346. j = 2;
  1347. break;
  1348. } else
  1349. j = 0;
  1350. }
  1351. if (j != 2)
  1352. id = -2;
  1353. return id;
  1354. }
  1355. static void __init mxser_normal_mode(int port)
  1356. {
  1357. int i, n;
  1358. outb(0xA5, port + 1);
  1359. outb(0x80, port + 3);
  1360. outb(12, port + 0); /* 9600 bps */
  1361. outb(0, port + 1);
  1362. outb(0x03, port + 3); /* 8 data bits */
  1363. outb(0x13, port + 4); /* loop back mode */
  1364. for (i = 0; i < 16; i++) {
  1365. n = inb(port + 5);
  1366. if ((n & 0x61) == 0x60)
  1367. break;
  1368. if ((n & 1) == 1)
  1369. (void)inb(port);
  1370. }
  1371. outb(0x00, port + 4);
  1372. }
  1373. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1374. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1375. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1376. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1377. #define EN_CCMD 0x000 /* Chip's command register */
  1378. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1379. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1380. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1381. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1382. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1383. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1384. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1385. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1386. static int __init mxser_read_register(int port, unsigned short *regs)
  1387. {
  1388. int i, k, value, id;
  1389. unsigned int j;
  1390. id = mxser_program_mode(port);
  1391. if (id < 0)
  1392. return id;
  1393. for (i = 0; i < 14; i++) {
  1394. k = (i & 0x3F) | 0x180;
  1395. for (j = 0x100; j > 0; j >>= 1) {
  1396. outb(CHIP_CS, port);
  1397. if (k & j) {
  1398. outb(CHIP_CS | CHIP_DO, port);
  1399. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1400. } else {
  1401. outb(CHIP_CS, port);
  1402. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1403. }
  1404. }
  1405. (void)inb(port);
  1406. value = 0;
  1407. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1408. outb(CHIP_CS, port);
  1409. outb(CHIP_CS | CHIP_SK, port);
  1410. if (inb(port) & CHIP_DI)
  1411. value |= j;
  1412. }
  1413. regs[i] = value;
  1414. outb(0, port);
  1415. }
  1416. mxser_normal_mode(port);
  1417. return id;
  1418. }
  1419. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1420. {
  1421. struct mxser_port *port;
  1422. int result, status;
  1423. unsigned int i, j;
  1424. int ret = 0;
  1425. switch (cmd) {
  1426. case MOXA_GET_MAJOR:
  1427. return put_user(ttymajor, (int __user *)argp);
  1428. case MOXA_CHKPORTENABLE:
  1429. result = 0;
  1430. lock_kernel();
  1431. for (i = 0; i < MXSER_BOARDS; i++)
  1432. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1433. if (mxser_boards[i].ports[j].ioaddr)
  1434. result |= (1 << i);
  1435. unlock_kernel();
  1436. return put_user(result, (unsigned long __user *)argp);
  1437. case MOXA_GETDATACOUNT:
  1438. lock_kernel();
  1439. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1440. ret = -EFAULT;
  1441. unlock_kernel();
  1442. return ret;
  1443. case MOXA_GETMSTATUS:
  1444. lock_kernel();
  1445. for (i = 0; i < MXSER_BOARDS; i++)
  1446. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1447. port = &mxser_boards[i].ports[j];
  1448. GMStatus[i].ri = 0;
  1449. if (!port->ioaddr) {
  1450. GMStatus[i].dcd = 0;
  1451. GMStatus[i].dsr = 0;
  1452. GMStatus[i].cts = 0;
  1453. continue;
  1454. }
  1455. if (!port->tty || !port->tty->termios)
  1456. GMStatus[i].cflag =
  1457. port->normal_termios.c_cflag;
  1458. else
  1459. GMStatus[i].cflag =
  1460. port->tty->termios->c_cflag;
  1461. status = inb(port->ioaddr + UART_MSR);
  1462. if (status & 0x80 /*UART_MSR_DCD */ )
  1463. GMStatus[i].dcd = 1;
  1464. else
  1465. GMStatus[i].dcd = 0;
  1466. if (status & 0x20 /*UART_MSR_DSR */ )
  1467. GMStatus[i].dsr = 1;
  1468. else
  1469. GMStatus[i].dsr = 0;
  1470. if (status & 0x10 /*UART_MSR_CTS */ )
  1471. GMStatus[i].cts = 1;
  1472. else
  1473. GMStatus[i].cts = 0;
  1474. }
  1475. unlock_kernel();
  1476. if (copy_to_user(argp, GMStatus,
  1477. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1478. return -EFAULT;
  1479. return 0;
  1480. case MOXA_ASPP_MON_EXT: {
  1481. int p, shiftbit;
  1482. unsigned long opmode;
  1483. unsigned cflag, iflag;
  1484. lock_kernel();
  1485. for (i = 0; i < MXSER_BOARDS; i++) {
  1486. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1487. port = &mxser_boards[i].ports[j];
  1488. if (!port->ioaddr)
  1489. continue;
  1490. status = mxser_get_msr(port->ioaddr, 0, i);
  1491. if (status & UART_MSR_TERI)
  1492. port->icount.rng++;
  1493. if (status & UART_MSR_DDSR)
  1494. port->icount.dsr++;
  1495. if (status & UART_MSR_DDCD)
  1496. port->icount.dcd++;
  1497. if (status & UART_MSR_DCTS)
  1498. port->icount.cts++;
  1499. port->mon_data.modem_status = status;
  1500. mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
  1501. mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
  1502. mon_data_ext.up_rxcnt[i] =
  1503. port->mon_data.up_rxcnt;
  1504. mon_data_ext.up_txcnt[i] =
  1505. port->mon_data.up_txcnt;
  1506. mon_data_ext.modem_status[i] =
  1507. port->mon_data.modem_status;
  1508. mon_data_ext.baudrate[i] =
  1509. tty_get_baud_rate(port->tty);
  1510. if (!port->tty || !port->tty->termios) {
  1511. cflag = port->normal_termios.c_cflag;
  1512. iflag = port->normal_termios.c_iflag;
  1513. } else {
  1514. cflag = port->tty->termios->c_cflag;
  1515. iflag = port->tty->termios->c_iflag;
  1516. }
  1517. mon_data_ext.databits[i] = cflag & CSIZE;
  1518. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1519. mon_data_ext.parity[i] =
  1520. cflag & (PARENB | PARODD | CMSPAR);
  1521. mon_data_ext.flowctrl[i] = 0x00;
  1522. if (cflag & CRTSCTS)
  1523. mon_data_ext.flowctrl[i] |= 0x03;
  1524. if (iflag & (IXON | IXOFF))
  1525. mon_data_ext.flowctrl[i] |= 0x0C;
  1526. if (port->type == PORT_16550A)
  1527. mon_data_ext.fifo[i] = 1;
  1528. else
  1529. mon_data_ext.fifo[i] = 0;
  1530. p = i % 4;
  1531. shiftbit = p * 2;
  1532. opmode = inb(port->opmode_ioaddr) >> shiftbit;
  1533. opmode &= OP_MODE_MASK;
  1534. mon_data_ext.iftype[i] = opmode;
  1535. }
  1536. }
  1537. unlock_kernel();
  1538. if (copy_to_user(argp, &mon_data_ext,
  1539. sizeof(mon_data_ext)))
  1540. return -EFAULT;
  1541. return 0;
  1542. }
  1543. default:
  1544. return -ENOIOCTLCMD;
  1545. }
  1546. return 0;
  1547. }
  1548. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1549. struct async_icount *cprev)
  1550. {
  1551. struct async_icount cnow;
  1552. unsigned long flags;
  1553. int ret;
  1554. spin_lock_irqsave(&info->slock, flags);
  1555. cnow = info->icount; /* atomic copy */
  1556. spin_unlock_irqrestore(&info->slock, flags);
  1557. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1558. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1559. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1560. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1561. *cprev = cnow;
  1562. return ret;
  1563. }
  1564. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1565. unsigned int cmd, unsigned long arg)
  1566. {
  1567. struct mxser_port *info = tty->driver_data;
  1568. struct async_icount cnow;
  1569. struct serial_icounter_struct __user *p_cuser;
  1570. unsigned long flags;
  1571. void __user *argp = (void __user *)arg;
  1572. int retval;
  1573. if (tty->index == MXSER_PORTS)
  1574. return mxser_ioctl_special(cmd, argp);
  1575. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1576. int p;
  1577. unsigned long opmode;
  1578. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1579. int shiftbit;
  1580. unsigned char val, mask;
  1581. p = tty->index % 4;
  1582. if (cmd == MOXA_SET_OP_MODE) {
  1583. if (get_user(opmode, (int __user *) argp))
  1584. return -EFAULT;
  1585. if (opmode != RS232_MODE &&
  1586. opmode != RS485_2WIRE_MODE &&
  1587. opmode != RS422_MODE &&
  1588. opmode != RS485_4WIRE_MODE)
  1589. return -EFAULT;
  1590. lock_kernel();
  1591. mask = ModeMask[p];
  1592. shiftbit = p * 2;
  1593. val = inb(info->opmode_ioaddr);
  1594. val &= mask;
  1595. val |= (opmode << shiftbit);
  1596. outb(val, info->opmode_ioaddr);
  1597. unlock_kernel();
  1598. } else {
  1599. lock_kernel();
  1600. shiftbit = p * 2;
  1601. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1602. opmode &= OP_MODE_MASK;
  1603. unlock_kernel();
  1604. if (put_user(opmode, (int __user *)argp))
  1605. return -EFAULT;
  1606. }
  1607. return 0;
  1608. }
  1609. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1610. test_bit(TTY_IO_ERROR, &tty->flags))
  1611. return -EIO;
  1612. switch (cmd) {
  1613. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1614. retval = tty_check_change(tty);
  1615. if (retval)
  1616. return retval;
  1617. tty_wait_until_sent(tty, 0);
  1618. if (!arg)
  1619. mxser_send_break(info, HZ / 4); /* 1/4 second */
  1620. return 0;
  1621. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1622. retval = tty_check_change(tty);
  1623. if (retval)
  1624. return retval;
  1625. tty_wait_until_sent(tty, 0);
  1626. mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
  1627. return 0;
  1628. case TIOCGSERIAL:
  1629. lock_kernel();
  1630. retval = mxser_get_serial_info(info, argp);
  1631. unlock_kernel();
  1632. return retval;
  1633. case TIOCSSERIAL:
  1634. lock_kernel();
  1635. retval = mxser_set_serial_info(info, argp);
  1636. unlock_kernel();
  1637. return retval;
  1638. case TIOCSERGETLSR: /* Get line status register */
  1639. return mxser_get_lsr_info(info, argp);
  1640. /*
  1641. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1642. * - mask passed in arg for lines of interest
  1643. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1644. * Caller should use TIOCGICOUNT to see which one it was
  1645. */
  1646. case TIOCMIWAIT:
  1647. spin_lock_irqsave(&info->slock, flags);
  1648. cnow = info->icount; /* note the counters on entry */
  1649. spin_unlock_irqrestore(&info->slock, flags);
  1650. return wait_event_interruptible(info->delta_msr_wait,
  1651. mxser_cflags_changed(info, arg, &cnow));
  1652. /*
  1653. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1654. * Return: write counters to the user passed counter struct
  1655. * NB: both 1->0 and 0->1 transitions are counted except for
  1656. * RI where only 0->1 is counted.
  1657. */
  1658. case TIOCGICOUNT:
  1659. spin_lock_irqsave(&info->slock, flags);
  1660. cnow = info->icount;
  1661. spin_unlock_irqrestore(&info->slock, flags);
  1662. p_cuser = argp;
  1663. if (put_user(cnow.frame, &p_cuser->frame))
  1664. return -EFAULT;
  1665. if (put_user(cnow.brk, &p_cuser->brk))
  1666. return -EFAULT;
  1667. if (put_user(cnow.overrun, &p_cuser->overrun))
  1668. return -EFAULT;
  1669. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1670. return -EFAULT;
  1671. if (put_user(cnow.parity, &p_cuser->parity))
  1672. return -EFAULT;
  1673. if (put_user(cnow.rx, &p_cuser->rx))
  1674. return -EFAULT;
  1675. if (put_user(cnow.tx, &p_cuser->tx))
  1676. return -EFAULT;
  1677. put_user(cnow.cts, &p_cuser->cts);
  1678. put_user(cnow.dsr, &p_cuser->dsr);
  1679. put_user(cnow.rng, &p_cuser->rng);
  1680. put_user(cnow.dcd, &p_cuser->dcd);
  1681. return 0;
  1682. case MOXA_HighSpeedOn:
  1683. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1684. case MOXA_SDS_RSTICOUNTER:
  1685. lock_kernel();
  1686. info->mon_data.rxcnt = 0;
  1687. info->mon_data.txcnt = 0;
  1688. unlock_kernel();
  1689. return 0;
  1690. case MOXA_ASPP_OQUEUE:{
  1691. int len, lsr;
  1692. lock_kernel();
  1693. len = mxser_chars_in_buffer(tty);
  1694. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1695. len += (lsr ? 0 : 1);
  1696. unlock_kernel();
  1697. return put_user(len, (int __user *)argp);
  1698. }
  1699. case MOXA_ASPP_MON: {
  1700. int mcr, status;
  1701. lock_kernel();
  1702. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1703. mxser_check_modem_status(info, status);
  1704. mcr = inb(info->ioaddr + UART_MCR);
  1705. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1706. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1707. else
  1708. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1709. if (mcr & MOXA_MUST_MCR_TX_XON)
  1710. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1711. else
  1712. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1713. if (info->tty->hw_stopped)
  1714. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1715. else
  1716. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1717. unlock_kernel();
  1718. if (copy_to_user(argp, &info->mon_data,
  1719. sizeof(struct mxser_mon)))
  1720. return -EFAULT;
  1721. return 0;
  1722. }
  1723. case MOXA_ASPP_LSTATUS: {
  1724. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1725. return -EFAULT;
  1726. info->err_shadow = 0;
  1727. return 0;
  1728. }
  1729. case MOXA_SET_BAUD_METHOD: {
  1730. int method;
  1731. if (get_user(method, (int __user *)argp))
  1732. return -EFAULT;
  1733. mxser_set_baud_method[tty->index] = method;
  1734. return put_user(method, (int __user *)argp);
  1735. }
  1736. default:
  1737. return -ENOIOCTLCMD;
  1738. }
  1739. return 0;
  1740. }
  1741. static void mxser_stoprx(struct tty_struct *tty)
  1742. {
  1743. struct mxser_port *info = tty->driver_data;
  1744. info->ldisc_stop_rx = 1;
  1745. if (I_IXOFF(tty)) {
  1746. if (info->board->chip_flag) {
  1747. info->IER &= ~MOXA_MUST_RECV_ISR;
  1748. outb(info->IER, info->ioaddr + UART_IER);
  1749. } else {
  1750. info->x_char = STOP_CHAR(tty);
  1751. outb(0, info->ioaddr + UART_IER);
  1752. info->IER |= UART_IER_THRI;
  1753. outb(info->IER, info->ioaddr + UART_IER);
  1754. }
  1755. }
  1756. if (info->tty->termios->c_cflag & CRTSCTS) {
  1757. info->MCR &= ~UART_MCR_RTS;
  1758. outb(info->MCR, info->ioaddr + UART_MCR);
  1759. }
  1760. }
  1761. /*
  1762. * This routine is called by the upper-layer tty layer to signal that
  1763. * incoming characters should be throttled.
  1764. */
  1765. static void mxser_throttle(struct tty_struct *tty)
  1766. {
  1767. mxser_stoprx(tty);
  1768. }
  1769. static void mxser_unthrottle(struct tty_struct *tty)
  1770. {
  1771. struct mxser_port *info = tty->driver_data;
  1772. /* startrx */
  1773. info->ldisc_stop_rx = 0;
  1774. if (I_IXOFF(tty)) {
  1775. if (info->x_char)
  1776. info->x_char = 0;
  1777. else {
  1778. if (info->board->chip_flag) {
  1779. info->IER |= MOXA_MUST_RECV_ISR;
  1780. outb(info->IER, info->ioaddr + UART_IER);
  1781. } else {
  1782. info->x_char = START_CHAR(tty);
  1783. outb(0, info->ioaddr + UART_IER);
  1784. info->IER |= UART_IER_THRI;
  1785. outb(info->IER, info->ioaddr + UART_IER);
  1786. }
  1787. }
  1788. }
  1789. if (info->tty->termios->c_cflag & CRTSCTS) {
  1790. info->MCR |= UART_MCR_RTS;
  1791. outb(info->MCR, info->ioaddr + UART_MCR);
  1792. }
  1793. }
  1794. /*
  1795. * mxser_stop() and mxser_start()
  1796. *
  1797. * This routines are called before setting or resetting tty->stopped.
  1798. * They enable or disable transmitter interrupts, as necessary.
  1799. */
  1800. static void mxser_stop(struct tty_struct *tty)
  1801. {
  1802. struct mxser_port *info = tty->driver_data;
  1803. unsigned long flags;
  1804. spin_lock_irqsave(&info->slock, flags);
  1805. if (info->IER & UART_IER_THRI) {
  1806. info->IER &= ~UART_IER_THRI;
  1807. outb(info->IER, info->ioaddr + UART_IER);
  1808. }
  1809. spin_unlock_irqrestore(&info->slock, flags);
  1810. }
  1811. static void mxser_start(struct tty_struct *tty)
  1812. {
  1813. struct mxser_port *info = tty->driver_data;
  1814. unsigned long flags;
  1815. spin_lock_irqsave(&info->slock, flags);
  1816. if (info->xmit_cnt && info->xmit_buf) {
  1817. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1818. info->IER |= UART_IER_THRI;
  1819. outb(info->IER, info->ioaddr + UART_IER);
  1820. }
  1821. spin_unlock_irqrestore(&info->slock, flags);
  1822. }
  1823. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1824. {
  1825. struct mxser_port *info = tty->driver_data;
  1826. unsigned long flags;
  1827. spin_lock_irqsave(&info->slock, flags);
  1828. mxser_change_speed(info, old_termios);
  1829. spin_unlock_irqrestore(&info->slock, flags);
  1830. if ((old_termios->c_cflag & CRTSCTS) &&
  1831. !(tty->termios->c_cflag & CRTSCTS)) {
  1832. tty->hw_stopped = 0;
  1833. mxser_start(tty);
  1834. }
  1835. /* Handle sw stopped */
  1836. if ((old_termios->c_iflag & IXON) &&
  1837. !(tty->termios->c_iflag & IXON)) {
  1838. tty->stopped = 0;
  1839. if (info->board->chip_flag) {
  1840. spin_lock_irqsave(&info->slock, flags);
  1841. mxser_disable_must_rx_software_flow_control(
  1842. info->ioaddr);
  1843. spin_unlock_irqrestore(&info->slock, flags);
  1844. }
  1845. mxser_start(tty);
  1846. }
  1847. }
  1848. /*
  1849. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1850. */
  1851. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1852. {
  1853. struct mxser_port *info = tty->driver_data;
  1854. unsigned long orig_jiffies, char_time;
  1855. int lsr;
  1856. if (info->type == PORT_UNKNOWN)
  1857. return;
  1858. if (info->xmit_fifo_size == 0)
  1859. return; /* Just in case.... */
  1860. orig_jiffies = jiffies;
  1861. /*
  1862. * Set the check interval to be 1/5 of the estimated time to
  1863. * send a single character, and make it at least 1. The check
  1864. * interval should also be less than the timeout.
  1865. *
  1866. * Note: we have to use pretty tight timings here to satisfy
  1867. * the NIST-PCTS.
  1868. */
  1869. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1870. char_time = char_time / 5;
  1871. if (char_time == 0)
  1872. char_time = 1;
  1873. if (timeout && timeout < char_time)
  1874. char_time = timeout;
  1875. /*
  1876. * If the transmitter hasn't cleared in twice the approximate
  1877. * amount of time to send the entire FIFO, it probably won't
  1878. * ever clear. This assumes the UART isn't doing flow
  1879. * control, which is currently the case. Hence, if it ever
  1880. * takes longer than info->timeout, this is probably due to a
  1881. * UART bug of some kind. So, we clamp the timeout parameter at
  1882. * 2*info->timeout.
  1883. */
  1884. if (!timeout || timeout > 2 * info->timeout)
  1885. timeout = 2 * info->timeout;
  1886. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1887. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1888. timeout, char_time);
  1889. printk("jiff=%lu...", jiffies);
  1890. #endif
  1891. lock_kernel();
  1892. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1893. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1894. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1895. #endif
  1896. schedule_timeout_interruptible(char_time);
  1897. if (signal_pending(current))
  1898. break;
  1899. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1900. break;
  1901. }
  1902. set_current_state(TASK_RUNNING);
  1903. unlock_kernel();
  1904. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1905. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1906. #endif
  1907. }
  1908. /*
  1909. * This routine is called by tty_hangup() when a hangup is signaled.
  1910. */
  1911. static void mxser_hangup(struct tty_struct *tty)
  1912. {
  1913. struct mxser_port *info = tty->driver_data;
  1914. mxser_flush_buffer(tty);
  1915. mxser_shutdown(info);
  1916. info->event = 0;
  1917. info->count = 0;
  1918. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1919. info->tty = NULL;
  1920. wake_up_interruptible(&info->open_wait);
  1921. }
  1922. /*
  1923. * mxser_rs_break() --- routine which turns the break handling on or off
  1924. */
  1925. static void mxser_rs_break(struct tty_struct *tty, int break_state)
  1926. {
  1927. struct mxser_port *info = tty->driver_data;
  1928. unsigned long flags;
  1929. spin_lock_irqsave(&info->slock, flags);
  1930. if (break_state == -1)
  1931. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1932. info->ioaddr + UART_LCR);
  1933. else
  1934. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1935. info->ioaddr + UART_LCR);
  1936. spin_unlock_irqrestore(&info->slock, flags);
  1937. }
  1938. static void mxser_receive_chars(struct mxser_port *port, int *status)
  1939. {
  1940. struct tty_struct *tty = port->tty;
  1941. unsigned char ch, gdl;
  1942. int ignored = 0;
  1943. int cnt = 0;
  1944. int recv_room;
  1945. int max = 256;
  1946. recv_room = tty->receive_room;
  1947. if ((recv_room == 0) && (!port->ldisc_stop_rx))
  1948. mxser_stoprx(tty);
  1949. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1950. if (*status & UART_LSR_SPECIAL)
  1951. goto intr_old;
  1952. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1953. (*status & MOXA_MUST_LSR_RERR))
  1954. goto intr_old;
  1955. if (*status & MOXA_MUST_LSR_RERR)
  1956. goto intr_old;
  1957. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1958. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1959. gdl &= MOXA_MUST_GDL_MASK;
  1960. if (gdl >= recv_room) {
  1961. if (!port->ldisc_stop_rx)
  1962. mxser_stoprx(tty);
  1963. }
  1964. while (gdl--) {
  1965. ch = inb(port->ioaddr + UART_RX);
  1966. tty_insert_flip_char(tty, ch, 0);
  1967. cnt++;
  1968. }
  1969. goto end_intr;
  1970. }
  1971. intr_old:
  1972. do {
  1973. if (max-- < 0)
  1974. break;
  1975. ch = inb(port->ioaddr + UART_RX);
  1976. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1977. outb(0x23, port->ioaddr + UART_FCR);
  1978. *status &= port->read_status_mask;
  1979. if (*status & port->ignore_status_mask) {
  1980. if (++ignored > 100)
  1981. break;
  1982. } else {
  1983. char flag = 0;
  1984. if (*status & UART_LSR_SPECIAL) {
  1985. if (*status & UART_LSR_BI) {
  1986. flag = TTY_BREAK;
  1987. port->icount.brk++;
  1988. if (port->flags & ASYNC_SAK)
  1989. do_SAK(tty);
  1990. } else if (*status & UART_LSR_PE) {
  1991. flag = TTY_PARITY;
  1992. port->icount.parity++;
  1993. } else if (*status & UART_LSR_FE) {
  1994. flag = TTY_FRAME;
  1995. port->icount.frame++;
  1996. } else if (*status & UART_LSR_OE) {
  1997. flag = TTY_OVERRUN;
  1998. port->icount.overrun++;
  1999. } else
  2000. flag = TTY_BREAK;
  2001. }
  2002. tty_insert_flip_char(tty, ch, flag);
  2003. cnt++;
  2004. if (cnt >= recv_room) {
  2005. if (!port->ldisc_stop_rx)
  2006. mxser_stoprx(tty);
  2007. break;
  2008. }
  2009. }
  2010. if (port->board->chip_flag)
  2011. break;
  2012. *status = inb(port->ioaddr + UART_LSR);
  2013. } while (*status & UART_LSR_DR);
  2014. end_intr:
  2015. mxvar_log.rxcnt[port->tty->index] += cnt;
  2016. port->mon_data.rxcnt += cnt;
  2017. port->mon_data.up_rxcnt += cnt;
  2018. /*
  2019. * We are called from an interrupt context with &port->slock
  2020. * being held. Drop it temporarily in order to prevent
  2021. * recursive locking.
  2022. */
  2023. spin_unlock(&port->slock);
  2024. tty_flip_buffer_push(tty);
  2025. spin_lock(&port->slock);
  2026. }
  2027. static void mxser_transmit_chars(struct mxser_port *port)
  2028. {
  2029. int count, cnt;
  2030. if (port->x_char) {
  2031. outb(port->x_char, port->ioaddr + UART_TX);
  2032. port->x_char = 0;
  2033. mxvar_log.txcnt[port->tty->index]++;
  2034. port->mon_data.txcnt++;
  2035. port->mon_data.up_txcnt++;
  2036. port->icount.tx++;
  2037. return;
  2038. }
  2039. if (port->xmit_buf == NULL)
  2040. return;
  2041. if ((port->xmit_cnt <= 0) || port->tty->stopped ||
  2042. (port->tty->hw_stopped &&
  2043. (port->type != PORT_16550A) &&
  2044. (!port->board->chip_flag))) {
  2045. port->IER &= ~UART_IER_THRI;
  2046. outb(port->IER, port->ioaddr + UART_IER);
  2047. return;
  2048. }
  2049. cnt = port->xmit_cnt;
  2050. count = port->xmit_fifo_size;
  2051. do {
  2052. outb(port->xmit_buf[port->xmit_tail++],
  2053. port->ioaddr + UART_TX);
  2054. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  2055. if (--port->xmit_cnt <= 0)
  2056. break;
  2057. } while (--count > 0);
  2058. mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
  2059. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  2060. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  2061. port->icount.tx += (cnt - port->xmit_cnt);
  2062. if (port->xmit_cnt < WAKEUP_CHARS)
  2063. tty_wakeup(port->tty);
  2064. if (port->xmit_cnt <= 0) {
  2065. port->IER &= ~UART_IER_THRI;
  2066. outb(port->IER, port->ioaddr + UART_IER);
  2067. }
  2068. }
  2069. /*
  2070. * This is the serial driver's generic interrupt routine
  2071. */
  2072. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2073. {
  2074. int status, iir, i;
  2075. struct mxser_board *brd = NULL;
  2076. struct mxser_port *port;
  2077. int max, irqbits, bits, msr;
  2078. unsigned int int_cnt, pass_counter = 0;
  2079. int handled = IRQ_NONE;
  2080. for (i = 0; i < MXSER_BOARDS; i++)
  2081. if (dev_id == &mxser_boards[i]) {
  2082. brd = dev_id;
  2083. break;
  2084. }
  2085. if (i == MXSER_BOARDS)
  2086. goto irq_stop;
  2087. if (brd == NULL)
  2088. goto irq_stop;
  2089. max = brd->info->nports;
  2090. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2091. irqbits = inb(brd->vector) & brd->vector_mask;
  2092. if (irqbits == brd->vector_mask)
  2093. break;
  2094. handled = IRQ_HANDLED;
  2095. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2096. if (irqbits == brd->vector_mask)
  2097. break;
  2098. if (bits & irqbits)
  2099. continue;
  2100. port = &brd->ports[i];
  2101. int_cnt = 0;
  2102. spin_lock(&port->slock);
  2103. do {
  2104. iir = inb(port->ioaddr + UART_IIR);
  2105. if (iir & UART_IIR_NO_INT)
  2106. break;
  2107. iir &= MOXA_MUST_IIR_MASK;
  2108. if (!port->tty ||
  2109. (port->flags & ASYNC_CLOSING) ||
  2110. !(port->flags &
  2111. ASYNC_INITIALIZED)) {
  2112. status = inb(port->ioaddr + UART_LSR);
  2113. outb(0x27, port->ioaddr + UART_FCR);
  2114. inb(port->ioaddr + UART_MSR);
  2115. break;
  2116. }
  2117. status = inb(port->ioaddr + UART_LSR);
  2118. if (status & UART_LSR_PE)
  2119. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2120. if (status & UART_LSR_FE)
  2121. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2122. if (status & UART_LSR_OE)
  2123. port->err_shadow |=
  2124. NPPI_NOTIFY_HW_OVERRUN;
  2125. if (status & UART_LSR_BI)
  2126. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2127. if (port->board->chip_flag) {
  2128. if (iir == MOXA_MUST_IIR_GDA ||
  2129. iir == MOXA_MUST_IIR_RDA ||
  2130. iir == MOXA_MUST_IIR_RTO ||
  2131. iir == MOXA_MUST_IIR_LSR)
  2132. mxser_receive_chars(port,
  2133. &status);
  2134. } else {
  2135. status &= port->read_status_mask;
  2136. if (status & UART_LSR_DR)
  2137. mxser_receive_chars(port,
  2138. &status);
  2139. }
  2140. msr = inb(port->ioaddr + UART_MSR);
  2141. if (msr & UART_MSR_ANY_DELTA)
  2142. mxser_check_modem_status(port, msr);
  2143. if (port->board->chip_flag) {
  2144. if (iir == 0x02 && (status &
  2145. UART_LSR_THRE))
  2146. mxser_transmit_chars(port);
  2147. } else {
  2148. if (status & UART_LSR_THRE)
  2149. mxser_transmit_chars(port);
  2150. }
  2151. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2152. spin_unlock(&port->slock);
  2153. }
  2154. }
  2155. irq_stop:
  2156. return handled;
  2157. }
  2158. static const struct tty_operations mxser_ops = {
  2159. .open = mxser_open,
  2160. .close = mxser_close,
  2161. .write = mxser_write,
  2162. .put_char = mxser_put_char,
  2163. .flush_chars = mxser_flush_chars,
  2164. .write_room = mxser_write_room,
  2165. .chars_in_buffer = mxser_chars_in_buffer,
  2166. .flush_buffer = mxser_flush_buffer,
  2167. .ioctl = mxser_ioctl,
  2168. .throttle = mxser_throttle,
  2169. .unthrottle = mxser_unthrottle,
  2170. .set_termios = mxser_set_termios,
  2171. .stop = mxser_stop,
  2172. .start = mxser_start,
  2173. .hangup = mxser_hangup,
  2174. .break_ctl = mxser_rs_break,
  2175. .wait_until_sent = mxser_wait_until_sent,
  2176. .tiocmget = mxser_tiocmget,
  2177. .tiocmset = mxser_tiocmset,
  2178. };
  2179. /*
  2180. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2181. */
  2182. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2183. unsigned int irq)
  2184. {
  2185. if (irq)
  2186. free_irq(brd->irq, brd);
  2187. if (pdev != NULL) { /* PCI */
  2188. #ifdef CONFIG_PCI
  2189. pci_release_region(pdev, 2);
  2190. pci_release_region(pdev, 3);
  2191. #endif
  2192. } else {
  2193. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2194. release_region(brd->vector, 1);
  2195. }
  2196. }
  2197. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2198. struct pci_dev *pdev)
  2199. {
  2200. struct mxser_port *info;
  2201. unsigned int i;
  2202. int retval;
  2203. printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
  2204. for (i = 0; i < brd->info->nports; i++) {
  2205. info = &brd->ports[i];
  2206. info->board = brd;
  2207. info->stop_rx = 0;
  2208. info->ldisc_stop_rx = 0;
  2209. /* Enhance mode enabled here */
  2210. if (brd->chip_flag != MOXA_OTHER_UART)
  2211. mxser_enable_must_enchance_mode(info->ioaddr);
  2212. info->flags = ASYNC_SHARE_IRQ;
  2213. info->type = brd->uart_type;
  2214. process_txrx_fifo(info);
  2215. info->custom_divisor = info->baud_base * 16;
  2216. info->close_delay = 5 * HZ / 10;
  2217. info->closing_wait = 30 * HZ;
  2218. info->normal_termios = mxvar_sdriver->init_termios;
  2219. init_waitqueue_head(&info->open_wait);
  2220. init_waitqueue_head(&info->delta_msr_wait);
  2221. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2222. info->err_shadow = 0;
  2223. spin_lock_init(&info->slock);
  2224. /* before set INT ISR, disable all int */
  2225. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2226. info->ioaddr + UART_IER);
  2227. }
  2228. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2229. brd);
  2230. if (retval) {
  2231. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2232. "conflict with another device.\n",
  2233. brd->info->name, brd->irq);
  2234. /* We hold resources, we need to release them. */
  2235. mxser_release_res(brd, pdev, 0);
  2236. }
  2237. return retval;
  2238. }
  2239. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2240. {
  2241. int id, i, bits;
  2242. unsigned short regs[16], irq;
  2243. unsigned char scratch, scratch2;
  2244. brd->chip_flag = MOXA_OTHER_UART;
  2245. id = mxser_read_register(cap, regs);
  2246. switch (id) {
  2247. case C168_ASIC_ID:
  2248. brd->info = &mxser_cards[0];
  2249. break;
  2250. case C104_ASIC_ID:
  2251. brd->info = &mxser_cards[1];
  2252. break;
  2253. case CI104J_ASIC_ID:
  2254. brd->info = &mxser_cards[2];
  2255. break;
  2256. case C102_ASIC_ID:
  2257. brd->info = &mxser_cards[5];
  2258. break;
  2259. case CI132_ASIC_ID:
  2260. brd->info = &mxser_cards[6];
  2261. break;
  2262. case CI134_ASIC_ID:
  2263. brd->info = &mxser_cards[7];
  2264. break;
  2265. default:
  2266. return 0;
  2267. }
  2268. irq = 0;
  2269. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2270. Flag-hack checks if configuration should be read as 2-port here. */
  2271. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2272. irq = regs[9] & 0xF000;
  2273. irq = irq | (irq >> 4);
  2274. if (irq != (regs[9] & 0xFF00))
  2275. return MXSER_ERR_IRQ_CONFLIT;
  2276. } else if (brd->info->nports == 4) {
  2277. irq = regs[9] & 0xF000;
  2278. irq = irq | (irq >> 4);
  2279. irq = irq | (irq >> 8);
  2280. if (irq != regs[9])
  2281. return MXSER_ERR_IRQ_CONFLIT;
  2282. } else if (brd->info->nports == 8) {
  2283. irq = regs[9] & 0xF000;
  2284. irq = irq | (irq >> 4);
  2285. irq = irq | (irq >> 8);
  2286. if ((irq != regs[9]) || (irq != regs[10]))
  2287. return MXSER_ERR_IRQ_CONFLIT;
  2288. }
  2289. if (!irq)
  2290. return MXSER_ERR_IRQ;
  2291. brd->irq = ((int)(irq & 0xF000) >> 12);
  2292. for (i = 0; i < 8; i++)
  2293. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2294. if ((regs[12] & 0x80) == 0)
  2295. return MXSER_ERR_VECTOR;
  2296. brd->vector = (int)regs[11]; /* interrupt vector */
  2297. if (id == 1)
  2298. brd->vector_mask = 0x00FF;
  2299. else
  2300. brd->vector_mask = 0x000F;
  2301. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2302. if (regs[12] & bits) {
  2303. brd->ports[i].baud_base = 921600;
  2304. brd->ports[i].max_baud = 921600;
  2305. } else {
  2306. brd->ports[i].baud_base = 115200;
  2307. brd->ports[i].max_baud = 115200;
  2308. }
  2309. }
  2310. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2311. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2312. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2313. outb(scratch2, cap + UART_LCR);
  2314. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2315. scratch = inb(cap + UART_IIR);
  2316. if (scratch & 0xC0)
  2317. brd->uart_type = PORT_16550A;
  2318. else
  2319. brd->uart_type = PORT_16450;
  2320. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2321. "mxser(IO)"))
  2322. return MXSER_ERR_IOADDR;
  2323. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2324. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2325. return MXSER_ERR_VECTOR;
  2326. }
  2327. return brd->info->nports;
  2328. }
  2329. static int __devinit mxser_probe(struct pci_dev *pdev,
  2330. const struct pci_device_id *ent)
  2331. {
  2332. #ifdef CONFIG_PCI
  2333. struct mxser_board *brd;
  2334. unsigned int i, j;
  2335. unsigned long ioaddress;
  2336. int retval = -EINVAL;
  2337. for (i = 0; i < MXSER_BOARDS; i++)
  2338. if (mxser_boards[i].info == NULL)
  2339. break;
  2340. if (i >= MXSER_BOARDS) {
  2341. printk(KERN_ERR "Too many Smartio/Industio family boards found "
  2342. "(maximum %d), board not configured\n", MXSER_BOARDS);
  2343. goto err;
  2344. }
  2345. brd = &mxser_boards[i];
  2346. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2347. printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2348. mxser_cards[ent->driver_data].name,
  2349. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2350. retval = pci_enable_device(pdev);
  2351. if (retval) {
  2352. printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
  2353. goto err;
  2354. }
  2355. /* io address */
  2356. ioaddress = pci_resource_start(pdev, 2);
  2357. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2358. if (retval)
  2359. goto err;
  2360. brd->info = &mxser_cards[ent->driver_data];
  2361. for (i = 0; i < brd->info->nports; i++)
  2362. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2363. /* vector */
  2364. ioaddress = pci_resource_start(pdev, 3);
  2365. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2366. if (retval)
  2367. goto err_relio;
  2368. brd->vector = ioaddress;
  2369. /* irq */
  2370. brd->irq = pdev->irq;
  2371. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2372. brd->uart_type = PORT_16550A;
  2373. brd->vector_mask = 0;
  2374. for (i = 0; i < brd->info->nports; i++) {
  2375. for (j = 0; j < UART_INFO_NUM; j++) {
  2376. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2377. brd->ports[i].max_baud =
  2378. Gpci_uart_info[j].max_baud;
  2379. /* exception....CP-102 */
  2380. if (brd->info->flags & MXSER_HIGHBAUD)
  2381. brd->ports[i].max_baud = 921600;
  2382. break;
  2383. }
  2384. }
  2385. }
  2386. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2387. for (i = 0; i < brd->info->nports; i++) {
  2388. if (i < 4)
  2389. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2390. else
  2391. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2392. }
  2393. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2394. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2395. }
  2396. for (i = 0; i < brd->info->nports; i++) {
  2397. brd->vector_mask |= (1 << i);
  2398. brd->ports[i].baud_base = 921600;
  2399. }
  2400. /* mxser_initbrd will hook ISR. */
  2401. retval = mxser_initbrd(brd, pdev);
  2402. if (retval)
  2403. goto err_null;
  2404. for (i = 0; i < brd->info->nports; i++)
  2405. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2406. pci_set_drvdata(pdev, brd);
  2407. return 0;
  2408. err_relio:
  2409. pci_release_region(pdev, 2);
  2410. err_null:
  2411. brd->info = NULL;
  2412. err:
  2413. return retval;
  2414. #else
  2415. return -ENODEV;
  2416. #endif
  2417. }
  2418. static void __devexit mxser_remove(struct pci_dev *pdev)
  2419. {
  2420. struct mxser_board *brd = pci_get_drvdata(pdev);
  2421. unsigned int i;
  2422. for (i = 0; i < brd->info->nports; i++)
  2423. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2424. mxser_release_res(brd, pdev, 1);
  2425. brd->info = NULL;
  2426. }
  2427. static struct pci_driver mxser_driver = {
  2428. .name = "mxser",
  2429. .id_table = mxser_pcibrds,
  2430. .probe = mxser_probe,
  2431. .remove = __devexit_p(mxser_remove)
  2432. };
  2433. static int __init mxser_module_init(void)
  2434. {
  2435. struct mxser_board *brd;
  2436. unsigned long cap;
  2437. unsigned int i, m, isaloop;
  2438. int retval, b;
  2439. pr_debug("Loading module mxser ...\n");
  2440. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2441. if (!mxvar_sdriver)
  2442. return -ENOMEM;
  2443. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2444. MXSER_VERSION);
  2445. /* Initialize the tty_driver structure */
  2446. mxvar_sdriver->owner = THIS_MODULE;
  2447. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2448. mxvar_sdriver->name = "ttyMI";
  2449. mxvar_sdriver->major = ttymajor;
  2450. mxvar_sdriver->minor_start = 0;
  2451. mxvar_sdriver->num = MXSER_PORTS + 1;
  2452. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2453. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2454. mxvar_sdriver->init_termios = tty_std_termios;
  2455. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2456. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2457. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2458. retval = tty_register_driver(mxvar_sdriver);
  2459. if (retval) {
  2460. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2461. "tty driver !\n");
  2462. goto err_put;
  2463. }
  2464. mxvar_diagflag = 0;
  2465. m = 0;
  2466. /* Start finding ISA boards here */
  2467. for (isaloop = 0; isaloop < 2; isaloop++)
  2468. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  2469. if (!isaloop)
  2470. cap = mxserBoardCAP[b]; /* predefined */
  2471. else
  2472. cap = ioaddr[b]; /* module param */
  2473. if (!cap)
  2474. continue;
  2475. brd = &mxser_boards[m];
  2476. retval = mxser_get_ISA_conf(cap, brd);
  2477. if (retval != 0)
  2478. printk(KERN_INFO "Found MOXA %s board "
  2479. "(CAP=0x%x)\n",
  2480. brd->info->name, ioaddr[b]);
  2481. if (retval <= 0) {
  2482. if (retval == MXSER_ERR_IRQ)
  2483. printk(KERN_ERR "Invalid interrupt "
  2484. "number, board not "
  2485. "configured\n");
  2486. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  2487. printk(KERN_ERR "Invalid interrupt "
  2488. "number, board not "
  2489. "configured\n");
  2490. else if (retval == MXSER_ERR_VECTOR)
  2491. printk(KERN_ERR "Invalid interrupt "
  2492. "vector, board not "
  2493. "configured\n");
  2494. else if (retval == MXSER_ERR_IOADDR)
  2495. printk(KERN_ERR "Invalid I/O address, "
  2496. "board not configured\n");
  2497. brd->info = NULL;
  2498. continue;
  2499. }
  2500. /* mxser_initbrd will hook ISR. */
  2501. if (mxser_initbrd(brd, NULL) < 0) {
  2502. brd->info = NULL;
  2503. continue;
  2504. }
  2505. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2506. for (i = 0; i < brd->info->nports; i++)
  2507. tty_register_device(mxvar_sdriver, brd->idx + i,
  2508. NULL);
  2509. m++;
  2510. }
  2511. retval = pci_register_driver(&mxser_driver);
  2512. if (retval) {
  2513. printk(KERN_ERR "Can't register pci driver\n");
  2514. if (!m) {
  2515. retval = -ENODEV;
  2516. goto err_unr;
  2517. } /* else: we have some ISA cards under control */
  2518. }
  2519. pr_debug("Done.\n");
  2520. return 0;
  2521. err_unr:
  2522. tty_unregister_driver(mxvar_sdriver);
  2523. err_put:
  2524. put_tty_driver(mxvar_sdriver);
  2525. return retval;
  2526. }
  2527. static void __exit mxser_module_exit(void)
  2528. {
  2529. unsigned int i, j;
  2530. pr_debug("Unloading module mxser ...\n");
  2531. pci_unregister_driver(&mxser_driver);
  2532. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2533. if (mxser_boards[i].info != NULL)
  2534. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2535. tty_unregister_device(mxvar_sdriver,
  2536. mxser_boards[i].idx + j);
  2537. tty_unregister_driver(mxvar_sdriver);
  2538. put_tty_driver(mxvar_sdriver);
  2539. for (i = 0; i < MXSER_BOARDS; i++)
  2540. if (mxser_boards[i].info != NULL)
  2541. mxser_release_res(&mxser_boards[i], NULL, 1);
  2542. pr_debug("Done.\n");
  2543. }
  2544. module_init(mxser_module_init);
  2545. module_exit(mxser_module_exit);