pageattr.c 25 KB

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  1. /*
  2. * Copyright 2002 Andi Kleen, SuSE Labs.
  3. * Thanks to Ben LaHaise for precious feedback.
  4. */
  5. #include <linux/highmem.h>
  6. #include <linux/bootmem.h>
  7. #include <linux/module.h>
  8. #include <linux/sched.h>
  9. #include <linux/slab.h>
  10. #include <linux/mm.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/seq_file.h>
  13. #include <linux/debugfs.h>
  14. #include <asm/e820.h>
  15. #include <asm/processor.h>
  16. #include <asm/tlbflush.h>
  17. #include <asm/sections.h>
  18. #include <asm/uaccess.h>
  19. #include <asm/pgalloc.h>
  20. #include <asm/proto.h>
  21. #include <asm/pat.h>
  22. /*
  23. * The current flushing context - we pass it instead of 5 arguments:
  24. */
  25. struct cpa_data {
  26. unsigned long vaddr;
  27. pgprot_t mask_set;
  28. pgprot_t mask_clr;
  29. int numpages;
  30. int flushtlb;
  31. unsigned long pfn;
  32. unsigned force_split : 1;
  33. };
  34. #ifdef CONFIG_PROC_FS
  35. static unsigned long direct_pages_count[PG_LEVEL_NUM];
  36. void update_page_count(int level, unsigned long pages)
  37. {
  38. unsigned long flags;
  39. /* Protect against CPA */
  40. spin_lock_irqsave(&pgd_lock, flags);
  41. direct_pages_count[level] += pages;
  42. spin_unlock_irqrestore(&pgd_lock, flags);
  43. }
  44. static void split_page_count(int level)
  45. {
  46. direct_pages_count[level]--;
  47. direct_pages_count[level - 1] += PTRS_PER_PTE;
  48. }
  49. int arch_report_meminfo(char *page)
  50. {
  51. int n = sprintf(page, "DirectMap4k: %8lu\n"
  52. "DirectMap2M: %8lu\n",
  53. direct_pages_count[PG_LEVEL_4K],
  54. direct_pages_count[PG_LEVEL_2M]);
  55. #ifdef CONFIG_X86_64
  56. n += sprintf(page + n, "DirectMap1G: %8lu\n",
  57. direct_pages_count[PG_LEVEL_1G]);
  58. #endif
  59. return n;
  60. }
  61. #else
  62. static inline void split_page_count(int level) { }
  63. #endif
  64. #ifdef CONFIG_X86_64
  65. static inline unsigned long highmap_start_pfn(void)
  66. {
  67. return __pa(_text) >> PAGE_SHIFT;
  68. }
  69. static inline unsigned long highmap_end_pfn(void)
  70. {
  71. return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
  72. }
  73. #endif
  74. #ifdef CONFIG_DEBUG_PAGEALLOC
  75. # define debug_pagealloc 1
  76. #else
  77. # define debug_pagealloc 0
  78. #endif
  79. static inline int
  80. within(unsigned long addr, unsigned long start, unsigned long end)
  81. {
  82. return addr >= start && addr < end;
  83. }
  84. /*
  85. * Flushing functions
  86. */
  87. /**
  88. * clflush_cache_range - flush a cache range with clflush
  89. * @addr: virtual start address
  90. * @size: number of bytes to flush
  91. *
  92. * clflush is an unordered instruction which needs fencing with mfence
  93. * to avoid ordering issues.
  94. */
  95. void clflush_cache_range(void *vaddr, unsigned int size)
  96. {
  97. void *vend = vaddr + size - 1;
  98. mb();
  99. for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
  100. clflush(vaddr);
  101. /*
  102. * Flush any possible final partial cacheline:
  103. */
  104. clflush(vend);
  105. mb();
  106. }
  107. static void __cpa_flush_all(void *arg)
  108. {
  109. unsigned long cache = (unsigned long)arg;
  110. /*
  111. * Flush all to work around Errata in early athlons regarding
  112. * large page flushing.
  113. */
  114. __flush_tlb_all();
  115. if (cache && boot_cpu_data.x86_model >= 4)
  116. wbinvd();
  117. }
  118. static void cpa_flush_all(unsigned long cache)
  119. {
  120. BUG_ON(irqs_disabled());
  121. on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
  122. }
  123. static void __cpa_flush_range(void *arg)
  124. {
  125. /*
  126. * We could optimize that further and do individual per page
  127. * tlb invalidates for a low number of pages. Caveat: we must
  128. * flush the high aliases on 64bit as well.
  129. */
  130. __flush_tlb_all();
  131. }
  132. static void cpa_flush_range(unsigned long start, int numpages, int cache)
  133. {
  134. unsigned int i, level;
  135. unsigned long addr;
  136. BUG_ON(irqs_disabled());
  137. WARN_ON(PAGE_ALIGN(start) != start);
  138. on_each_cpu(__cpa_flush_range, NULL, 1, 1);
  139. if (!cache)
  140. return;
  141. /*
  142. * We only need to flush on one CPU,
  143. * clflush is a MESI-coherent instruction that
  144. * will cause all other CPUs to flush the same
  145. * cachelines:
  146. */
  147. for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
  148. pte_t *pte = lookup_address(addr, &level);
  149. /*
  150. * Only flush present addresses:
  151. */
  152. if (pte && (pte_val(*pte) & _PAGE_PRESENT))
  153. clflush_cache_range((void *) addr, PAGE_SIZE);
  154. }
  155. }
  156. /*
  157. * Certain areas of memory on x86 require very specific protection flags,
  158. * for example the BIOS area or kernel text. Callers don't always get this
  159. * right (again, ioremap() on BIOS memory is not uncommon) so this function
  160. * checks and fixes these known static required protection bits.
  161. */
  162. static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
  163. unsigned long pfn)
  164. {
  165. pgprot_t forbidden = __pgprot(0);
  166. /*
  167. * The BIOS area between 640k and 1Mb needs to be executable for
  168. * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
  169. */
  170. if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
  171. pgprot_val(forbidden) |= _PAGE_NX;
  172. /*
  173. * The kernel text needs to be executable for obvious reasons
  174. * Does not cover __inittext since that is gone later on. On
  175. * 64bit we do not enforce !NX on the low mapping
  176. */
  177. if (within(address, (unsigned long)_text, (unsigned long)_etext))
  178. pgprot_val(forbidden) |= _PAGE_NX;
  179. /*
  180. * The .rodata section needs to be read-only. Using the pfn
  181. * catches all aliases.
  182. */
  183. if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
  184. __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
  185. pgprot_val(forbidden) |= _PAGE_RW;
  186. prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
  187. return prot;
  188. }
  189. /*
  190. * Lookup the page table entry for a virtual address. Return a pointer
  191. * to the entry and the level of the mapping.
  192. *
  193. * Note: We return pud and pmd either when the entry is marked large
  194. * or when the present bit is not set. Otherwise we would return a
  195. * pointer to a nonexisting mapping.
  196. */
  197. pte_t *lookup_address(unsigned long address, unsigned int *level)
  198. {
  199. pgd_t *pgd = pgd_offset_k(address);
  200. pud_t *pud;
  201. pmd_t *pmd;
  202. *level = PG_LEVEL_NONE;
  203. if (pgd_none(*pgd))
  204. return NULL;
  205. pud = pud_offset(pgd, address);
  206. if (pud_none(*pud))
  207. return NULL;
  208. *level = PG_LEVEL_1G;
  209. if (pud_large(*pud) || !pud_present(*pud))
  210. return (pte_t *)pud;
  211. pmd = pmd_offset(pud, address);
  212. if (pmd_none(*pmd))
  213. return NULL;
  214. *level = PG_LEVEL_2M;
  215. if (pmd_large(*pmd) || !pmd_present(*pmd))
  216. return (pte_t *)pmd;
  217. *level = PG_LEVEL_4K;
  218. return pte_offset_kernel(pmd, address);
  219. }
  220. EXPORT_SYMBOL_GPL(lookup_address);
  221. /*
  222. * Set the new pmd in all the pgds we know about:
  223. */
  224. static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
  225. {
  226. /* change init_mm */
  227. set_pte_atomic(kpte, pte);
  228. #ifdef CONFIG_X86_32
  229. if (!SHARED_KERNEL_PMD) {
  230. struct page *page;
  231. list_for_each_entry(page, &pgd_list, lru) {
  232. pgd_t *pgd;
  233. pud_t *pud;
  234. pmd_t *pmd;
  235. pgd = (pgd_t *)page_address(page) + pgd_index(address);
  236. pud = pud_offset(pgd, address);
  237. pmd = pmd_offset(pud, address);
  238. set_pte_atomic((pte_t *)pmd, pte);
  239. }
  240. }
  241. #endif
  242. }
  243. static int
  244. try_preserve_large_page(pte_t *kpte, unsigned long address,
  245. struct cpa_data *cpa)
  246. {
  247. unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
  248. pte_t new_pte, old_pte, *tmp;
  249. pgprot_t old_prot, new_prot;
  250. int i, do_split = 1;
  251. unsigned int level;
  252. if (cpa->force_split)
  253. return 1;
  254. spin_lock_irqsave(&pgd_lock, flags);
  255. /*
  256. * Check for races, another CPU might have split this page
  257. * up already:
  258. */
  259. tmp = lookup_address(address, &level);
  260. if (tmp != kpte)
  261. goto out_unlock;
  262. switch (level) {
  263. case PG_LEVEL_2M:
  264. psize = PMD_PAGE_SIZE;
  265. pmask = PMD_PAGE_MASK;
  266. break;
  267. #ifdef CONFIG_X86_64
  268. case PG_LEVEL_1G:
  269. psize = PUD_PAGE_SIZE;
  270. pmask = PUD_PAGE_MASK;
  271. break;
  272. #endif
  273. default:
  274. do_split = -EINVAL;
  275. goto out_unlock;
  276. }
  277. /*
  278. * Calculate the number of pages, which fit into this large
  279. * page starting at address:
  280. */
  281. nextpage_addr = (address + psize) & pmask;
  282. numpages = (nextpage_addr - address) >> PAGE_SHIFT;
  283. if (numpages < cpa->numpages)
  284. cpa->numpages = numpages;
  285. /*
  286. * We are safe now. Check whether the new pgprot is the same:
  287. */
  288. old_pte = *kpte;
  289. old_prot = new_prot = pte_pgprot(old_pte);
  290. pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
  291. pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
  292. /*
  293. * old_pte points to the large page base address. So we need
  294. * to add the offset of the virtual address:
  295. */
  296. pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
  297. cpa->pfn = pfn;
  298. new_prot = static_protections(new_prot, address, pfn);
  299. /*
  300. * We need to check the full range, whether
  301. * static_protection() requires a different pgprot for one of
  302. * the pages in the range we try to preserve:
  303. */
  304. addr = address + PAGE_SIZE;
  305. pfn++;
  306. for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
  307. pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
  308. if (pgprot_val(chk_prot) != pgprot_val(new_prot))
  309. goto out_unlock;
  310. }
  311. /*
  312. * If there are no changes, return. maxpages has been updated
  313. * above:
  314. */
  315. if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
  316. do_split = 0;
  317. goto out_unlock;
  318. }
  319. /*
  320. * We need to change the attributes. Check, whether we can
  321. * change the large page in one go. We request a split, when
  322. * the address is not aligned and the number of pages is
  323. * smaller than the number of pages in the large page. Note
  324. * that we limited the number of possible pages already to
  325. * the number of pages in the large page.
  326. */
  327. if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
  328. /*
  329. * The address is aligned and the number of pages
  330. * covers the full page.
  331. */
  332. new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
  333. __set_pmd_pte(kpte, address, new_pte);
  334. cpa->flushtlb = 1;
  335. do_split = 0;
  336. }
  337. out_unlock:
  338. spin_unlock_irqrestore(&pgd_lock, flags);
  339. return do_split;
  340. }
  341. static LIST_HEAD(page_pool);
  342. static unsigned long pool_size, pool_pages, pool_low;
  343. static unsigned long pool_used, pool_failed;
  344. static void cpa_fill_pool(struct page **ret)
  345. {
  346. gfp_t gfp = GFP_KERNEL;
  347. unsigned long flags;
  348. struct page *p;
  349. /*
  350. * Avoid recursion (on debug-pagealloc) and also signal
  351. * our priority to get to these pagetables:
  352. */
  353. if (current->flags & PF_MEMALLOC)
  354. return;
  355. current->flags |= PF_MEMALLOC;
  356. /*
  357. * Allocate atomically from atomic contexts:
  358. */
  359. if (in_atomic() || irqs_disabled() || debug_pagealloc)
  360. gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
  361. while (pool_pages < pool_size || (ret && !*ret)) {
  362. p = alloc_pages(gfp, 0);
  363. if (!p) {
  364. pool_failed++;
  365. break;
  366. }
  367. /*
  368. * If the call site needs a page right now, provide it:
  369. */
  370. if (ret && !*ret) {
  371. *ret = p;
  372. continue;
  373. }
  374. spin_lock_irqsave(&pgd_lock, flags);
  375. list_add(&p->lru, &page_pool);
  376. pool_pages++;
  377. spin_unlock_irqrestore(&pgd_lock, flags);
  378. }
  379. current->flags &= ~PF_MEMALLOC;
  380. }
  381. #define SHIFT_MB (20 - PAGE_SHIFT)
  382. #define ROUND_MB_GB ((1 << 10) - 1)
  383. #define SHIFT_MB_GB 10
  384. #define POOL_PAGES_PER_GB 16
  385. void __init cpa_init(void)
  386. {
  387. struct sysinfo si;
  388. unsigned long gb;
  389. si_meminfo(&si);
  390. /*
  391. * Calculate the number of pool pages:
  392. *
  393. * Convert totalram (nr of pages) to MiB and round to the next
  394. * GiB. Shift MiB to Gib and multiply the result by
  395. * POOL_PAGES_PER_GB:
  396. */
  397. if (debug_pagealloc) {
  398. gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
  399. pool_size = POOL_PAGES_PER_GB * gb;
  400. } else {
  401. pool_size = 1;
  402. }
  403. pool_low = pool_size;
  404. cpa_fill_pool(NULL);
  405. printk(KERN_DEBUG
  406. "CPA: page pool initialized %lu of %lu pages preallocated\n",
  407. pool_pages, pool_size);
  408. }
  409. static int split_large_page(pte_t *kpte, unsigned long address)
  410. {
  411. unsigned long flags, pfn, pfninc = 1;
  412. unsigned int i, level;
  413. pte_t *pbase, *tmp;
  414. pgprot_t ref_prot;
  415. struct page *base;
  416. /*
  417. * Get a page from the pool. The pool list is protected by the
  418. * pgd_lock, which we have to take anyway for the split
  419. * operation:
  420. */
  421. spin_lock_irqsave(&pgd_lock, flags);
  422. if (list_empty(&page_pool)) {
  423. spin_unlock_irqrestore(&pgd_lock, flags);
  424. base = NULL;
  425. cpa_fill_pool(&base);
  426. if (!base)
  427. return -ENOMEM;
  428. spin_lock_irqsave(&pgd_lock, flags);
  429. } else {
  430. base = list_first_entry(&page_pool, struct page, lru);
  431. list_del(&base->lru);
  432. pool_pages--;
  433. if (pool_pages < pool_low)
  434. pool_low = pool_pages;
  435. }
  436. /*
  437. * Check for races, another CPU might have split this page
  438. * up for us already:
  439. */
  440. tmp = lookup_address(address, &level);
  441. if (tmp != kpte)
  442. goto out_unlock;
  443. pbase = (pte_t *)page_address(base);
  444. paravirt_alloc_pte(&init_mm, page_to_pfn(base));
  445. ref_prot = pte_pgprot(pte_clrhuge(*kpte));
  446. #ifdef CONFIG_X86_64
  447. if (level == PG_LEVEL_1G) {
  448. pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
  449. pgprot_val(ref_prot) |= _PAGE_PSE;
  450. }
  451. #endif
  452. /*
  453. * Get the target pfn from the original entry:
  454. */
  455. pfn = pte_pfn(*kpte);
  456. for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
  457. set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
  458. if (address >= (unsigned long)__va(0) &&
  459. address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
  460. split_page_count(level);
  461. #ifdef CONFIG_X86_64
  462. if (address >= (unsigned long)__va(1UL<<32) &&
  463. address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
  464. split_page_count(level);
  465. #endif
  466. /*
  467. * Install the new, split up pagetable. Important details here:
  468. *
  469. * On Intel the NX bit of all levels must be cleared to make a
  470. * page executable. See section 4.13.2 of Intel 64 and IA-32
  471. * Architectures Software Developer's Manual).
  472. *
  473. * Mark the entry present. The current mapping might be
  474. * set to not present, which we preserved above.
  475. */
  476. ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
  477. pgprot_val(ref_prot) |= _PAGE_PRESENT;
  478. __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
  479. base = NULL;
  480. out_unlock:
  481. /*
  482. * If we dropped out via the lookup_address check under
  483. * pgd_lock then stick the page back into the pool:
  484. */
  485. if (base) {
  486. list_add(&base->lru, &page_pool);
  487. pool_pages++;
  488. } else
  489. pool_used++;
  490. spin_unlock_irqrestore(&pgd_lock, flags);
  491. return 0;
  492. }
  493. static int __change_page_attr(struct cpa_data *cpa, int primary)
  494. {
  495. unsigned long address = cpa->vaddr;
  496. int do_split, err;
  497. unsigned int level;
  498. pte_t *kpte, old_pte;
  499. repeat:
  500. kpte = lookup_address(address, &level);
  501. if (!kpte)
  502. return 0;
  503. old_pte = *kpte;
  504. if (!pte_val(old_pte)) {
  505. if (!primary)
  506. return 0;
  507. printk(KERN_WARNING "CPA: called for zero pte. "
  508. "vaddr = %lx cpa->vaddr = %lx\n", address,
  509. cpa->vaddr);
  510. WARN_ON(1);
  511. return -EINVAL;
  512. }
  513. if (level == PG_LEVEL_4K) {
  514. pte_t new_pte;
  515. pgprot_t new_prot = pte_pgprot(old_pte);
  516. unsigned long pfn = pte_pfn(old_pte);
  517. pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
  518. pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
  519. new_prot = static_protections(new_prot, address, pfn);
  520. /*
  521. * We need to keep the pfn from the existing PTE,
  522. * after all we're only going to change it's attributes
  523. * not the memory it points to
  524. */
  525. new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
  526. cpa->pfn = pfn;
  527. /*
  528. * Do we really change anything ?
  529. */
  530. if (pte_val(old_pte) != pte_val(new_pte)) {
  531. set_pte_atomic(kpte, new_pte);
  532. cpa->flushtlb = 1;
  533. }
  534. cpa->numpages = 1;
  535. return 0;
  536. }
  537. /*
  538. * Check, whether we can keep the large page intact
  539. * and just change the pte:
  540. */
  541. do_split = try_preserve_large_page(kpte, address, cpa);
  542. /*
  543. * When the range fits into the existing large page,
  544. * return. cp->numpages and cpa->tlbflush have been updated in
  545. * try_large_page:
  546. */
  547. if (do_split <= 0)
  548. return do_split;
  549. /*
  550. * We have to split the large page:
  551. */
  552. err = split_large_page(kpte, address);
  553. if (!err) {
  554. cpa->flushtlb = 1;
  555. goto repeat;
  556. }
  557. return err;
  558. }
  559. static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
  560. static int cpa_process_alias(struct cpa_data *cpa)
  561. {
  562. struct cpa_data alias_cpa;
  563. int ret = 0;
  564. if (cpa->pfn >= max_pfn_mapped)
  565. return 0;
  566. #ifdef CONFIG_X86_64
  567. if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
  568. return 0;
  569. #endif
  570. /*
  571. * No need to redo, when the primary call touched the direct
  572. * mapping already:
  573. */
  574. if (!(within(cpa->vaddr, PAGE_OFFSET,
  575. PAGE_OFFSET + (max_low_pfn_mapped << PAGE_SHIFT))
  576. #ifdef CONFIG_X86_64
  577. || within(cpa->vaddr, PAGE_OFFSET + (1UL<<32),
  578. PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))
  579. #endif
  580. )) {
  581. alias_cpa = *cpa;
  582. alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
  583. ret = __change_page_attr_set_clr(&alias_cpa, 0);
  584. }
  585. #ifdef CONFIG_X86_64
  586. if (ret)
  587. return ret;
  588. /*
  589. * No need to redo, when the primary call touched the high
  590. * mapping already:
  591. */
  592. if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end))
  593. return 0;
  594. /*
  595. * If the physical address is inside the kernel map, we need
  596. * to touch the high mapped kernel as well:
  597. */
  598. if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
  599. return 0;
  600. alias_cpa = *cpa;
  601. alias_cpa.vaddr =
  602. (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
  603. /*
  604. * The high mapping range is imprecise, so ignore the return value.
  605. */
  606. __change_page_attr_set_clr(&alias_cpa, 0);
  607. #endif
  608. return ret;
  609. }
  610. static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
  611. {
  612. int ret, numpages = cpa->numpages;
  613. while (numpages) {
  614. /*
  615. * Store the remaining nr of pages for the large page
  616. * preservation check.
  617. */
  618. cpa->numpages = numpages;
  619. ret = __change_page_attr(cpa, checkalias);
  620. if (ret)
  621. return ret;
  622. if (checkalias) {
  623. ret = cpa_process_alias(cpa);
  624. if (ret)
  625. return ret;
  626. }
  627. /*
  628. * Adjust the number of pages with the result of the
  629. * CPA operation. Either a large page has been
  630. * preserved or a single page update happened.
  631. */
  632. BUG_ON(cpa->numpages > numpages);
  633. numpages -= cpa->numpages;
  634. cpa->vaddr += cpa->numpages * PAGE_SIZE;
  635. }
  636. return 0;
  637. }
  638. static inline int cache_attr(pgprot_t attr)
  639. {
  640. return pgprot_val(attr) &
  641. (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
  642. }
  643. static int change_page_attr_set_clr(unsigned long addr, int numpages,
  644. pgprot_t mask_set, pgprot_t mask_clr,
  645. int force_split)
  646. {
  647. struct cpa_data cpa;
  648. int ret, cache, checkalias;
  649. /*
  650. * Check, if we are requested to change a not supported
  651. * feature:
  652. */
  653. mask_set = canon_pgprot(mask_set);
  654. mask_clr = canon_pgprot(mask_clr);
  655. if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
  656. return 0;
  657. /* Ensure we are PAGE_SIZE aligned */
  658. if (addr & ~PAGE_MASK) {
  659. addr &= PAGE_MASK;
  660. /*
  661. * People should not be passing in unaligned addresses:
  662. */
  663. WARN_ON_ONCE(1);
  664. }
  665. cpa.vaddr = addr;
  666. cpa.numpages = numpages;
  667. cpa.mask_set = mask_set;
  668. cpa.mask_clr = mask_clr;
  669. cpa.flushtlb = 0;
  670. cpa.force_split = force_split;
  671. /* No alias checking for _NX bit modifications */
  672. checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
  673. ret = __change_page_attr_set_clr(&cpa, checkalias);
  674. /*
  675. * Check whether we really changed something:
  676. */
  677. if (!cpa.flushtlb)
  678. goto out;
  679. /*
  680. * No need to flush, when we did not set any of the caching
  681. * attributes:
  682. */
  683. cache = cache_attr(mask_set);
  684. /*
  685. * On success we use clflush, when the CPU supports it to
  686. * avoid the wbindv. If the CPU does not support it and in the
  687. * error case we fall back to cpa_flush_all (which uses
  688. * wbindv):
  689. */
  690. if (!ret && cpu_has_clflush)
  691. cpa_flush_range(addr, numpages, cache);
  692. else
  693. cpa_flush_all(cache);
  694. out:
  695. cpa_fill_pool(NULL);
  696. return ret;
  697. }
  698. static inline int change_page_attr_set(unsigned long addr, int numpages,
  699. pgprot_t mask)
  700. {
  701. return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0);
  702. }
  703. static inline int change_page_attr_clear(unsigned long addr, int numpages,
  704. pgprot_t mask)
  705. {
  706. return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0);
  707. }
  708. int _set_memory_uc(unsigned long addr, int numpages)
  709. {
  710. /*
  711. * for now UC MINUS. see comments in ioremap_nocache()
  712. */
  713. return change_page_attr_set(addr, numpages,
  714. __pgprot(_PAGE_CACHE_UC_MINUS));
  715. }
  716. int set_memory_uc(unsigned long addr, int numpages)
  717. {
  718. /*
  719. * for now UC MINUS. see comments in ioremap_nocache()
  720. */
  721. if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
  722. _PAGE_CACHE_UC_MINUS, NULL))
  723. return -EINVAL;
  724. return _set_memory_uc(addr, numpages);
  725. }
  726. EXPORT_SYMBOL(set_memory_uc);
  727. int _set_memory_wc(unsigned long addr, int numpages)
  728. {
  729. return change_page_attr_set(addr, numpages,
  730. __pgprot(_PAGE_CACHE_WC));
  731. }
  732. int set_memory_wc(unsigned long addr, int numpages)
  733. {
  734. if (!pat_enabled)
  735. return set_memory_uc(addr, numpages);
  736. if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
  737. _PAGE_CACHE_WC, NULL))
  738. return -EINVAL;
  739. return _set_memory_wc(addr, numpages);
  740. }
  741. EXPORT_SYMBOL(set_memory_wc);
  742. int _set_memory_wb(unsigned long addr, int numpages)
  743. {
  744. return change_page_attr_clear(addr, numpages,
  745. __pgprot(_PAGE_CACHE_MASK));
  746. }
  747. int set_memory_wb(unsigned long addr, int numpages)
  748. {
  749. free_memtype(addr, addr + numpages * PAGE_SIZE);
  750. return _set_memory_wb(addr, numpages);
  751. }
  752. EXPORT_SYMBOL(set_memory_wb);
  753. int set_memory_x(unsigned long addr, int numpages)
  754. {
  755. return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
  756. }
  757. EXPORT_SYMBOL(set_memory_x);
  758. int set_memory_nx(unsigned long addr, int numpages)
  759. {
  760. return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
  761. }
  762. EXPORT_SYMBOL(set_memory_nx);
  763. int set_memory_ro(unsigned long addr, int numpages)
  764. {
  765. return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
  766. }
  767. int set_memory_rw(unsigned long addr, int numpages)
  768. {
  769. return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
  770. }
  771. int set_memory_np(unsigned long addr, int numpages)
  772. {
  773. return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
  774. }
  775. int set_memory_4k(unsigned long addr, int numpages)
  776. {
  777. return change_page_attr_set_clr(addr, numpages, __pgprot(0),
  778. __pgprot(0), 1);
  779. }
  780. int set_pages_uc(struct page *page, int numpages)
  781. {
  782. unsigned long addr = (unsigned long)page_address(page);
  783. return set_memory_uc(addr, numpages);
  784. }
  785. EXPORT_SYMBOL(set_pages_uc);
  786. int set_pages_wb(struct page *page, int numpages)
  787. {
  788. unsigned long addr = (unsigned long)page_address(page);
  789. return set_memory_wb(addr, numpages);
  790. }
  791. EXPORT_SYMBOL(set_pages_wb);
  792. int set_pages_x(struct page *page, int numpages)
  793. {
  794. unsigned long addr = (unsigned long)page_address(page);
  795. return set_memory_x(addr, numpages);
  796. }
  797. EXPORT_SYMBOL(set_pages_x);
  798. int set_pages_nx(struct page *page, int numpages)
  799. {
  800. unsigned long addr = (unsigned long)page_address(page);
  801. return set_memory_nx(addr, numpages);
  802. }
  803. EXPORT_SYMBOL(set_pages_nx);
  804. int set_pages_ro(struct page *page, int numpages)
  805. {
  806. unsigned long addr = (unsigned long)page_address(page);
  807. return set_memory_ro(addr, numpages);
  808. }
  809. int set_pages_rw(struct page *page, int numpages)
  810. {
  811. unsigned long addr = (unsigned long)page_address(page);
  812. return set_memory_rw(addr, numpages);
  813. }
  814. #ifdef CONFIG_DEBUG_PAGEALLOC
  815. static int __set_pages_p(struct page *page, int numpages)
  816. {
  817. struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
  818. .numpages = numpages,
  819. .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
  820. .mask_clr = __pgprot(0)};
  821. return __change_page_attr_set_clr(&cpa, 1);
  822. }
  823. static int __set_pages_np(struct page *page, int numpages)
  824. {
  825. struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
  826. .numpages = numpages,
  827. .mask_set = __pgprot(0),
  828. .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
  829. return __change_page_attr_set_clr(&cpa, 1);
  830. }
  831. void kernel_map_pages(struct page *page, int numpages, int enable)
  832. {
  833. if (PageHighMem(page))
  834. return;
  835. if (!enable) {
  836. debug_check_no_locks_freed(page_address(page),
  837. numpages * PAGE_SIZE);
  838. }
  839. /*
  840. * If page allocator is not up yet then do not call c_p_a():
  841. */
  842. if (!debug_pagealloc_enabled)
  843. return;
  844. /*
  845. * The return value is ignored as the calls cannot fail.
  846. * Large pages are kept enabled at boot time, and are
  847. * split up quickly with DEBUG_PAGEALLOC. If a splitup
  848. * fails here (due to temporary memory shortage) no damage
  849. * is done because we just keep the largepage intact up
  850. * to the next attempt when it will likely be split up:
  851. */
  852. if (enable)
  853. __set_pages_p(page, numpages);
  854. else
  855. __set_pages_np(page, numpages);
  856. /*
  857. * We should perform an IPI and flush all tlbs,
  858. * but that can deadlock->flush only current cpu:
  859. */
  860. __flush_tlb_all();
  861. /*
  862. * Try to refill the page pool here. We can do this only after
  863. * the tlb flush.
  864. */
  865. cpa_fill_pool(NULL);
  866. }
  867. #ifdef CONFIG_DEBUG_FS
  868. static int dpa_show(struct seq_file *m, void *v)
  869. {
  870. seq_puts(m, "DEBUG_PAGEALLOC\n");
  871. seq_printf(m, "pool_size : %lu\n", pool_size);
  872. seq_printf(m, "pool_pages : %lu\n", pool_pages);
  873. seq_printf(m, "pool_low : %lu\n", pool_low);
  874. seq_printf(m, "pool_used : %lu\n", pool_used);
  875. seq_printf(m, "pool_failed : %lu\n", pool_failed);
  876. return 0;
  877. }
  878. static int dpa_open(struct inode *inode, struct file *filp)
  879. {
  880. return single_open(filp, dpa_show, NULL);
  881. }
  882. static const struct file_operations dpa_fops = {
  883. .open = dpa_open,
  884. .read = seq_read,
  885. .llseek = seq_lseek,
  886. .release = single_release,
  887. };
  888. static int __init debug_pagealloc_proc_init(void)
  889. {
  890. struct dentry *de;
  891. de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
  892. &dpa_fops);
  893. if (!de)
  894. return -ENOMEM;
  895. return 0;
  896. }
  897. __initcall(debug_pagealloc_proc_init);
  898. #endif
  899. #ifdef CONFIG_HIBERNATION
  900. bool kernel_page_present(struct page *page)
  901. {
  902. unsigned int level;
  903. pte_t *pte;
  904. if (PageHighMem(page))
  905. return false;
  906. pte = lookup_address((unsigned long)page_address(page), &level);
  907. return (pte_val(*pte) & _PAGE_PRESENT);
  908. }
  909. #endif /* CONFIG_HIBERNATION */
  910. #endif /* CONFIG_DEBUG_PAGEALLOC */
  911. /*
  912. * The testcases use internal knowledge of the implementation that shouldn't
  913. * be exposed to the rest of the kernel. Include these directly here.
  914. */
  915. #ifdef CONFIG_CPA_DEBUG
  916. #include "pageattr-test.c"
  917. #endif