nmi.c 12 KB

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  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
  10. * Pavel Machek and
  11. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  12. */
  13. #include <asm/apic.h>
  14. #include <linux/nmi.h>
  15. #include <linux/mm.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #include <linux/sysdev.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/percpu.h>
  22. #include <linux/kprobes.h>
  23. #include <linux/cpumask.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/smp.h>
  27. #include <asm/i8259.h>
  28. #include <asm/io_apic.h>
  29. #include <asm/smp.h>
  30. #include <asm/nmi.h>
  31. #include <asm/proto.h>
  32. #include <asm/timer.h>
  33. #include <asm/mce.h>
  34. #include <mach_traps.h>
  35. int unknown_nmi_panic;
  36. int nmi_watchdog_enabled;
  37. static cpumask_t backtrace_mask = CPU_MASK_NONE;
  38. /* nmi_active:
  39. * >0: the lapic NMI watchdog is active, but can be disabled
  40. * <0: the lapic NMI watchdog has not been set up, and cannot
  41. * be enabled
  42. * 0: the lapic NMI watchdog is disabled, but can be enabled
  43. */
  44. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  45. EXPORT_SYMBOL(nmi_active);
  46. unsigned int nmi_watchdog = NMI_NONE;
  47. EXPORT_SYMBOL(nmi_watchdog);
  48. static int panic_on_timeout;
  49. static unsigned int nmi_hz = HZ;
  50. static DEFINE_PER_CPU(short, wd_enabled);
  51. static int endflag __initdata;
  52. static inline unsigned int get_nmi_count(int cpu)
  53. {
  54. #ifdef CONFIG_X86_64
  55. return cpu_pda(cpu)->__nmi_count;
  56. #else
  57. return nmi_count(cpu);
  58. #endif
  59. }
  60. static inline int mce_in_progress(void)
  61. {
  62. #if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
  63. return atomic_read(&mce_entry) > 0;
  64. #endif
  65. return 0;
  66. }
  67. /*
  68. * Take the local apic timer and PIT/HPET into account. We don't
  69. * know which one is active, when we have highres/dyntick on
  70. */
  71. static inline unsigned int get_timer_irqs(int cpu)
  72. {
  73. #ifdef CONFIG_X86_64
  74. return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
  75. #else
  76. return per_cpu(irq_stat, cpu).apic_timer_irqs +
  77. per_cpu(irq_stat, cpu).irq0_irqs;
  78. #endif
  79. }
  80. #ifdef CONFIG_SMP
  81. /*
  82. * The performance counters used by NMI_LOCAL_APIC don't trigger when
  83. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  84. * CPUs during the test make them busy.
  85. */
  86. static __init void nmi_cpu_busy(void *data)
  87. {
  88. local_irq_enable_in_hardirq();
  89. /*
  90. * Intentionally don't use cpu_relax here. This is
  91. * to make sure that the performance counter really ticks,
  92. * even if there is a simulator or similar that catches the
  93. * pause instruction. On a real HT machine this is fine because
  94. * all other CPUs are busy with "useless" delay loops and don't
  95. * care if they get somewhat less cycles.
  96. */
  97. while (endflag == 0)
  98. mb();
  99. }
  100. #endif
  101. int __init check_nmi_watchdog(void)
  102. {
  103. unsigned int *prev_nmi_count;
  104. int cpu;
  105. if (!nmi_watchdog_active() || !atomic_read(&nmi_active))
  106. return 0;
  107. prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
  108. if (!prev_nmi_count)
  109. goto error;
  110. printk(KERN_INFO "Testing NMI watchdog ... ");
  111. #ifdef CONFIG_SMP
  112. if (nmi_watchdog == NMI_LOCAL_APIC)
  113. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0);
  114. #endif
  115. for_each_possible_cpu(cpu)
  116. prev_nmi_count[cpu] = get_nmi_count(cpu);
  117. local_irq_enable();
  118. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  119. for_each_online_cpu(cpu) {
  120. if (!per_cpu(wd_enabled, cpu))
  121. continue;
  122. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) {
  123. printk(KERN_WARNING "WARNING: CPU#%d: NMI "
  124. "appears to be stuck (%d->%d)!\n",
  125. cpu,
  126. prev_nmi_count[cpu],
  127. get_nmi_count(cpu));
  128. per_cpu(wd_enabled, cpu) = 0;
  129. atomic_dec(&nmi_active);
  130. }
  131. }
  132. endflag = 1;
  133. if (!atomic_read(&nmi_active)) {
  134. kfree(prev_nmi_count);
  135. atomic_set(&nmi_active, -1);
  136. goto error;
  137. }
  138. printk("OK.\n");
  139. /*
  140. * now that we know it works we can reduce NMI frequency to
  141. * something more reasonable; makes a difference in some configs
  142. */
  143. if (nmi_watchdog == NMI_LOCAL_APIC)
  144. nmi_hz = lapic_adjust_nmi_hz(1);
  145. kfree(prev_nmi_count);
  146. return 0;
  147. error:
  148. if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
  149. disable_8259A_irq(0);
  150. #ifdef CONFIG_X86_32
  151. timer_ack = 0;
  152. #endif
  153. return -1;
  154. }
  155. static int __init setup_nmi_watchdog(char *str)
  156. {
  157. unsigned int nmi;
  158. if (!strncmp(str, "panic", 5)) {
  159. panic_on_timeout = 1;
  160. str = strchr(str, ',');
  161. if (!str)
  162. return 1;
  163. ++str;
  164. }
  165. get_option(&str, &nmi);
  166. if (nmi >= NMI_INVALID)
  167. return 0;
  168. nmi_watchdog = nmi;
  169. return 1;
  170. }
  171. __setup("nmi_watchdog=", setup_nmi_watchdog);
  172. /*
  173. * Suspend/resume support
  174. */
  175. #ifdef CONFIG_PM
  176. static int nmi_pm_active; /* nmi_active before suspend */
  177. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  178. {
  179. /* only CPU0 goes here, other CPUs should be offline */
  180. nmi_pm_active = atomic_read(&nmi_active);
  181. stop_apic_nmi_watchdog(NULL);
  182. BUG_ON(atomic_read(&nmi_active) != 0);
  183. return 0;
  184. }
  185. static int lapic_nmi_resume(struct sys_device *dev)
  186. {
  187. /* only CPU0 goes here, other CPUs should be offline */
  188. if (nmi_pm_active > 0) {
  189. setup_apic_nmi_watchdog(NULL);
  190. touch_nmi_watchdog();
  191. }
  192. return 0;
  193. }
  194. static struct sysdev_class nmi_sysclass = {
  195. .name = "lapic_nmi",
  196. .resume = lapic_nmi_resume,
  197. .suspend = lapic_nmi_suspend,
  198. };
  199. static struct sys_device device_lapic_nmi = {
  200. .id = 0,
  201. .cls = &nmi_sysclass,
  202. };
  203. static int __init init_lapic_nmi_sysfs(void)
  204. {
  205. int error;
  206. /*
  207. * should really be a BUG_ON but b/c this is an
  208. * init call, it just doesn't work. -dcz
  209. */
  210. if (nmi_watchdog != NMI_LOCAL_APIC)
  211. return 0;
  212. if (atomic_read(&nmi_active) < 0)
  213. return 0;
  214. error = sysdev_class_register(&nmi_sysclass);
  215. if (!error)
  216. error = sysdev_register(&device_lapic_nmi);
  217. return error;
  218. }
  219. /* must come after the local APIC's device_initcall() */
  220. late_initcall(init_lapic_nmi_sysfs);
  221. #endif /* CONFIG_PM */
  222. static void __acpi_nmi_enable(void *__unused)
  223. {
  224. apic_write_around(APIC_LVT0, APIC_DM_NMI);
  225. }
  226. /*
  227. * Enable timer based NMIs on all CPUs:
  228. */
  229. void acpi_nmi_enable(void)
  230. {
  231. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  232. on_each_cpu(__acpi_nmi_enable, NULL, 0, 1);
  233. }
  234. static void __acpi_nmi_disable(void *__unused)
  235. {
  236. apic_write_around(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  237. }
  238. /*
  239. * Disable timer based NMIs on all CPUs:
  240. */
  241. void acpi_nmi_disable(void)
  242. {
  243. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  244. on_each_cpu(__acpi_nmi_disable, NULL, 0, 1);
  245. }
  246. void setup_apic_nmi_watchdog(void *unused)
  247. {
  248. if (__get_cpu_var(wd_enabled))
  249. return;
  250. /* cheap hack to support suspend/resume */
  251. /* if cpu0 is not active neither should the other cpus */
  252. if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
  253. return;
  254. switch (nmi_watchdog) {
  255. case NMI_LOCAL_APIC:
  256. /* enable it before to avoid race with handler */
  257. __get_cpu_var(wd_enabled) = 1;
  258. if (lapic_watchdog_init(nmi_hz) < 0) {
  259. __get_cpu_var(wd_enabled) = 0;
  260. return;
  261. }
  262. /* FALL THROUGH */
  263. case NMI_IO_APIC:
  264. __get_cpu_var(wd_enabled) = 1;
  265. atomic_inc(&nmi_active);
  266. }
  267. }
  268. void stop_apic_nmi_watchdog(void *unused)
  269. {
  270. /* only support LOCAL and IO APICs for now */
  271. if (!nmi_watchdog_active())
  272. return;
  273. if (__get_cpu_var(wd_enabled) == 0)
  274. return;
  275. if (nmi_watchdog == NMI_LOCAL_APIC)
  276. lapic_watchdog_stop();
  277. __get_cpu_var(wd_enabled) = 0;
  278. atomic_dec(&nmi_active);
  279. }
  280. /*
  281. * the best way to detect whether a CPU has a 'hard lockup' problem
  282. * is to check it's local APIC timer IRQ counts. If they are not
  283. * changing then that CPU has some problem.
  284. *
  285. * as these watchdog NMI IRQs are generated on every CPU, we only
  286. * have to check the current processor.
  287. *
  288. * since NMIs don't listen to _any_ locks, we have to be extremely
  289. * careful not to rely on unsafe variables. The printk might lock
  290. * up though, so we have to break up any console locks first ...
  291. * [when there will be more tty-related locks, break them up here too!]
  292. */
  293. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  294. static DEFINE_PER_CPU(local_t, alert_counter);
  295. static DEFINE_PER_CPU(int, nmi_touch);
  296. void touch_nmi_watchdog(void)
  297. {
  298. if (nmi_watchdog_active()) {
  299. unsigned cpu;
  300. /*
  301. * Tell other CPUs to reset their alert counters. We cannot
  302. * do it ourselves because the alert count increase is not
  303. * atomic.
  304. */
  305. for_each_present_cpu(cpu) {
  306. if (per_cpu(nmi_touch, cpu) != 1)
  307. per_cpu(nmi_touch, cpu) = 1;
  308. }
  309. }
  310. /*
  311. * Tickle the softlockup detector too:
  312. */
  313. touch_softlockup_watchdog();
  314. }
  315. EXPORT_SYMBOL(touch_nmi_watchdog);
  316. notrace __kprobes int
  317. nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
  318. {
  319. /*
  320. * Since current_thread_info()-> is always on the stack, and we
  321. * always switch the stack NMI-atomically, it's safe to use
  322. * smp_processor_id().
  323. */
  324. unsigned int sum;
  325. int touched = 0;
  326. int cpu = smp_processor_id();
  327. int rc = 0;
  328. /* check for other users first */
  329. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
  330. == NOTIFY_STOP) {
  331. rc = 1;
  332. touched = 1;
  333. }
  334. sum = get_timer_irqs(cpu);
  335. if (__get_cpu_var(nmi_touch)) {
  336. __get_cpu_var(nmi_touch) = 0;
  337. touched = 1;
  338. }
  339. if (cpu_isset(cpu, backtrace_mask)) {
  340. static DEFINE_SPINLOCK(lock); /* Serialise the printks */
  341. spin_lock(&lock);
  342. printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
  343. dump_stack();
  344. spin_unlock(&lock);
  345. cpu_clear(cpu, backtrace_mask);
  346. }
  347. /* Could check oops_in_progress here too, but it's safer not to */
  348. if (mce_in_progress())
  349. touched = 1;
  350. /* if the none of the timers isn't firing, this cpu isn't doing much */
  351. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  352. /*
  353. * Ayiee, looks like this CPU is stuck ...
  354. * wait a few IRQs (5 seconds) before doing the oops ...
  355. */
  356. local_inc(&__get_cpu_var(alert_counter));
  357. if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
  358. /*
  359. * die_nmi will return ONLY if NOTIFY_STOP happens..
  360. */
  361. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  362. regs, panic_on_timeout);
  363. } else {
  364. __get_cpu_var(last_irq_sum) = sum;
  365. local_set(&__get_cpu_var(alert_counter), 0);
  366. }
  367. /* see if the nmi watchdog went off */
  368. if (!__get_cpu_var(wd_enabled))
  369. return rc;
  370. switch (nmi_watchdog) {
  371. case NMI_LOCAL_APIC:
  372. rc |= lapic_wd_event(nmi_hz);
  373. break;
  374. case NMI_IO_APIC:
  375. /*
  376. * don't know how to accurately check for this.
  377. * just assume it was a watchdog timer interrupt
  378. * This matches the old behaviour.
  379. */
  380. rc = 1;
  381. break;
  382. }
  383. return rc;
  384. }
  385. #ifdef CONFIG_SYSCTL
  386. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  387. {
  388. unsigned char reason = get_nmi_reason();
  389. char buf[64];
  390. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  391. die_nmi(buf, regs, 1); /* Always panic here */
  392. return 0;
  393. }
  394. /*
  395. * proc handler for /proc/sys/kernel/nmi
  396. */
  397. int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
  398. void __user *buffer, size_t *length, loff_t *ppos)
  399. {
  400. int old_state;
  401. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  402. old_state = nmi_watchdog_enabled;
  403. proc_dointvec(table, write, file, buffer, length, ppos);
  404. if (!!old_state == !!nmi_watchdog_enabled)
  405. return 0;
  406. if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) {
  407. printk(KERN_WARNING
  408. "NMI watchdog is permanently disabled\n");
  409. return -EIO;
  410. }
  411. if (nmi_watchdog == NMI_LOCAL_APIC) {
  412. if (nmi_watchdog_enabled)
  413. enable_lapic_nmi_watchdog();
  414. else
  415. disable_lapic_nmi_watchdog();
  416. } else {
  417. printk(KERN_WARNING
  418. "NMI watchdog doesn't know what hardware to touch\n");
  419. return -EIO;
  420. }
  421. return 0;
  422. }
  423. #endif /* CONFIG_SYSCTL */
  424. int do_nmi_callback(struct pt_regs *regs, int cpu)
  425. {
  426. #ifdef CONFIG_SYSCTL
  427. if (unknown_nmi_panic)
  428. return unknown_nmi_panic_callback(regs, cpu);
  429. #endif
  430. return 0;
  431. }
  432. void __trigger_all_cpu_backtrace(void)
  433. {
  434. int i;
  435. backtrace_mask = cpu_online_map;
  436. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  437. for (i = 0; i < 10 * 1000; i++) {
  438. if (cpus_empty(backtrace_mask))
  439. break;
  440. mdelay(1);
  441. }
  442. }