i387.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539
  1. /*
  2. * Copyright (C) 1994 Linus Torvalds
  3. *
  4. * Pentium III FXSR, SSE support
  5. * General FPU state handling cleanups
  6. * Gareth Hughes <gareth@valinux.com>, May 2000
  7. */
  8. #include <linux/module.h>
  9. #include <linux/regset.h>
  10. #include <linux/sched.h>
  11. #include <asm/sigcontext.h>
  12. #include <asm/processor.h>
  13. #include <asm/math_emu.h>
  14. #include <asm/uaccess.h>
  15. #include <asm/ptrace.h>
  16. #include <asm/i387.h>
  17. #include <asm/user.h>
  18. #ifdef CONFIG_X86_64
  19. # include <asm/sigcontext32.h>
  20. # include <asm/user32.h>
  21. #else
  22. # define save_i387_ia32 save_i387
  23. # define restore_i387_ia32 restore_i387
  24. # define _fpstate_ia32 _fpstate
  25. # define user_i387_ia32_struct user_i387_struct
  26. # define user32_fxsr_struct user_fxsr_struct
  27. #endif
  28. #ifdef CONFIG_MATH_EMULATION
  29. # define HAVE_HWFP (boot_cpu_data.hard_math)
  30. #else
  31. # define HAVE_HWFP 1
  32. #endif
  33. static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
  34. unsigned int xstate_size;
  35. static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  36. void __cpuinit mxcsr_feature_mask_init(void)
  37. {
  38. unsigned long mask = 0;
  39. clts();
  40. if (cpu_has_fxsr) {
  41. memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  42. asm volatile("fxsave %0" : : "m" (fx_scratch));
  43. mask = fx_scratch.mxcsr_mask;
  44. if (mask == 0)
  45. mask = 0x0000ffbf;
  46. }
  47. mxcsr_feature_mask &= mask;
  48. stts();
  49. }
  50. void __init init_thread_xstate(void)
  51. {
  52. if (!HAVE_HWFP) {
  53. xstate_size = sizeof(struct i387_soft_struct);
  54. return;
  55. }
  56. if (cpu_has_fxsr)
  57. xstate_size = sizeof(struct i387_fxsave_struct);
  58. #ifdef CONFIG_X86_32
  59. else
  60. xstate_size = sizeof(struct i387_fsave_struct);
  61. #endif
  62. }
  63. #ifdef CONFIG_X86_64
  64. /*
  65. * Called at bootup to set up the initial FPU state that is later cloned
  66. * into all processes.
  67. */
  68. void __cpuinit fpu_init(void)
  69. {
  70. unsigned long oldcr0 = read_cr0();
  71. set_in_cr4(X86_CR4_OSFXSR);
  72. set_in_cr4(X86_CR4_OSXMMEXCPT);
  73. write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  74. mxcsr_feature_mask_init();
  75. /* clean state in init */
  76. current_thread_info()->status = 0;
  77. clear_used_math();
  78. }
  79. #endif /* CONFIG_X86_64 */
  80. /*
  81. * The _current_ task is using the FPU for the first time
  82. * so initialize it and set the mxcsr to its default
  83. * value at reset if we support XMM instructions and then
  84. * remeber the current task has used the FPU.
  85. */
  86. int init_fpu(struct task_struct *tsk)
  87. {
  88. if (tsk_used_math(tsk)) {
  89. if (HAVE_HWFP && tsk == current)
  90. unlazy_fpu(tsk);
  91. return 0;
  92. }
  93. /*
  94. * Memory allocation at the first usage of the FPU and other state.
  95. */
  96. if (!tsk->thread.xstate) {
  97. tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
  98. GFP_KERNEL);
  99. if (!tsk->thread.xstate)
  100. return -ENOMEM;
  101. }
  102. #ifdef CONFIG_X86_32
  103. if (!HAVE_HWFP) {
  104. memset(tsk->thread.xstate, 0, xstate_size);
  105. finit();
  106. set_stopped_child_used_math(tsk);
  107. return 0;
  108. }
  109. #endif
  110. if (cpu_has_fxsr) {
  111. struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
  112. memset(fx, 0, xstate_size);
  113. fx->cwd = 0x37f;
  114. if (cpu_has_xmm)
  115. fx->mxcsr = MXCSR_DEFAULT;
  116. } else {
  117. struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
  118. memset(fp, 0, xstate_size);
  119. fp->cwd = 0xffff037fu;
  120. fp->swd = 0xffff0000u;
  121. fp->twd = 0xffffffffu;
  122. fp->fos = 0xffff0000u;
  123. }
  124. /*
  125. * Only the device not available exception or ptrace can call init_fpu.
  126. */
  127. set_stopped_child_used_math(tsk);
  128. return 0;
  129. }
  130. int fpregs_active(struct task_struct *target, const struct user_regset *regset)
  131. {
  132. return tsk_used_math(target) ? regset->n : 0;
  133. }
  134. int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
  135. {
  136. return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
  137. }
  138. int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
  139. unsigned int pos, unsigned int count,
  140. void *kbuf, void __user *ubuf)
  141. {
  142. int ret;
  143. if (!cpu_has_fxsr)
  144. return -ENODEV;
  145. ret = init_fpu(target);
  146. if (ret)
  147. return ret;
  148. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  149. &target->thread.xstate->fxsave, 0, -1);
  150. }
  151. int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
  152. unsigned int pos, unsigned int count,
  153. const void *kbuf, const void __user *ubuf)
  154. {
  155. int ret;
  156. if (!cpu_has_fxsr)
  157. return -ENODEV;
  158. ret = init_fpu(target);
  159. if (ret)
  160. return ret;
  161. set_stopped_child_used_math(target);
  162. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  163. &target->thread.xstate->fxsave, 0, -1);
  164. /*
  165. * mxcsr reserved bits must be masked to zero for security reasons.
  166. */
  167. target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
  168. return ret;
  169. }
  170. #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
  171. /*
  172. * FPU tag word conversions.
  173. */
  174. static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
  175. {
  176. unsigned int tmp; /* to avoid 16 bit prefixes in the code */
  177. /* Transform each pair of bits into 01 (valid) or 00 (empty) */
  178. tmp = ~twd;
  179. tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
  180. /* and move the valid bits to the lower byte. */
  181. tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
  182. tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
  183. tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
  184. return tmp;
  185. }
  186. #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
  187. #define FP_EXP_TAG_VALID 0
  188. #define FP_EXP_TAG_ZERO 1
  189. #define FP_EXP_TAG_SPECIAL 2
  190. #define FP_EXP_TAG_EMPTY 3
  191. static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
  192. {
  193. struct _fpxreg *st;
  194. u32 tos = (fxsave->swd >> 11) & 7;
  195. u32 twd = (unsigned long) fxsave->twd;
  196. u32 tag;
  197. u32 ret = 0xffff0000u;
  198. int i;
  199. for (i = 0; i < 8; i++, twd >>= 1) {
  200. if (twd & 0x1) {
  201. st = FPREG_ADDR(fxsave, (i - tos) & 7);
  202. switch (st->exponent & 0x7fff) {
  203. case 0x7fff:
  204. tag = FP_EXP_TAG_SPECIAL;
  205. break;
  206. case 0x0000:
  207. if (!st->significand[0] &&
  208. !st->significand[1] &&
  209. !st->significand[2] &&
  210. !st->significand[3])
  211. tag = FP_EXP_TAG_ZERO;
  212. else
  213. tag = FP_EXP_TAG_SPECIAL;
  214. break;
  215. default:
  216. if (st->significand[3] & 0x8000)
  217. tag = FP_EXP_TAG_VALID;
  218. else
  219. tag = FP_EXP_TAG_SPECIAL;
  220. break;
  221. }
  222. } else {
  223. tag = FP_EXP_TAG_EMPTY;
  224. }
  225. ret |= tag << (2 * i);
  226. }
  227. return ret;
  228. }
  229. /*
  230. * FXSR floating point environment conversions.
  231. */
  232. static void
  233. convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
  234. {
  235. struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
  236. struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
  237. struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
  238. int i;
  239. env->cwd = fxsave->cwd | 0xffff0000u;
  240. env->swd = fxsave->swd | 0xffff0000u;
  241. env->twd = twd_fxsr_to_i387(fxsave);
  242. #ifdef CONFIG_X86_64
  243. env->fip = fxsave->rip;
  244. env->foo = fxsave->rdp;
  245. if (tsk == current) {
  246. /*
  247. * should be actually ds/cs at fpu exception time, but
  248. * that information is not available in 64bit mode.
  249. */
  250. asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
  251. asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
  252. } else {
  253. struct pt_regs *regs = task_pt_regs(tsk);
  254. env->fos = 0xffff0000 | tsk->thread.ds;
  255. env->fcs = regs->cs;
  256. }
  257. #else
  258. env->fip = fxsave->fip;
  259. env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
  260. env->foo = fxsave->foo;
  261. env->fos = fxsave->fos;
  262. #endif
  263. for (i = 0; i < 8; ++i)
  264. memcpy(&to[i], &from[i], sizeof(to[0]));
  265. }
  266. static void convert_to_fxsr(struct task_struct *tsk,
  267. const struct user_i387_ia32_struct *env)
  268. {
  269. struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
  270. struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
  271. struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
  272. int i;
  273. fxsave->cwd = env->cwd;
  274. fxsave->swd = env->swd;
  275. fxsave->twd = twd_i387_to_fxsr(env->twd);
  276. fxsave->fop = (u16) ((u32) env->fcs >> 16);
  277. #ifdef CONFIG_X86_64
  278. fxsave->rip = env->fip;
  279. fxsave->rdp = env->foo;
  280. /* cs and ds ignored */
  281. #else
  282. fxsave->fip = env->fip;
  283. fxsave->fcs = (env->fcs & 0xffff);
  284. fxsave->foo = env->foo;
  285. fxsave->fos = env->fos;
  286. #endif
  287. for (i = 0; i < 8; ++i)
  288. memcpy(&to[i], &from[i], sizeof(from[0]));
  289. }
  290. int fpregs_get(struct task_struct *target, const struct user_regset *regset,
  291. unsigned int pos, unsigned int count,
  292. void *kbuf, void __user *ubuf)
  293. {
  294. struct user_i387_ia32_struct env;
  295. int ret;
  296. ret = init_fpu(target);
  297. if (ret)
  298. return ret;
  299. if (!HAVE_HWFP)
  300. return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
  301. if (!cpu_has_fxsr) {
  302. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  303. &target->thread.xstate->fsave, 0,
  304. -1);
  305. }
  306. if (kbuf && pos == 0 && count == sizeof(env)) {
  307. convert_from_fxsr(kbuf, target);
  308. return 0;
  309. }
  310. convert_from_fxsr(&env, target);
  311. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  312. }
  313. int fpregs_set(struct task_struct *target, const struct user_regset *regset,
  314. unsigned int pos, unsigned int count,
  315. const void *kbuf, const void __user *ubuf)
  316. {
  317. struct user_i387_ia32_struct env;
  318. int ret;
  319. ret = init_fpu(target);
  320. if (ret)
  321. return ret;
  322. set_stopped_child_used_math(target);
  323. if (!HAVE_HWFP)
  324. return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
  325. if (!cpu_has_fxsr) {
  326. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  327. &target->thread.xstate->fsave, 0, -1);
  328. }
  329. if (pos > 0 || count < sizeof(env))
  330. convert_from_fxsr(&env, target);
  331. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  332. if (!ret)
  333. convert_to_fxsr(target, &env);
  334. return ret;
  335. }
  336. /*
  337. * Signal frame handlers.
  338. */
  339. static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
  340. {
  341. struct task_struct *tsk = current;
  342. struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
  343. unlazy_fpu(tsk);
  344. fp->status = fp->swd;
  345. if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
  346. return -1;
  347. return 1;
  348. }
  349. static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
  350. {
  351. struct task_struct *tsk = current;
  352. struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
  353. struct user_i387_ia32_struct env;
  354. int err = 0;
  355. unlazy_fpu(tsk);
  356. convert_from_fxsr(&env, tsk);
  357. if (__copy_to_user(buf, &env, sizeof(env)))
  358. return -1;
  359. err |= __put_user(fx->swd, &buf->status);
  360. err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
  361. if (err)
  362. return -1;
  363. if (__copy_to_user(&buf->_fxsr_env[0], fx,
  364. sizeof(struct i387_fxsave_struct)))
  365. return -1;
  366. return 1;
  367. }
  368. int save_i387_ia32(struct _fpstate_ia32 __user *buf)
  369. {
  370. if (!used_math())
  371. return 0;
  372. /*
  373. * This will cause a "finit" to be triggered by the next
  374. * attempted FPU operation by the 'current' process.
  375. */
  376. clear_used_math();
  377. if (!HAVE_HWFP) {
  378. return fpregs_soft_get(current, NULL,
  379. 0, sizeof(struct user_i387_ia32_struct),
  380. NULL, buf) ? -1 : 1;
  381. }
  382. if (cpu_has_fxsr)
  383. return save_i387_fxsave(buf);
  384. else
  385. return save_i387_fsave(buf);
  386. }
  387. static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
  388. {
  389. struct task_struct *tsk = current;
  390. return __copy_from_user(&tsk->thread.xstate->fsave, buf,
  391. sizeof(struct i387_fsave_struct));
  392. }
  393. static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
  394. {
  395. struct task_struct *tsk = current;
  396. struct user_i387_ia32_struct env;
  397. int err;
  398. err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
  399. sizeof(struct i387_fxsave_struct));
  400. /* mxcsr reserved bits must be masked to zero for security reasons */
  401. tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
  402. if (err || __copy_from_user(&env, buf, sizeof(env)))
  403. return 1;
  404. convert_to_fxsr(tsk, &env);
  405. return 0;
  406. }
  407. int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
  408. {
  409. int err;
  410. struct task_struct *tsk = current;
  411. if (HAVE_HWFP)
  412. clear_fpu(tsk);
  413. if (!used_math()) {
  414. err = init_fpu(tsk);
  415. if (err)
  416. return err;
  417. }
  418. if (HAVE_HWFP) {
  419. if (cpu_has_fxsr)
  420. err = restore_i387_fxsave(buf);
  421. else
  422. err = restore_i387_fsave(buf);
  423. } else {
  424. err = fpregs_soft_set(current, NULL,
  425. 0, sizeof(struct user_i387_ia32_struct),
  426. NULL, buf) != 0;
  427. }
  428. set_used_math();
  429. return err;
  430. }
  431. /*
  432. * FPU state for core dumps.
  433. * This is only used for a.out dumps now.
  434. * It is declared generically using elf_fpregset_t (which is
  435. * struct user_i387_struct) but is in fact only used for 32-bit
  436. * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
  437. */
  438. int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
  439. {
  440. struct task_struct *tsk = current;
  441. int fpvalid;
  442. fpvalid = !!used_math();
  443. if (fpvalid)
  444. fpvalid = !fpregs_get(tsk, NULL,
  445. 0, sizeof(struct user_i387_ia32_struct),
  446. fpu, NULL);
  447. return fpvalid;
  448. }
  449. EXPORT_SYMBOL(dump_fpu);
  450. #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */