boot.c 44 KB

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  1. /*
  2. * boot.c - Architecture-Specific Low-Level ACPI Boot Support
  3. *
  4. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  5. * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
  6. *
  7. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  24. */
  25. #include <linux/init.h>
  26. #include <linux/acpi.h>
  27. #include <linux/acpi_pmtmr.h>
  28. #include <linux/efi.h>
  29. #include <linux/cpumask.h>
  30. #include <linux/module.h>
  31. #include <linux/dmi.h>
  32. #include <linux/irq.h>
  33. #include <linux/bootmem.h>
  34. #include <linux/ioport.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/apic.h>
  38. #include <asm/genapic.h>
  39. #include <asm/io.h>
  40. #include <asm/mpspec.h>
  41. #include <asm/smp.h>
  42. #ifdef CONFIG_X86_LOCAL_APIC
  43. # include <mach_apic.h>
  44. #endif
  45. static int __initdata acpi_force = 0;
  46. #ifdef CONFIG_ACPI
  47. int acpi_disabled = 0;
  48. #else
  49. int acpi_disabled = 1;
  50. #endif
  51. EXPORT_SYMBOL(acpi_disabled);
  52. #ifdef CONFIG_X86_64
  53. #include <asm/proto.h>
  54. #include <asm/genapic.h>
  55. #else /* X86 */
  56. #ifdef CONFIG_X86_LOCAL_APIC
  57. #include <mach_apic.h>
  58. #include <mach_mpparse.h>
  59. #endif /* CONFIG_X86_LOCAL_APIC */
  60. #endif /* X86 */
  61. #define BAD_MADT_ENTRY(entry, end) ( \
  62. (!entry) || (unsigned long)entry + sizeof(*entry) > end || \
  63. ((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
  64. #define PREFIX "ACPI: "
  65. int acpi_noirq; /* skip ACPI IRQ initialization */
  66. int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
  67. EXPORT_SYMBOL(acpi_pci_disabled);
  68. int acpi_ht __initdata = 1; /* enable HT */
  69. int acpi_lapic;
  70. int acpi_ioapic;
  71. int acpi_strict;
  72. u8 acpi_sci_flags __initdata;
  73. int acpi_sci_override_gsi __initdata;
  74. int acpi_skip_timer_override __initdata;
  75. int acpi_use_timer_override __initdata;
  76. #ifdef CONFIG_X86_LOCAL_APIC
  77. static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
  78. #endif
  79. #ifndef __HAVE_ARCH_CMPXCHG
  80. #warning ACPI uses CMPXCHG, i486 and later hardware
  81. #endif
  82. /* --------------------------------------------------------------------------
  83. Boot-time Configuration
  84. -------------------------------------------------------------------------- */
  85. /*
  86. * The default interrupt routing model is PIC (8259). This gets
  87. * overridden if IOAPICs are enumerated (below).
  88. */
  89. enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
  90. /*
  91. * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
  92. * to map the target physical address. The problem is that set_fixmap()
  93. * provides a single page, and it is possible that the page is not
  94. * sufficient.
  95. * By using this area, we can map up to MAX_IO_APICS pages temporarily,
  96. * i.e. until the next __va_range() call.
  97. *
  98. * Important Safety Note: The fixed I/O APIC page numbers are *subtracted*
  99. * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and
  100. * count idx down while incrementing the phys address.
  101. */
  102. char *__init __acpi_map_table(unsigned long phys, unsigned long size)
  103. {
  104. unsigned long base, offset, mapped_size;
  105. int idx;
  106. if (!phys || !size)
  107. return NULL;
  108. if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT))
  109. return __va(phys);
  110. offset = phys & (PAGE_SIZE - 1);
  111. mapped_size = PAGE_SIZE - offset;
  112. clear_fixmap(FIX_ACPI_END);
  113. set_fixmap(FIX_ACPI_END, phys);
  114. base = fix_to_virt(FIX_ACPI_END);
  115. /*
  116. * Most cases can be covered by the below.
  117. */
  118. idx = FIX_ACPI_END;
  119. while (mapped_size < size) {
  120. if (--idx < FIX_ACPI_BEGIN)
  121. return NULL; /* cannot handle this */
  122. phys += PAGE_SIZE;
  123. clear_fixmap(idx);
  124. set_fixmap(idx, phys);
  125. mapped_size += PAGE_SIZE;
  126. }
  127. return ((unsigned char *)base + offset);
  128. }
  129. #ifdef CONFIG_PCI_MMCONFIG
  130. /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
  131. struct acpi_mcfg_allocation *pci_mmcfg_config;
  132. int pci_mmcfg_config_num;
  133. int __init acpi_parse_mcfg(struct acpi_table_header *header)
  134. {
  135. struct acpi_table_mcfg *mcfg;
  136. unsigned long i;
  137. int config_size;
  138. if (!header)
  139. return -EINVAL;
  140. mcfg = (struct acpi_table_mcfg *)header;
  141. /* how many config structures do we have */
  142. pci_mmcfg_config_num = 0;
  143. i = header->length - sizeof(struct acpi_table_mcfg);
  144. while (i >= sizeof(struct acpi_mcfg_allocation)) {
  145. ++pci_mmcfg_config_num;
  146. i -= sizeof(struct acpi_mcfg_allocation);
  147. };
  148. if (pci_mmcfg_config_num == 0) {
  149. printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
  150. return -ENODEV;
  151. }
  152. config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config);
  153. pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL);
  154. if (!pci_mmcfg_config) {
  155. printk(KERN_WARNING PREFIX
  156. "No memory for MCFG config tables\n");
  157. return -ENOMEM;
  158. }
  159. memcpy(pci_mmcfg_config, &mcfg[1], config_size);
  160. for (i = 0; i < pci_mmcfg_config_num; ++i) {
  161. if (pci_mmcfg_config[i].address > 0xFFFFFFFF) {
  162. printk(KERN_ERR PREFIX
  163. "MMCONFIG not in low 4GB of memory\n");
  164. kfree(pci_mmcfg_config);
  165. pci_mmcfg_config_num = 0;
  166. return -ENODEV;
  167. }
  168. }
  169. return 0;
  170. }
  171. #endif /* CONFIG_PCI_MMCONFIG */
  172. #ifdef CONFIG_X86_LOCAL_APIC
  173. static int __init acpi_parse_madt(struct acpi_table_header *table)
  174. {
  175. struct acpi_table_madt *madt = NULL;
  176. if (!cpu_has_apic)
  177. return -EINVAL;
  178. madt = (struct acpi_table_madt *)table;
  179. if (!madt) {
  180. printk(KERN_WARNING PREFIX "Unable to map MADT\n");
  181. return -ENODEV;
  182. }
  183. if (madt->address) {
  184. acpi_lapic_addr = (u64) madt->address;
  185. printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
  186. madt->address);
  187. }
  188. acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
  189. return 0;
  190. }
  191. static void __cpuinit acpi_register_lapic(int id, u8 enabled)
  192. {
  193. unsigned int ver = 0;
  194. if (!enabled) {
  195. ++disabled_cpus;
  196. return;
  197. }
  198. #ifdef CONFIG_X86_32
  199. if (boot_cpu_physical_apicid != -1U)
  200. ver = apic_version[boot_cpu_physical_apicid];
  201. #endif
  202. generic_processor_info(id, ver);
  203. }
  204. static int __init
  205. acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
  206. {
  207. struct acpi_madt_local_apic *processor = NULL;
  208. processor = (struct acpi_madt_local_apic *)header;
  209. if (BAD_MADT_ENTRY(processor, end))
  210. return -EINVAL;
  211. acpi_table_print_madt_entry(header);
  212. /*
  213. * We need to register disabled CPU as well to permit
  214. * counting disabled CPUs. This allows us to size
  215. * cpus_possible_map more accurately, to permit
  216. * to not preallocating memory for all NR_CPUS
  217. * when we use CPU hotplug.
  218. */
  219. acpi_register_lapic(processor->id, /* APIC ID */
  220. processor->lapic_flags & ACPI_MADT_ENABLED);
  221. return 0;
  222. }
  223. static int __init
  224. acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end)
  225. {
  226. struct acpi_madt_local_sapic *processor = NULL;
  227. processor = (struct acpi_madt_local_sapic *)header;
  228. if (BAD_MADT_ENTRY(processor, end))
  229. return -EINVAL;
  230. acpi_table_print_madt_entry(header);
  231. acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
  232. processor->lapic_flags & ACPI_MADT_ENABLED);
  233. return 0;
  234. }
  235. static int __init
  236. acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
  237. const unsigned long end)
  238. {
  239. struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
  240. lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
  241. if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
  242. return -EINVAL;
  243. acpi_lapic_addr = lapic_addr_ovr->address;
  244. return 0;
  245. }
  246. static int __init
  247. acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
  248. {
  249. struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
  250. lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
  251. if (BAD_MADT_ENTRY(lapic_nmi, end))
  252. return -EINVAL;
  253. acpi_table_print_madt_entry(header);
  254. if (lapic_nmi->lint != 1)
  255. printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
  256. return 0;
  257. }
  258. #endif /*CONFIG_X86_LOCAL_APIC */
  259. #ifdef CONFIG_X86_IO_APIC
  260. static int __init
  261. acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
  262. {
  263. struct acpi_madt_io_apic *ioapic = NULL;
  264. ioapic = (struct acpi_madt_io_apic *)header;
  265. if (BAD_MADT_ENTRY(ioapic, end))
  266. return -EINVAL;
  267. acpi_table_print_madt_entry(header);
  268. mp_register_ioapic(ioapic->id,
  269. ioapic->address, ioapic->global_irq_base);
  270. return 0;
  271. }
  272. /*
  273. * Parse Interrupt Source Override for the ACPI SCI
  274. */
  275. static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
  276. {
  277. if (trigger == 0) /* compatible SCI trigger is level */
  278. trigger = 3;
  279. if (polarity == 0) /* compatible SCI polarity is low */
  280. polarity = 3;
  281. /* Command-line over-ride via acpi_sci= */
  282. if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
  283. trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
  284. if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
  285. polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
  286. /*
  287. * mp_config_acpi_legacy_irqs() already setup IRQs < 16
  288. * If GSI is < 16, this will update its flags,
  289. * else it will create a new mp_irqs[] entry.
  290. */
  291. mp_override_legacy_irq(gsi, polarity, trigger, gsi);
  292. /*
  293. * stash over-ride to indicate we've been here
  294. * and for later update of acpi_gbl_FADT
  295. */
  296. acpi_sci_override_gsi = gsi;
  297. return;
  298. }
  299. static int __init
  300. acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
  301. const unsigned long end)
  302. {
  303. struct acpi_madt_interrupt_override *intsrc = NULL;
  304. intsrc = (struct acpi_madt_interrupt_override *)header;
  305. if (BAD_MADT_ENTRY(intsrc, end))
  306. return -EINVAL;
  307. acpi_table_print_madt_entry(header);
  308. if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
  309. acpi_sci_ioapic_setup(intsrc->global_irq,
  310. intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
  311. (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2);
  312. return 0;
  313. }
  314. if (acpi_skip_timer_override &&
  315. intsrc->source_irq == 0 && intsrc->global_irq == 2) {
  316. printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
  317. return 0;
  318. }
  319. mp_override_legacy_irq(intsrc->source_irq,
  320. intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
  321. (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
  322. intsrc->global_irq);
  323. return 0;
  324. }
  325. static int __init
  326. acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
  327. {
  328. struct acpi_madt_nmi_source *nmi_src = NULL;
  329. nmi_src = (struct acpi_madt_nmi_source *)header;
  330. if (BAD_MADT_ENTRY(nmi_src, end))
  331. return -EINVAL;
  332. acpi_table_print_madt_entry(header);
  333. /* TBD: Support nimsrc entries? */
  334. return 0;
  335. }
  336. #endif /* CONFIG_X86_IO_APIC */
  337. /*
  338. * acpi_pic_sci_set_trigger()
  339. *
  340. * use ELCR to set PIC-mode trigger type for SCI
  341. *
  342. * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
  343. * it may require Edge Trigger -- use "acpi_sci=edge"
  344. *
  345. * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
  346. * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
  347. * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
  348. * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
  349. */
  350. void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
  351. {
  352. unsigned int mask = 1 << irq;
  353. unsigned int old, new;
  354. /* Real old ELCR mask */
  355. old = inb(0x4d0) | (inb(0x4d1) << 8);
  356. /*
  357. * If we use ACPI to set PCI IRQs, then we should clear ELCR
  358. * since we will set it correctly as we enable the PCI irq
  359. * routing.
  360. */
  361. new = acpi_noirq ? old : 0;
  362. /*
  363. * Update SCI information in the ELCR, it isn't in the PCI
  364. * routing tables..
  365. */
  366. switch (trigger) {
  367. case 1: /* Edge - clear */
  368. new &= ~mask;
  369. break;
  370. case 3: /* Level - set */
  371. new |= mask;
  372. break;
  373. }
  374. if (old == new)
  375. return;
  376. printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
  377. outb(new, 0x4d0);
  378. outb(new >> 8, 0x4d1);
  379. }
  380. int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
  381. {
  382. *irq = gsi;
  383. return 0;
  384. }
  385. /*
  386. * success: return IRQ number (>=0)
  387. * failure: return < 0
  388. */
  389. int acpi_register_gsi(u32 gsi, int triggering, int polarity)
  390. {
  391. unsigned int irq;
  392. unsigned int plat_gsi = gsi;
  393. #ifdef CONFIG_PCI
  394. /*
  395. * Make sure all (legacy) PCI IRQs are set as level-triggered.
  396. */
  397. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
  398. if (triggering == ACPI_LEVEL_SENSITIVE)
  399. eisa_set_level_irq(gsi);
  400. }
  401. #endif
  402. #ifdef CONFIG_X86_IO_APIC
  403. if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
  404. plat_gsi = mp_register_gsi(gsi, triggering, polarity);
  405. }
  406. #endif
  407. acpi_gsi_to_irq(plat_gsi, &irq);
  408. return irq;
  409. }
  410. /*
  411. * ACPI based hotplug support for CPU
  412. */
  413. #ifdef CONFIG_ACPI_HOTPLUG_CPU
  414. static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
  415. {
  416. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  417. union acpi_object *obj;
  418. struct acpi_madt_local_apic *lapic;
  419. cpumask_t tmp_map, new_map;
  420. u8 physid;
  421. int cpu;
  422. if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
  423. return -EINVAL;
  424. if (!buffer.length || !buffer.pointer)
  425. return -EINVAL;
  426. obj = buffer.pointer;
  427. if (obj->type != ACPI_TYPE_BUFFER ||
  428. obj->buffer.length < sizeof(*lapic)) {
  429. kfree(buffer.pointer);
  430. return -EINVAL;
  431. }
  432. lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer;
  433. if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC ||
  434. !(lapic->lapic_flags & ACPI_MADT_ENABLED)) {
  435. kfree(buffer.pointer);
  436. return -EINVAL;
  437. }
  438. physid = lapic->id;
  439. kfree(buffer.pointer);
  440. buffer.length = ACPI_ALLOCATE_BUFFER;
  441. buffer.pointer = NULL;
  442. tmp_map = cpu_present_map;
  443. acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED);
  444. /*
  445. * If mp_register_lapic successfully generates a new logical cpu
  446. * number, then the following will get us exactly what was mapped
  447. */
  448. cpus_andnot(new_map, cpu_present_map, tmp_map);
  449. if (cpus_empty(new_map)) {
  450. printk ("Unable to map lapic to logical cpu number\n");
  451. return -EINVAL;
  452. }
  453. cpu = first_cpu(new_map);
  454. *pcpu = cpu;
  455. return 0;
  456. }
  457. /* wrapper to silence section mismatch warning */
  458. int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu)
  459. {
  460. return _acpi_map_lsapic(handle, pcpu);
  461. }
  462. EXPORT_SYMBOL(acpi_map_lsapic);
  463. int acpi_unmap_lsapic(int cpu)
  464. {
  465. per_cpu(x86_cpu_to_apicid, cpu) = -1;
  466. cpu_clear(cpu, cpu_present_map);
  467. num_processors--;
  468. return (0);
  469. }
  470. EXPORT_SYMBOL(acpi_unmap_lsapic);
  471. #endif /* CONFIG_ACPI_HOTPLUG_CPU */
  472. int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
  473. {
  474. /* TBD */
  475. return -EINVAL;
  476. }
  477. EXPORT_SYMBOL(acpi_register_ioapic);
  478. int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
  479. {
  480. /* TBD */
  481. return -EINVAL;
  482. }
  483. EXPORT_SYMBOL(acpi_unregister_ioapic);
  484. static int __init acpi_parse_sbf(struct acpi_table_header *table)
  485. {
  486. struct acpi_table_boot *sb;
  487. sb = (struct acpi_table_boot *)table;
  488. if (!sb) {
  489. printk(KERN_WARNING PREFIX "Unable to map SBF\n");
  490. return -ENODEV;
  491. }
  492. sbf_port = sb->cmos_index; /* Save CMOS port */
  493. return 0;
  494. }
  495. #ifdef CONFIG_HPET_TIMER
  496. #include <asm/hpet.h>
  497. static struct __initdata resource *hpet_res;
  498. static int __init acpi_parse_hpet(struct acpi_table_header *table)
  499. {
  500. struct acpi_table_hpet *hpet_tbl;
  501. hpet_tbl = (struct acpi_table_hpet *)table;
  502. if (!hpet_tbl) {
  503. printk(KERN_WARNING PREFIX "Unable to map HPET\n");
  504. return -ENODEV;
  505. }
  506. if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
  507. printk(KERN_WARNING PREFIX "HPET timers must be located in "
  508. "memory.\n");
  509. return -1;
  510. }
  511. hpet_address = hpet_tbl->address.address;
  512. /*
  513. * Some broken BIOSes advertise HPET at 0x0. We really do not
  514. * want to allocate a resource there.
  515. */
  516. if (!hpet_address) {
  517. printk(KERN_WARNING PREFIX
  518. "HPET id: %#x base: %#lx is invalid\n",
  519. hpet_tbl->id, hpet_address);
  520. return 0;
  521. }
  522. #ifdef CONFIG_X86_64
  523. /*
  524. * Some even more broken BIOSes advertise HPET at
  525. * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
  526. * some noise:
  527. */
  528. if (hpet_address == 0xfed0000000000000UL) {
  529. if (!hpet_force_user) {
  530. printk(KERN_WARNING PREFIX "HPET id: %#x "
  531. "base: 0xfed0000000000000 is bogus\n "
  532. "try hpet=force on the kernel command line to "
  533. "fix it up to 0xfed00000.\n", hpet_tbl->id);
  534. hpet_address = 0;
  535. return 0;
  536. }
  537. printk(KERN_WARNING PREFIX
  538. "HPET id: %#x base: 0xfed0000000000000 fixed up "
  539. "to 0xfed00000.\n", hpet_tbl->id);
  540. hpet_address >>= 32;
  541. }
  542. #endif
  543. printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
  544. hpet_tbl->id, hpet_address);
  545. /*
  546. * Allocate and initialize the HPET firmware resource for adding into
  547. * the resource tree during the lateinit timeframe.
  548. */
  549. #define HPET_RESOURCE_NAME_SIZE 9
  550. hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
  551. hpet_res->name = (void *)&hpet_res[1];
  552. hpet_res->flags = IORESOURCE_MEM;
  553. snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
  554. hpet_tbl->sequence);
  555. hpet_res->start = hpet_address;
  556. hpet_res->end = hpet_address + (1 * 1024) - 1;
  557. return 0;
  558. }
  559. /*
  560. * hpet_insert_resource inserts the HPET resources used into the resource
  561. * tree.
  562. */
  563. static __init int hpet_insert_resource(void)
  564. {
  565. if (!hpet_res)
  566. return 1;
  567. return insert_resource(&iomem_resource, hpet_res);
  568. }
  569. late_initcall(hpet_insert_resource);
  570. #else
  571. #define acpi_parse_hpet NULL
  572. #endif
  573. static int __init acpi_parse_fadt(struct acpi_table_header *table)
  574. {
  575. #ifdef CONFIG_X86_PM_TIMER
  576. /* detect the location of the ACPI PM Timer */
  577. if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
  578. /* FADT rev. 2 */
  579. if (acpi_gbl_FADT.xpm_timer_block.space_id !=
  580. ACPI_ADR_SPACE_SYSTEM_IO)
  581. return 0;
  582. pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
  583. /*
  584. * "X" fields are optional extensions to the original V1.0
  585. * fields, so we must selectively expand V1.0 fields if the
  586. * corresponding X field is zero.
  587. */
  588. if (!pmtmr_ioport)
  589. pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
  590. } else {
  591. /* FADT rev. 1 */
  592. pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
  593. }
  594. if (pmtmr_ioport)
  595. printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
  596. pmtmr_ioport);
  597. #endif
  598. return 0;
  599. }
  600. #ifdef CONFIG_X86_LOCAL_APIC
  601. /*
  602. * Parse LAPIC entries in MADT
  603. * returns 0 on success, < 0 on error
  604. */
  605. static void __init acpi_register_lapic_address(unsigned long address)
  606. {
  607. mp_lapic_addr = address;
  608. set_fixmap_nocache(FIX_APIC_BASE, address);
  609. if (boot_cpu_physical_apicid == -1U) {
  610. boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
  611. #ifdef CONFIG_X86_32
  612. apic_version[boot_cpu_physical_apicid] =
  613. GET_APIC_VERSION(apic_read(APIC_LVR));
  614. #endif
  615. }
  616. }
  617. static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
  618. {
  619. int count;
  620. if (!cpu_has_apic)
  621. return -ENODEV;
  622. /*
  623. * Note that the LAPIC address is obtained from the MADT (32-bit value)
  624. * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
  625. */
  626. count =
  627. acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
  628. acpi_parse_lapic_addr_ovr, 0);
  629. if (count < 0) {
  630. printk(KERN_ERR PREFIX
  631. "Error parsing LAPIC address override entry\n");
  632. return count;
  633. }
  634. acpi_register_lapic_address(acpi_lapic_addr);
  635. return count;
  636. }
  637. static int __init acpi_parse_madt_lapic_entries(void)
  638. {
  639. int count;
  640. if (!cpu_has_apic)
  641. return -ENODEV;
  642. /*
  643. * Note that the LAPIC address is obtained from the MADT (32-bit value)
  644. * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
  645. */
  646. count =
  647. acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
  648. acpi_parse_lapic_addr_ovr, 0);
  649. if (count < 0) {
  650. printk(KERN_ERR PREFIX
  651. "Error parsing LAPIC address override entry\n");
  652. return count;
  653. }
  654. acpi_register_lapic_address(acpi_lapic_addr);
  655. count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
  656. acpi_parse_sapic, MAX_APICS);
  657. if (!count)
  658. count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,
  659. acpi_parse_lapic, MAX_APICS);
  660. if (!count) {
  661. printk(KERN_ERR PREFIX "No LAPIC entries present\n");
  662. /* TBD: Cleanup to allow fallback to MPS */
  663. return -ENODEV;
  664. } else if (count < 0) {
  665. printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
  666. /* TBD: Cleanup to allow fallback to MPS */
  667. return count;
  668. }
  669. count =
  670. acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0);
  671. if (count < 0) {
  672. printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
  673. /* TBD: Cleanup to allow fallback to MPS */
  674. return count;
  675. }
  676. return 0;
  677. }
  678. #endif /* CONFIG_X86_LOCAL_APIC */
  679. #ifdef CONFIG_X86_IO_APIC
  680. #define MP_ISA_BUS 0
  681. #ifdef CONFIG_X86_ES7000
  682. extern int es7000_plat;
  683. #endif
  684. static struct {
  685. int apic_id;
  686. int gsi_base;
  687. int gsi_end;
  688. DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
  689. } mp_ioapic_routing[MAX_IO_APICS];
  690. static int mp_find_ioapic(int gsi)
  691. {
  692. int i = 0;
  693. /* Find the IOAPIC that manages this GSI. */
  694. for (i = 0; i < nr_ioapics; i++) {
  695. if ((gsi >= mp_ioapic_routing[i].gsi_base)
  696. && (gsi <= mp_ioapic_routing[i].gsi_end))
  697. return i;
  698. }
  699. printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
  700. return -1;
  701. }
  702. static u8 __init uniq_ioapic_id(u8 id)
  703. {
  704. #ifdef CONFIG_X86_32
  705. if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
  706. !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
  707. return io_apic_get_unique_id(nr_ioapics, id);
  708. else
  709. return id;
  710. #else
  711. int i;
  712. DECLARE_BITMAP(used, 256);
  713. bitmap_zero(used, 256);
  714. for (i = 0; i < nr_ioapics; i++) {
  715. struct mp_config_ioapic *ia = &mp_ioapics[i];
  716. __set_bit(ia->mp_apicid, used);
  717. }
  718. if (!test_bit(id, used))
  719. return id;
  720. return find_first_zero_bit(used, 256);
  721. #endif
  722. }
  723. static int bad_ioapic(unsigned long address)
  724. {
  725. if (nr_ioapics >= MAX_IO_APICS) {
  726. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  727. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  728. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  729. }
  730. if (!address) {
  731. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  732. " found in table, skipping!\n");
  733. return 1;
  734. }
  735. return 0;
  736. }
  737. void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
  738. {
  739. int idx = 0;
  740. if (bad_ioapic(address))
  741. return;
  742. idx = nr_ioapics;
  743. mp_ioapics[idx].mp_type = MP_IOAPIC;
  744. mp_ioapics[idx].mp_flags = MPC_APIC_USABLE;
  745. mp_ioapics[idx].mp_apicaddr = address;
  746. set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
  747. mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id);
  748. #ifdef CONFIG_X86_32
  749. mp_ioapics[idx].mp_apicver = io_apic_get_version(idx);
  750. #else
  751. mp_ioapics[idx].mp_apicver = 0;
  752. #endif
  753. /*
  754. * Build basic GSI lookup table to facilitate gsi->io_apic lookups
  755. * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
  756. */
  757. mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid;
  758. mp_ioapic_routing[idx].gsi_base = gsi_base;
  759. mp_ioapic_routing[idx].gsi_end = gsi_base +
  760. io_apic_get_redir_entries(idx);
  761. printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
  762. "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid,
  763. mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr,
  764. mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
  765. nr_ioapics++;
  766. }
  767. static void assign_to_mp_irq(struct mp_config_intsrc *m,
  768. struct mp_config_intsrc *mp_irq)
  769. {
  770. memcpy(mp_irq, m, sizeof(struct mp_config_intsrc));
  771. }
  772. static int mp_irq_cmp(struct mp_config_intsrc *mp_irq,
  773. struct mp_config_intsrc *m)
  774. {
  775. return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc));
  776. }
  777. static void save_mp_irq(struct mp_config_intsrc *m)
  778. {
  779. int i;
  780. for (i = 0; i < mp_irq_entries; i++) {
  781. if (!mp_irq_cmp(&mp_irqs[i], m))
  782. return;
  783. }
  784. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  785. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  786. panic("Max # of irq sources exceeded!!\n");
  787. }
  788. void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
  789. {
  790. int ioapic;
  791. int pin;
  792. struct mp_config_intsrc mp_irq;
  793. /*
  794. * Convert 'gsi' to 'ioapic.pin'.
  795. */
  796. ioapic = mp_find_ioapic(gsi);
  797. if (ioapic < 0)
  798. return;
  799. pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
  800. /*
  801. * TBD: This check is for faulty timer entries, where the override
  802. * erroneously sets the trigger to level, resulting in a HUGE
  803. * increase of timer interrupts!
  804. */
  805. if ((bus_irq == 0) && (trigger == 3))
  806. trigger = 1;
  807. mp_irq.mp_type = MP_INTSRC;
  808. mp_irq.mp_irqtype = mp_INT;
  809. mp_irq.mp_irqflag = (trigger << 2) | polarity;
  810. mp_irq.mp_srcbus = MP_ISA_BUS;
  811. mp_irq.mp_srcbusirq = bus_irq; /* IRQ */
  812. mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */
  813. mp_irq.mp_dstirq = pin; /* INTIN# */
  814. save_mp_irq(&mp_irq);
  815. }
  816. void __init mp_config_acpi_legacy_irqs(void)
  817. {
  818. int i;
  819. int ioapic;
  820. unsigned int dstapic;
  821. struct mp_config_intsrc mp_irq;
  822. #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
  823. /*
  824. * Fabricate the legacy ISA bus (bus #31).
  825. */
  826. mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
  827. #endif
  828. set_bit(MP_ISA_BUS, mp_bus_not_pci);
  829. Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
  830. #ifdef CONFIG_X86_ES7000
  831. /*
  832. * Older generations of ES7000 have no legacy identity mappings
  833. */
  834. if (es7000_plat == 1)
  835. return;
  836. #endif
  837. /*
  838. * Locate the IOAPIC that manages the ISA IRQs (0-15).
  839. */
  840. ioapic = mp_find_ioapic(0);
  841. if (ioapic < 0)
  842. return;
  843. dstapic = mp_ioapics[ioapic].mp_apicid;
  844. /*
  845. * Use the default configuration for the IRQs 0-15. Unless
  846. * overridden by (MADT) interrupt source override entries.
  847. */
  848. for (i = 0; i < 16; i++) {
  849. int idx;
  850. for (idx = 0; idx < mp_irq_entries; idx++) {
  851. struct mp_config_intsrc *irq = mp_irqs + idx;
  852. /* Do we already have a mapping for this ISA IRQ? */
  853. if (irq->mp_srcbus == MP_ISA_BUS
  854. && irq->mp_srcbusirq == i)
  855. break;
  856. /* Do we already have a mapping for this IOAPIC pin */
  857. if (irq->mp_dstapic == dstapic &&
  858. irq->mp_dstirq == i)
  859. break;
  860. }
  861. if (idx != mp_irq_entries) {
  862. printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
  863. continue; /* IRQ already used */
  864. }
  865. mp_irq.mp_type = MP_INTSRC;
  866. mp_irq.mp_irqflag = 0; /* Conforming */
  867. mp_irq.mp_srcbus = MP_ISA_BUS;
  868. mp_irq.mp_dstapic = dstapic;
  869. mp_irq.mp_irqtype = mp_INT;
  870. mp_irq.mp_srcbusirq = i; /* Identity mapped */
  871. mp_irq.mp_dstirq = i;
  872. save_mp_irq(&mp_irq);
  873. }
  874. }
  875. int mp_register_gsi(u32 gsi, int triggering, int polarity)
  876. {
  877. int ioapic;
  878. int ioapic_pin;
  879. #ifdef CONFIG_X86_32
  880. #define MAX_GSI_NUM 4096
  881. #define IRQ_COMPRESSION_START 64
  882. static int pci_irq = IRQ_COMPRESSION_START;
  883. /*
  884. * Mapping between Global System Interrupts, which
  885. * represent all possible interrupts, and IRQs
  886. * assigned to actual devices.
  887. */
  888. static int gsi_to_irq[MAX_GSI_NUM];
  889. #else
  890. if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
  891. return gsi;
  892. #endif
  893. /* Don't set up the ACPI SCI because it's already set up */
  894. if (acpi_gbl_FADT.sci_interrupt == gsi)
  895. return gsi;
  896. ioapic = mp_find_ioapic(gsi);
  897. if (ioapic < 0) {
  898. printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
  899. return gsi;
  900. }
  901. ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
  902. #ifdef CONFIG_X86_32
  903. if (ioapic_renumber_irq)
  904. gsi = ioapic_renumber_irq(ioapic, gsi);
  905. #endif
  906. /*
  907. * Avoid pin reprogramming. PRTs typically include entries
  908. * with redundant pin->gsi mappings (but unique PCI devices);
  909. * we only program the IOAPIC on the first.
  910. */
  911. if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
  912. printk(KERN_ERR "Invalid reference to IOAPIC pin "
  913. "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
  914. ioapic_pin);
  915. return gsi;
  916. }
  917. if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) {
  918. Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
  919. mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
  920. #ifdef CONFIG_X86_32
  921. return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]);
  922. #else
  923. return gsi;
  924. #endif
  925. }
  926. set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed);
  927. #ifdef CONFIG_X86_32
  928. /*
  929. * For GSI >= 64, use IRQ compression
  930. */
  931. if ((gsi >= IRQ_COMPRESSION_START)
  932. && (triggering == ACPI_LEVEL_SENSITIVE)) {
  933. /*
  934. * For PCI devices assign IRQs in order, avoiding gaps
  935. * due to unused I/O APIC pins.
  936. */
  937. int irq = gsi;
  938. if (gsi < MAX_GSI_NUM) {
  939. /*
  940. * Retain the VIA chipset work-around (gsi > 15), but
  941. * avoid a problem where the 8254 timer (IRQ0) is setup
  942. * via an override (so it's not on pin 0 of the ioapic),
  943. * and at the same time, the pin 0 interrupt is a PCI
  944. * type. The gsi > 15 test could cause these two pins
  945. * to be shared as IRQ0, and they are not shareable.
  946. * So test for this condition, and if necessary, avoid
  947. * the pin collision.
  948. */
  949. gsi = pci_irq++;
  950. /*
  951. * Don't assign IRQ used by ACPI SCI
  952. */
  953. if (gsi == acpi_gbl_FADT.sci_interrupt)
  954. gsi = pci_irq++;
  955. gsi_to_irq[irq] = gsi;
  956. } else {
  957. printk(KERN_ERR "GSI %u is too high\n", gsi);
  958. return gsi;
  959. }
  960. }
  961. #endif
  962. io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
  963. triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
  964. polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
  965. return gsi;
  966. }
  967. int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
  968. u32 gsi, int triggering, int polarity)
  969. {
  970. #ifdef CONFIG_X86_MPPARSE
  971. struct mp_config_intsrc mp_irq;
  972. int ioapic;
  973. if (!acpi_ioapic)
  974. return 0;
  975. /* print the entry should happen on mptable identically */
  976. mp_irq.mp_type = MP_INTSRC;
  977. mp_irq.mp_irqtype = mp_INT;
  978. mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
  979. (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
  980. mp_irq.mp_srcbus = number;
  981. mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
  982. ioapic = mp_find_ioapic(gsi);
  983. mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id;
  984. mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base;
  985. save_mp_irq(&mp_irq);
  986. #endif
  987. return 0;
  988. }
  989. /*
  990. * Parse IOAPIC related entries in MADT
  991. * returns 0 on success, < 0 on error
  992. */
  993. static int __init acpi_parse_madt_ioapic_entries(void)
  994. {
  995. int count;
  996. /*
  997. * ACPI interpreter is required to complete interrupt setup,
  998. * so if it is off, don't enumerate the io-apics with ACPI.
  999. * If MPS is present, it will handle them,
  1000. * otherwise the system will stay in PIC mode
  1001. */
  1002. if (acpi_disabled || acpi_noirq) {
  1003. return -ENODEV;
  1004. }
  1005. if (!cpu_has_apic)
  1006. return -ENODEV;
  1007. /*
  1008. * if "noapic" boot option, don't look for IO-APICs
  1009. */
  1010. if (skip_ioapic_setup) {
  1011. printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
  1012. "due to 'noapic' option.\n");
  1013. return -ENODEV;
  1014. }
  1015. count =
  1016. acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
  1017. MAX_IO_APICS);
  1018. if (!count) {
  1019. printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
  1020. return -ENODEV;
  1021. } else if (count < 0) {
  1022. printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
  1023. return count;
  1024. }
  1025. count =
  1026. acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr,
  1027. NR_IRQ_VECTORS);
  1028. if (count < 0) {
  1029. printk(KERN_ERR PREFIX
  1030. "Error parsing interrupt source overrides entry\n");
  1031. /* TBD: Cleanup to allow fallback to MPS */
  1032. return count;
  1033. }
  1034. /*
  1035. * If BIOS did not supply an INT_SRC_OVR for the SCI
  1036. * pretend we got one so we can set the SCI flags.
  1037. */
  1038. if (!acpi_sci_override_gsi)
  1039. acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
  1040. /* Fill in identity legacy mapings where no override */
  1041. mp_config_acpi_legacy_irqs();
  1042. count =
  1043. acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src,
  1044. NR_IRQ_VECTORS);
  1045. if (count < 0) {
  1046. printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
  1047. /* TBD: Cleanup to allow fallback to MPS */
  1048. return count;
  1049. }
  1050. return 0;
  1051. }
  1052. #else
  1053. static inline int acpi_parse_madt_ioapic_entries(void)
  1054. {
  1055. return -1;
  1056. }
  1057. #endif /* !CONFIG_X86_IO_APIC */
  1058. static void __init early_acpi_process_madt(void)
  1059. {
  1060. #ifdef CONFIG_X86_LOCAL_APIC
  1061. int error;
  1062. if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
  1063. /*
  1064. * Parse MADT LAPIC entries
  1065. */
  1066. error = early_acpi_parse_madt_lapic_addr_ovr();
  1067. if (!error) {
  1068. acpi_lapic = 1;
  1069. smp_found_config = 1;
  1070. }
  1071. if (error == -EINVAL) {
  1072. /*
  1073. * Dell Precision Workstation 410, 610 come here.
  1074. */
  1075. printk(KERN_ERR PREFIX
  1076. "Invalid BIOS MADT, disabling ACPI\n");
  1077. disable_acpi();
  1078. }
  1079. }
  1080. #endif
  1081. }
  1082. static void __init acpi_process_madt(void)
  1083. {
  1084. #ifdef CONFIG_X86_LOCAL_APIC
  1085. int error;
  1086. if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
  1087. /*
  1088. * Parse MADT LAPIC entries
  1089. */
  1090. error = acpi_parse_madt_lapic_entries();
  1091. if (!error) {
  1092. acpi_lapic = 1;
  1093. #ifdef CONFIG_X86_GENERICARCH
  1094. generic_bigsmp_probe();
  1095. #endif
  1096. /*
  1097. * Parse MADT IO-APIC entries
  1098. */
  1099. error = acpi_parse_madt_ioapic_entries();
  1100. if (!error) {
  1101. acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
  1102. acpi_irq_balance_set(NULL);
  1103. acpi_ioapic = 1;
  1104. smp_found_config = 1;
  1105. setup_apic_routing();
  1106. }
  1107. }
  1108. if (error == -EINVAL) {
  1109. /*
  1110. * Dell Precision Workstation 410, 610 come here.
  1111. */
  1112. printk(KERN_ERR PREFIX
  1113. "Invalid BIOS MADT, disabling ACPI\n");
  1114. disable_acpi();
  1115. }
  1116. }
  1117. #endif
  1118. return;
  1119. }
  1120. static int __init disable_acpi_irq(const struct dmi_system_id *d)
  1121. {
  1122. if (!acpi_force) {
  1123. printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
  1124. d->ident);
  1125. acpi_noirq_set();
  1126. }
  1127. return 0;
  1128. }
  1129. static int __init disable_acpi_pci(const struct dmi_system_id *d)
  1130. {
  1131. if (!acpi_force) {
  1132. printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
  1133. d->ident);
  1134. acpi_disable_pci();
  1135. }
  1136. return 0;
  1137. }
  1138. static int __init dmi_disable_acpi(const struct dmi_system_id *d)
  1139. {
  1140. if (!acpi_force) {
  1141. printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
  1142. disable_acpi();
  1143. } else {
  1144. printk(KERN_NOTICE
  1145. "Warning: DMI blacklist says broken, but acpi forced\n");
  1146. }
  1147. return 0;
  1148. }
  1149. /*
  1150. * Limit ACPI to CPU enumeration for HT
  1151. */
  1152. static int __init force_acpi_ht(const struct dmi_system_id *d)
  1153. {
  1154. if (!acpi_force) {
  1155. printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
  1156. d->ident);
  1157. disable_acpi();
  1158. acpi_ht = 1;
  1159. } else {
  1160. printk(KERN_NOTICE
  1161. "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
  1162. }
  1163. return 0;
  1164. }
  1165. /*
  1166. * Force ignoring BIOS IRQ0 pin2 override
  1167. */
  1168. static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
  1169. {
  1170. pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident);
  1171. acpi_skip_timer_override = 1;
  1172. return 0;
  1173. }
  1174. /*
  1175. * If your system is blacklisted here, but you find that acpi=force
  1176. * works for you, please contact acpi-devel@sourceforge.net
  1177. */
  1178. static struct dmi_system_id __initdata acpi_dmi_table[] = {
  1179. /*
  1180. * Boxes that need ACPI disabled
  1181. */
  1182. {
  1183. .callback = dmi_disable_acpi,
  1184. .ident = "IBM Thinkpad",
  1185. .matches = {
  1186. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1187. DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
  1188. },
  1189. },
  1190. /*
  1191. * Boxes that need acpi=ht
  1192. */
  1193. {
  1194. .callback = force_acpi_ht,
  1195. .ident = "FSC Primergy T850",
  1196. .matches = {
  1197. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
  1198. DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
  1199. },
  1200. },
  1201. {
  1202. .callback = force_acpi_ht,
  1203. .ident = "HP VISUALIZE NT Workstation",
  1204. .matches = {
  1205. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  1206. DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
  1207. },
  1208. },
  1209. {
  1210. .callback = force_acpi_ht,
  1211. .ident = "Compaq Workstation W8000",
  1212. .matches = {
  1213. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  1214. DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
  1215. },
  1216. },
  1217. {
  1218. .callback = force_acpi_ht,
  1219. .ident = "ASUS P4B266",
  1220. .matches = {
  1221. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  1222. DMI_MATCH(DMI_BOARD_NAME, "P4B266"),
  1223. },
  1224. },
  1225. {
  1226. .callback = force_acpi_ht,
  1227. .ident = "ASUS P2B-DS",
  1228. .matches = {
  1229. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  1230. DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
  1231. },
  1232. },
  1233. {
  1234. .callback = force_acpi_ht,
  1235. .ident = "ASUS CUR-DLS",
  1236. .matches = {
  1237. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  1238. DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
  1239. },
  1240. },
  1241. {
  1242. .callback = force_acpi_ht,
  1243. .ident = "ABIT i440BX-W83977",
  1244. .matches = {
  1245. DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
  1246. DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
  1247. },
  1248. },
  1249. {
  1250. .callback = force_acpi_ht,
  1251. .ident = "IBM Bladecenter",
  1252. .matches = {
  1253. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1254. DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
  1255. },
  1256. },
  1257. {
  1258. .callback = force_acpi_ht,
  1259. .ident = "IBM eServer xSeries 360",
  1260. .matches = {
  1261. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1262. DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
  1263. },
  1264. },
  1265. {
  1266. .callback = force_acpi_ht,
  1267. .ident = "IBM eserver xSeries 330",
  1268. .matches = {
  1269. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1270. DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
  1271. },
  1272. },
  1273. {
  1274. .callback = force_acpi_ht,
  1275. .ident = "IBM eserver xSeries 440",
  1276. .matches = {
  1277. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1278. DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
  1279. },
  1280. },
  1281. /*
  1282. * Boxes that need ACPI PCI IRQ routing disabled
  1283. */
  1284. {
  1285. .callback = disable_acpi_irq,
  1286. .ident = "ASUS A7V",
  1287. .matches = {
  1288. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
  1289. DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
  1290. /* newer BIOS, Revision 1011, does work */
  1291. DMI_MATCH(DMI_BIOS_VERSION,
  1292. "ASUS A7V ACPI BIOS Revision 1007"),
  1293. },
  1294. },
  1295. {
  1296. /*
  1297. * Latest BIOS for IBM 600E (1.16) has bad pcinum
  1298. * for LPC bridge, which is needed for the PCI
  1299. * interrupt links to work. DSDT fix is in bug 5966.
  1300. * 2645, 2646 model numbers are shared with 600/600E/600X
  1301. */
  1302. .callback = disable_acpi_irq,
  1303. .ident = "IBM Thinkpad 600 Series 2645",
  1304. .matches = {
  1305. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1306. DMI_MATCH(DMI_BOARD_NAME, "2645"),
  1307. },
  1308. },
  1309. {
  1310. .callback = disable_acpi_irq,
  1311. .ident = "IBM Thinkpad 600 Series 2646",
  1312. .matches = {
  1313. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  1314. DMI_MATCH(DMI_BOARD_NAME, "2646"),
  1315. },
  1316. },
  1317. /*
  1318. * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
  1319. */
  1320. { /* _BBN 0 bug */
  1321. .callback = disable_acpi_pci,
  1322. .ident = "ASUS PR-DLS",
  1323. .matches = {
  1324. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  1325. DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
  1326. DMI_MATCH(DMI_BIOS_VERSION,
  1327. "ASUS PR-DLS ACPI BIOS Revision 1010"),
  1328. DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
  1329. },
  1330. },
  1331. {
  1332. .callback = disable_acpi_pci,
  1333. .ident = "Acer TravelMate 36x Laptop",
  1334. .matches = {
  1335. DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
  1336. DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
  1337. },
  1338. },
  1339. /*
  1340. * HP laptops which use a DSDT reporting as HP/SB400/10000,
  1341. * which includes some code which overrides all temperature
  1342. * trip points to 16C if the INTIN2 input of the I/O APIC
  1343. * is enabled. This input is incorrectly designated the
  1344. * ISA IRQ 0 via an interrupt source override even though
  1345. * it is wired to the output of the master 8259A and INTIN0
  1346. * is not connected at all. Force ignoring BIOS IRQ0 pin2
  1347. * override in that cases.
  1348. */
  1349. {
  1350. .callback = dmi_ignore_irq0_timer_override,
  1351. .ident = "HP NX6125 laptop",
  1352. .matches = {
  1353. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  1354. DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"),
  1355. },
  1356. },
  1357. {
  1358. .callback = dmi_ignore_irq0_timer_override,
  1359. .ident = "HP NX6325 laptop",
  1360. .matches = {
  1361. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  1362. DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
  1363. },
  1364. },
  1365. {}
  1366. };
  1367. /*
  1368. * acpi_boot_table_init() and acpi_boot_init()
  1369. * called from setup_arch(), always.
  1370. * 1. checksums all tables
  1371. * 2. enumerates lapics
  1372. * 3. enumerates io-apics
  1373. *
  1374. * acpi_table_init() is separate to allow reading SRAT without
  1375. * other side effects.
  1376. *
  1377. * side effects of acpi_boot_init:
  1378. * acpi_lapic = 1 if LAPIC found
  1379. * acpi_ioapic = 1 if IOAPIC found
  1380. * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
  1381. * if acpi_blacklisted() acpi_disabled = 1;
  1382. * acpi_irq_model=...
  1383. * ...
  1384. *
  1385. * return value: (currently ignored)
  1386. * 0: success
  1387. * !0: failure
  1388. */
  1389. int __init acpi_boot_table_init(void)
  1390. {
  1391. int error;
  1392. dmi_check_system(acpi_dmi_table);
  1393. /*
  1394. * If acpi_disabled, bail out
  1395. * One exception: acpi=ht continues far enough to enumerate LAPICs
  1396. */
  1397. if (acpi_disabled && !acpi_ht)
  1398. return 1;
  1399. /*
  1400. * Initialize the ACPI boot-time table parser.
  1401. */
  1402. error = acpi_table_init();
  1403. if (error) {
  1404. disable_acpi();
  1405. return error;
  1406. }
  1407. acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
  1408. /*
  1409. * blacklist may disable ACPI entirely
  1410. */
  1411. error = acpi_blacklisted();
  1412. if (error) {
  1413. if (acpi_force) {
  1414. printk(KERN_WARNING PREFIX "acpi=force override\n");
  1415. } else {
  1416. printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
  1417. disable_acpi();
  1418. return error;
  1419. }
  1420. }
  1421. return 0;
  1422. }
  1423. int __init early_acpi_boot_init(void)
  1424. {
  1425. /*
  1426. * If acpi_disabled, bail out
  1427. * One exception: acpi=ht continues far enough to enumerate LAPICs
  1428. */
  1429. if (acpi_disabled && !acpi_ht)
  1430. return 1;
  1431. /*
  1432. * Process the Multiple APIC Description Table (MADT), if present
  1433. */
  1434. early_acpi_process_madt();
  1435. return 0;
  1436. }
  1437. int __init acpi_boot_init(void)
  1438. {
  1439. /*
  1440. * If acpi_disabled, bail out
  1441. * One exception: acpi=ht continues far enough to enumerate LAPICs
  1442. */
  1443. if (acpi_disabled && !acpi_ht)
  1444. return 1;
  1445. acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
  1446. /*
  1447. * set sci_int and PM timer address
  1448. */
  1449. acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
  1450. /*
  1451. * Process the Multiple APIC Description Table (MADT), if present
  1452. */
  1453. acpi_process_madt();
  1454. acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
  1455. return 0;
  1456. }
  1457. static int __init parse_acpi(char *arg)
  1458. {
  1459. if (!arg)
  1460. return -EINVAL;
  1461. /* "acpi=off" disables both ACPI table parsing and interpreter */
  1462. if (strcmp(arg, "off") == 0) {
  1463. disable_acpi();
  1464. }
  1465. /* acpi=force to over-ride black-list */
  1466. else if (strcmp(arg, "force") == 0) {
  1467. acpi_force = 1;
  1468. acpi_ht = 1;
  1469. acpi_disabled = 0;
  1470. }
  1471. /* acpi=strict disables out-of-spec workarounds */
  1472. else if (strcmp(arg, "strict") == 0) {
  1473. acpi_strict = 1;
  1474. }
  1475. /* Limit ACPI just to boot-time to enable HT */
  1476. else if (strcmp(arg, "ht") == 0) {
  1477. if (!acpi_force)
  1478. disable_acpi();
  1479. acpi_ht = 1;
  1480. }
  1481. /* "acpi=noirq" disables ACPI interrupt routing */
  1482. else if (strcmp(arg, "noirq") == 0) {
  1483. acpi_noirq_set();
  1484. } else {
  1485. /* Core will printk when we return error. */
  1486. return -EINVAL;
  1487. }
  1488. return 0;
  1489. }
  1490. early_param("acpi", parse_acpi);
  1491. /* FIXME: Using pci= for an ACPI parameter is a travesty. */
  1492. static int __init parse_pci(char *arg)
  1493. {
  1494. if (arg && strcmp(arg, "noacpi") == 0)
  1495. acpi_disable_pci();
  1496. return 0;
  1497. }
  1498. early_param("pci", parse_pci);
  1499. int __init acpi_mps_check(void)
  1500. {
  1501. #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
  1502. /* mptable code is not built-in*/
  1503. if (acpi_disabled || acpi_noirq) {
  1504. printk(KERN_WARNING "MPS support code is not built-in.\n"
  1505. "Using acpi=off or acpi=noirq or pci=noacpi "
  1506. "may have problem\n");
  1507. return 1;
  1508. }
  1509. #endif
  1510. return 0;
  1511. }
  1512. #ifdef CONFIG_X86_IO_APIC
  1513. static int __init parse_acpi_skip_timer_override(char *arg)
  1514. {
  1515. acpi_skip_timer_override = 1;
  1516. return 0;
  1517. }
  1518. early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
  1519. static int __init parse_acpi_use_timer_override(char *arg)
  1520. {
  1521. acpi_use_timer_override = 1;
  1522. return 0;
  1523. }
  1524. early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
  1525. #endif /* CONFIG_X86_IO_APIC */
  1526. static int __init setup_acpi_sci(char *s)
  1527. {
  1528. if (!s)
  1529. return -EINVAL;
  1530. if (!strcmp(s, "edge"))
  1531. acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
  1532. (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
  1533. else if (!strcmp(s, "level"))
  1534. acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
  1535. (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
  1536. else if (!strcmp(s, "high"))
  1537. acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
  1538. (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
  1539. else if (!strcmp(s, "low"))
  1540. acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
  1541. (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
  1542. else
  1543. return -EINVAL;
  1544. return 0;
  1545. }
  1546. early_param("acpi_sci", setup_acpi_sci);
  1547. int __acpi_acquire_global_lock(unsigned int *lock)
  1548. {
  1549. unsigned int old, new, val;
  1550. do {
  1551. old = *lock;
  1552. new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
  1553. val = cmpxchg(lock, old, new);
  1554. } while (unlikely (val != old));
  1555. return (new < 3) ? -1 : 0;
  1556. }
  1557. int __acpi_release_global_lock(unsigned int *lock)
  1558. {
  1559. unsigned int old, new, val;
  1560. do {
  1561. old = *lock;
  1562. new = old & ~0x3;
  1563. val = cmpxchg(lock, old, new);
  1564. } while (unlikely (val != old));
  1565. return old & 0x1;
  1566. }