Kconfig 8.2 KB

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  1. menu "Platform support"
  2. choice
  3. prompt "Machine type"
  4. depends on PPC64 || 6xx
  5. default PPC_MULTIPLATFORM
  6. config PPC_MULTIPLATFORM
  7. bool "Generic desktop/server/laptop"
  8. help
  9. Select this option if configuring for an IBM pSeries or
  10. RS/6000 machine, an Apple machine, or a PReP, CHRP,
  11. Maple or Cell-based machine.
  12. config PPC_82xx
  13. bool "Freescale 82xx"
  14. depends on 6xx
  15. config PPC_83xx
  16. bool "Freescale 83xx"
  17. depends on 6xx
  18. select FSL_SOC
  19. select MPC83xx
  20. select IPIC
  21. config PPC_86xx
  22. bool "Freescale 86xx"
  23. depends on 6xx
  24. select FSL_SOC
  25. select ALTIVEC
  26. help
  27. The Freescale E600 SoCs have 74xx cores.
  28. endchoice
  29. config CLASSIC32
  30. def_bool y
  31. depends on 6xx && PPC_MULTIPLATFORM
  32. source "arch/powerpc/platforms/pseries/Kconfig"
  33. source "arch/powerpc/platforms/iseries/Kconfig"
  34. source "arch/powerpc/platforms/chrp/Kconfig"
  35. source "arch/powerpc/platforms/512x/Kconfig"
  36. source "arch/powerpc/platforms/52xx/Kconfig"
  37. source "arch/powerpc/platforms/powermac/Kconfig"
  38. source "arch/powerpc/platforms/prep/Kconfig"
  39. source "arch/powerpc/platforms/maple/Kconfig"
  40. source "arch/powerpc/platforms/pasemi/Kconfig"
  41. source "arch/powerpc/platforms/ps3/Kconfig"
  42. source "arch/powerpc/platforms/cell/Kconfig"
  43. source "arch/powerpc/platforms/8xx/Kconfig"
  44. source "arch/powerpc/platforms/82xx/Kconfig"
  45. source "arch/powerpc/platforms/83xx/Kconfig"
  46. source "arch/powerpc/platforms/85xx/Kconfig"
  47. source "arch/powerpc/platforms/86xx/Kconfig"
  48. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  49. source "arch/powerpc/platforms/44x/Kconfig"
  50. source "arch/powerpc/platforms/40x/Kconfig"
  51. config PPC_NATIVE
  52. bool
  53. depends on PPC_MULTIPLATFORM
  54. help
  55. Support for running natively on the hardware, i.e. without
  56. a hypervisor. This option is not user-selectable but should
  57. be selected by all platforms that need it.
  58. config UDBG_RTAS_CONSOLE
  59. bool "RTAS based debug console"
  60. depends on PPC_RTAS
  61. default n
  62. config PPC_UDBG_BEAT
  63. bool "BEAT based debug console"
  64. depends on PPC_CELLEB
  65. default n
  66. config XICS
  67. depends on PPC_PSERIES
  68. bool
  69. default y
  70. config IPIC
  71. bool
  72. default n
  73. config MPIC
  74. bool
  75. default n
  76. config MPIC_WEIRD
  77. bool
  78. default n
  79. config PPC_I8259
  80. bool
  81. default n
  82. config U3_DART
  83. bool
  84. depends on PPC_MULTIPLATFORM && PPC64
  85. default n
  86. config PPC_RTAS
  87. bool
  88. default n
  89. config RTAS_ERROR_LOGGING
  90. bool
  91. depends on PPC_RTAS
  92. default n
  93. config RTAS_PROC
  94. bool "Proc interface to RTAS"
  95. depends on PPC_RTAS
  96. default y
  97. config RTAS_FLASH
  98. tristate "Firmware flash interface"
  99. depends on PPC64 && RTAS_PROC
  100. config PPC_PMI
  101. tristate "Support for PMI"
  102. depends on PPC_IBM_CELL_BLADE
  103. help
  104. PMI (Platform Management Interrupt) is a way to
  105. communicate with the BMC (Baseboard Management Controller).
  106. It is used in some IBM Cell blades.
  107. default m
  108. config MMIO_NVRAM
  109. bool
  110. default n
  111. config MPIC_U3_HT_IRQS
  112. bool
  113. depends on PPC_MAPLE
  114. default y
  115. config MPIC_BROKEN_REGREAD
  116. bool
  117. depends on MPIC
  118. help
  119. This option enables a MPIC driver workaround for some chips
  120. that have a bug that causes some interrupt source information
  121. to not read back properly. It is safe to use on other chips as
  122. well, but enabling it uses about 8KB of memory to keep copies
  123. of the register contents in software.
  124. config IBMVIO
  125. depends on PPC_PSERIES || PPC_ISERIES
  126. bool
  127. default y
  128. config IBMEBUS
  129. depends on PPC_PSERIES
  130. bool "Support for GX bus based adapters"
  131. help
  132. Bus device driver for GX bus based adapters.
  133. config PPC_MPC106
  134. bool
  135. default n
  136. config PPC_970_NAP
  137. bool
  138. default n
  139. config PPC_INDIRECT_IO
  140. bool
  141. select GENERIC_IOMAP
  142. default n
  143. config GENERIC_IOMAP
  144. bool
  145. default n
  146. source "drivers/cpufreq/Kconfig"
  147. menu "CPU Frequency drivers"
  148. depends on CPU_FREQ
  149. config CPU_FREQ_PMAC
  150. bool "Support for Apple PowerBooks"
  151. depends on ADB_PMU && PPC32
  152. select CPU_FREQ_TABLE
  153. help
  154. This adds support for frequency switching on Apple PowerBooks,
  155. this currently includes some models of iBook & Titanium
  156. PowerBook.
  157. config CPU_FREQ_PMAC64
  158. bool "Support for some Apple G5s"
  159. depends on PPC_PMAC && PPC64
  160. select CPU_FREQ_TABLE
  161. help
  162. This adds support for frequency switching on Apple iMac G5,
  163. and some of the more recent desktop G5 machines as well.
  164. config PPC_PASEMI_CPUFREQ
  165. bool "Support for PA Semi PWRficient"
  166. depends on PPC_PASEMI
  167. default y
  168. select CPU_FREQ_TABLE
  169. help
  170. This adds the support for frequency switching on PA Semi
  171. PWRficient processors.
  172. endmenu
  173. config PPC601_SYNC_FIX
  174. bool "Workarounds for PPC601 bugs"
  175. depends on 6xx && (PPC_PREP || PPC_PMAC)
  176. help
  177. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  178. mean that extra synchronization instructions are required near
  179. certain instructions, typically those that make major changes to the
  180. CPU state. These extra instructions reduce performance slightly.
  181. If you say N here, these extra instructions will not be included,
  182. resulting in a kernel which will run faster but may not run at all
  183. on some systems with the PPC601 chip.
  184. If in doubt, say Y here.
  185. config TAU
  186. bool "On-chip CPU temperature sensor support"
  187. depends on CLASSIC32
  188. help
  189. G3 and G4 processors have an on-chip temperature sensor called the
  190. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  191. temperature within 2-4 degrees Celsius. This option shows the current
  192. on-die temperature in /proc/cpuinfo if the cpu supports it.
  193. Unfortunately, on some chip revisions, this sensor is very inaccurate
  194. and in many cases, does not work at all, so don't assume the cpu
  195. temp is actually what /proc/cpuinfo says it is.
  196. config TAU_INT
  197. bool "Interrupt driven TAU driver (DANGEROUS)"
  198. depends on TAU
  199. ---help---
  200. The TAU supports an interrupt driven mode which causes an interrupt
  201. whenever the temperature goes out of range. This is the fastest way
  202. to get notified the temp has exceeded a range. With this option off,
  203. a timer is used to re-check the temperature periodically.
  204. However, on some cpus it appears that the TAU interrupt hardware
  205. is buggy and can cause a situation which would lead unexplained hard
  206. lockups.
  207. Unless you are extending the TAU driver, or enjoy kernel/hardware
  208. debugging, leave this option off.
  209. config TAU_AVERAGE
  210. bool "Average high and low temp"
  211. depends on TAU
  212. ---help---
  213. The TAU hardware can compare the temperature to an upper and lower
  214. bound. The default behavior is to show both the upper and lower
  215. bound in /proc/cpuinfo. If the range is large, the temperature is
  216. either changing a lot, or the TAU hardware is broken (likely on some
  217. G4's). If the range is small (around 4 degrees), the temperature is
  218. relatively stable. If you say Y here, a single temperature value,
  219. halfway between the upper and lower bounds, will be reported in
  220. /proc/cpuinfo.
  221. If in doubt, say N here.
  222. config QUICC_ENGINE
  223. bool
  224. select PPC_LIB_RHEAP
  225. select CRC32
  226. help
  227. The QUICC Engine (QE) is a new generation of communications
  228. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  229. Selecting this option means that you wish to build a kernel
  230. for a machine with a QE coprocessor.
  231. config CPM2
  232. bool "Enable support for the CPM2 (Communications Processor Module)"
  233. depends on MPC85xx || 8260
  234. select CPM
  235. select PPC_LIB_RHEAP
  236. help
  237. The CPM2 (Communications Processor Module) is a coprocessor on
  238. embedded CPUs made by Freescale. Selecting this option means that
  239. you wish to build a kernel for a machine with a CPM2 coprocessor
  240. on it (826x, 827x, 8560).
  241. config PPC_CPM_NEW_BINDING
  242. bool
  243. depends on CPM1 || CPM2
  244. default y
  245. config AXON_RAM
  246. tristate "Axon DDR2 memory device driver"
  247. depends on PPC_IBM_CELL_BLADE
  248. default m
  249. help
  250. It registers one block device per Axon's DDR2 memory bank found
  251. on a system. Block devices are called axonram?, their major and
  252. minor numbers are available in /proc/devices, /proc/partitions or
  253. in /sys/block/axonram?/dev.
  254. config FSL_ULI1575
  255. bool
  256. default n
  257. select GENERIC_ISA_DMA
  258. help
  259. Supports for the ULI1575 PCIe south bridge that exists on some
  260. Freescale reference boards. The boards all use the ULI in pretty
  261. much the same way.
  262. config CPM
  263. bool
  264. config OF_RTC
  265. bool
  266. help
  267. Uses information from the OF or flattened device tree to instatiate
  268. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  269. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  270. endmenu