warp.dts 5.3 KB

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  1. /*
  2. * Device Tree Source for PIKA Warp
  3. *
  4. * Copyright (c) 2008 PIKA Technologies
  5. * Sean MacLennan <smaclennan@pikatech.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without
  9. * any warranty of any kind, whether express or implied.
  10. */
  11. / {
  12. #address-cells = <2>;
  13. #size-cells = <1>;
  14. model = "pika,warp";
  15. compatible = "pika,warp";
  16. dcr-parent = <&/cpus/cpu@0>;
  17. aliases {
  18. ethernet0 = &EMAC0;
  19. serial0 = &UART0;
  20. };
  21. cpus {
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. cpu@0 {
  25. device_type = "cpu";
  26. model = "PowerPC,440EP";
  27. reg = <0>;
  28. clock-frequency = <0>; /* Filled in by zImage */
  29. timebase-frequency = <0>; /* Filled in by zImage */
  30. i-cache-line-size = <20>;
  31. d-cache-line-size = <20>;
  32. i-cache-size = <8000>;
  33. d-cache-size = <8000>;
  34. dcr-controller;
  35. dcr-access-method = "native";
  36. };
  37. };
  38. memory {
  39. device_type = "memory";
  40. reg = <0 0 0>; /* Filled in by zImage */
  41. };
  42. UIC0: interrupt-controller0 {
  43. compatible = "ibm,uic-440ep","ibm,uic";
  44. interrupt-controller;
  45. cell-index = <0>;
  46. dcr-reg = <0c0 009>;
  47. #address-cells = <0>;
  48. #size-cells = <0>;
  49. #interrupt-cells = <2>;
  50. };
  51. UIC1: interrupt-controller1 {
  52. compatible = "ibm,uic-440ep","ibm,uic";
  53. interrupt-controller;
  54. cell-index = <1>;
  55. dcr-reg = <0d0 009>;
  56. #address-cells = <0>;
  57. #size-cells = <0>;
  58. #interrupt-cells = <2>;
  59. interrupts = <1e 4 1f 4>; /* cascade */
  60. interrupt-parent = <&UIC0>;
  61. };
  62. SDR0: sdr {
  63. compatible = "ibm,sdr-440ep";
  64. dcr-reg = <00e 002>;
  65. };
  66. CPR0: cpr {
  67. compatible = "ibm,cpr-440ep";
  68. dcr-reg = <00c 002>;
  69. };
  70. plb {
  71. compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
  72. #address-cells = <2>;
  73. #size-cells = <1>;
  74. ranges;
  75. clock-frequency = <0>; /* Filled in by zImage */
  76. SDRAM0: sdram {
  77. compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
  78. dcr-reg = <010 2>;
  79. };
  80. DMA0: dma {
  81. compatible = "ibm,dma-440ep", "ibm,dma-440gp";
  82. dcr-reg = <100 027>;
  83. };
  84. MAL0: mcmal {
  85. compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
  86. dcr-reg = <180 62>;
  87. num-tx-chans = <4>;
  88. num-rx-chans = <2>;
  89. interrupt-parent = <&MAL0>;
  90. interrupts = <0 1 2 3 4>;
  91. #interrupt-cells = <1>;
  92. #address-cells = <0>;
  93. #size-cells = <0>;
  94. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  95. /*RXEOB*/ 1 &UIC0 b 4
  96. /*SERR*/ 2 &UIC1 0 4
  97. /*TXDE*/ 3 &UIC1 1 4
  98. /*RXDE*/ 4 &UIC1 2 4>;
  99. };
  100. POB0: opb {
  101. compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
  102. #address-cells = <1>;
  103. #size-cells = <1>;
  104. ranges = <00000000 0 00000000 80000000
  105. 80000000 0 80000000 80000000>;
  106. interrupt-parent = <&UIC1>;
  107. interrupts = <7 4>;
  108. clock-frequency = <0>; /* Filled in by zImage */
  109. EBC0: ebc {
  110. compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
  111. dcr-reg = <012 2>;
  112. #address-cells = <2>;
  113. #size-cells = <1>;
  114. clock-frequency = <0>; /* Filled in by zImage */
  115. interrupts = <5 1>;
  116. interrupt-parent = <&UIC1>;
  117. fpga@2,0 {
  118. compatible = "pika,fpga";
  119. reg = <2 0 2200>;
  120. interrupts = <18 8>;
  121. interrupt-parent = <&UIC0>;
  122. };
  123. nor_flash@0,0 {
  124. compatible = "amd,s29gl512n", "cfi-flash";
  125. bank-width = <2>;
  126. reg = <0 0 4000000>;
  127. #address-cells = <1>;
  128. #size-cells = <1>;
  129. partition@0 {
  130. label = "kernel";
  131. reg = <0 180000>;
  132. };
  133. partition@180000 {
  134. label = "root";
  135. reg = <180000 3480000>;
  136. };
  137. partition@3600000 {
  138. label = "user";
  139. reg = <3600000 900000>;
  140. };
  141. partition@3f00000 {
  142. label = "fpga";
  143. reg = <3f00000 40000>;
  144. };
  145. partition@3f40000 {
  146. label = "env";
  147. reg = <3f40000 40000>;
  148. };
  149. partition@3f80000 {
  150. label = "u-boot";
  151. reg = <3f80000 80000>;
  152. };
  153. };
  154. };
  155. UART0: serial@ef600300 {
  156. device_type = "serial";
  157. compatible = "ns16550";
  158. reg = <ef600300 8>;
  159. virtual-reg = <ef600300>;
  160. clock-frequency = <0>; /* Filled in by zImage */
  161. current-speed = <1c200>;
  162. interrupt-parent = <&UIC0>;
  163. interrupts = <0 4>;
  164. };
  165. IIC0: i2c@ef600700 {
  166. compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
  167. reg = <ef600700 14>;
  168. interrupt-parent = <&UIC0>;
  169. interrupts = <2 4>;
  170. };
  171. GPIO0: gpio@ef600b00 {
  172. compatible = "ibm,gpio-440ep";
  173. reg = <ef600b00 48>;
  174. };
  175. GPIO1: gpio@ef600c00 {
  176. compatible = "ibm,gpio-440ep";
  177. reg = <ef600c00 48>;
  178. };
  179. ZMII0: emac-zmii@ef600d00 {
  180. compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
  181. reg = <ef600d00 c>;
  182. };
  183. EMAC0: ethernet@ef600e00 {
  184. device_type = "network";
  185. compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
  186. interrupt-parent = <&UIC1>;
  187. interrupts = <1c 4 1d 4>;
  188. reg = <ef600e00 70>;
  189. local-mac-address = [000000000000];
  190. mal-device = <&MAL0>;
  191. mal-tx-channel = <0 1>;
  192. mal-rx-channel = <0>;
  193. cell-index = <0>;
  194. max-frame-size = <5dc>;
  195. rx-fifo-size = <1000>;
  196. tx-fifo-size = <800>;
  197. phy-mode = "rmii";
  198. phy-map = <00000000>;
  199. zmii-device = <&ZMII0>;
  200. zmii-channel = <0>;
  201. };
  202. usb@ef601000 {
  203. compatible = "ohci-be";
  204. reg = <ef601000 80>;
  205. interrupts = <8 1 9 1>;
  206. interrupt-parent = < &UIC1 >;
  207. };
  208. };
  209. };
  210. chosen {
  211. linux,stdout-path = "/plb/opb/serial@ef600300";
  212. };
  213. };