mpc8349emitx.dts 6.1 KB

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  1. /*
  2. * MPC8349E-mITX Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8349EMITX";
  14. compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. pci1 = &pci1;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8349@0 {
  29. device_type = "cpu";
  30. reg = <0x0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <32768>;
  34. i-cache-size = <32768>;
  35. timebase-frequency = <0>; // from bootloader
  36. bus-frequency = <0>; // from bootloader
  37. clock-frequency = <0>; // from bootloader
  38. };
  39. };
  40. memory {
  41. device_type = "memory";
  42. reg = <0x00000000 0x10000000>;
  43. };
  44. soc8349@e0000000 {
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. device_type = "soc";
  48. ranges = <0x0 0xe0000000 0x00100000>;
  49. reg = <0xe0000000 0x00000200>;
  50. bus-frequency = <0>; // from bootloader
  51. wdt@200 {
  52. device_type = "watchdog";
  53. compatible = "mpc83xx_wdt";
  54. reg = <0x200 0x100>;
  55. };
  56. i2c@3000 {
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59. cell-index = <0>;
  60. compatible = "fsl-i2c";
  61. reg = <0x3000 0x100>;
  62. interrupts = <14 0x8>;
  63. interrupt-parent = <&ipic>;
  64. dfsrr;
  65. };
  66. i2c@3100 {
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. cell-index = <1>;
  70. compatible = "fsl-i2c";
  71. reg = <0x3100 0x100>;
  72. interrupts = <15 0x8>;
  73. interrupt-parent = <&ipic>;
  74. dfsrr;
  75. };
  76. spi@7000 {
  77. cell-index = <0>;
  78. compatible = "fsl,spi";
  79. reg = <0x7000 0x1000>;
  80. interrupts = <16 0x8>;
  81. interrupt-parent = <&ipic>;
  82. mode = "cpu";
  83. };
  84. usb@22000 {
  85. compatible = "fsl-usb2-mph";
  86. reg = <0x22000 0x1000>;
  87. #address-cells = <1>;
  88. #size-cells = <0>;
  89. interrupt-parent = <&ipic>;
  90. interrupts = <39 0x8>;
  91. phy_type = "ulpi";
  92. port1;
  93. };
  94. usb@23000 {
  95. compatible = "fsl-usb2-dr";
  96. reg = <0x23000 0x1000>;
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. interrupt-parent = <&ipic>;
  100. interrupts = <38 0x8>;
  101. dr_mode = "peripheral";
  102. phy_type = "ulpi";
  103. };
  104. mdio@24520 {
  105. #address-cells = <1>;
  106. #size-cells = <0>;
  107. compatible = "fsl,gianfar-mdio";
  108. reg = <0x24520 0x20>;
  109. /* Vitesse 8201 */
  110. phy1c: ethernet-phy@1c {
  111. interrupt-parent = <&ipic>;
  112. interrupts = <18 0x8>;
  113. reg = <0x1c>;
  114. device_type = "ethernet-phy";
  115. };
  116. };
  117. enet0: ethernet@24000 {
  118. cell-index = <0>;
  119. device_type = "network";
  120. model = "TSEC";
  121. compatible = "gianfar";
  122. reg = <0x24000 0x1000>;
  123. local-mac-address = [ 00 00 00 00 00 00 ];
  124. interrupts = <32 0x8 33 0x8 34 0x8>;
  125. interrupt-parent = <&ipic>;
  126. phy-handle = <&phy1c>;
  127. linux,network-index = <0>;
  128. };
  129. enet1: ethernet@25000 {
  130. cell-index = <1>;
  131. device_type = "network";
  132. model = "TSEC";
  133. compatible = "gianfar";
  134. reg = <0x25000 0x1000>;
  135. local-mac-address = [ 00 00 00 00 00 00 ];
  136. interrupts = <35 0x8 36 0x8 37 0x8>;
  137. interrupt-parent = <&ipic>;
  138. /* Vitesse 7385 isn't on the MDIO bus */
  139. fixed-link = <1 1 1000 0 0>;
  140. linux,network-index = <1>;
  141. };
  142. serial0: serial@4500 {
  143. cell-index = <0>;
  144. device_type = "serial";
  145. compatible = "ns16550";
  146. reg = <0x4500 0x100>;
  147. clock-frequency = <0>; // from bootloader
  148. interrupts = <9 0x8>;
  149. interrupt-parent = <&ipic>;
  150. };
  151. serial1: serial@4600 {
  152. cell-index = <1>;
  153. device_type = "serial";
  154. compatible = "ns16550";
  155. reg = <0x4600 0x100>;
  156. clock-frequency = <0>; // from bootloader
  157. interrupts = <10 0x8>;
  158. interrupt-parent = <&ipic>;
  159. };
  160. crypto@30000 {
  161. device_type = "crypto";
  162. model = "SEC2";
  163. compatible = "talitos";
  164. reg = <0x30000 0x10000>;
  165. interrupts = <11 0x8>;
  166. interrupt-parent = <&ipic>;
  167. num-channels = <4>;
  168. channel-fifo-len = <24>;
  169. exec-units-mask = <0x0000007e>;
  170. descriptor-types-mask = <0x01010ebf>;
  171. };
  172. ipic: pic@700 {
  173. interrupt-controller;
  174. #address-cells = <0>;
  175. #interrupt-cells = <2>;
  176. reg = <0x700 0x100>;
  177. device_type = "ipic";
  178. };
  179. };
  180. pci0: pci@e0008500 {
  181. cell-index = <1>;
  182. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  183. interrupt-map = <
  184. /* IDSEL 0x10 - SATA */
  185. 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
  186. >;
  187. interrupt-parent = <&ipic>;
  188. interrupts = <66 0x8>;
  189. bus-range = <0x0 0x0>;
  190. ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
  191. 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
  192. 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
  193. clock-frequency = <66666666>;
  194. #interrupt-cells = <1>;
  195. #size-cells = <2>;
  196. #address-cells = <3>;
  197. reg = <0xe0008500 0x100>;
  198. compatible = "fsl,mpc8349-pci";
  199. device_type = "pci";
  200. };
  201. pci1: pci@e0008600 {
  202. cell-index = <2>;
  203. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  204. interrupt-map = <
  205. /* IDSEL 0x0E - MiniPCI Slot */
  206. 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
  207. /* IDSEL 0x0F - PCI Slot */
  208. 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
  209. 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
  210. >;
  211. interrupt-parent = <&ipic>;
  212. interrupts = <67 0x8>;
  213. bus-range = <0x0 0x0>;
  214. ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
  215. 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
  216. 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
  217. clock-frequency = <66666666>;
  218. #interrupt-cells = <1>;
  219. #size-cells = <2>;
  220. #address-cells = <3>;
  221. reg = <0xe0008600 0x100>;
  222. compatible = "fsl,mpc8349-pci";
  223. device_type = "pci";
  224. };
  225. localbus@e0005000 {
  226. #address-cells = <2>;
  227. #size-cells = <1>;
  228. compatible = "fsl,mpc8349e-localbus",
  229. "fsl,pq2pro-localbus";
  230. reg = <0xe0005000 0xd8>;
  231. ranges = <0x3 0x0 0xf0000000 0x210>;
  232. pata@3,0 {
  233. compatible = "fsl,mpc8349emitx-pata", "ata-generic";
  234. reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
  235. reg-shift = <1>;
  236. pio-mode = <6>;
  237. interrupts = <23 0x8>;
  238. interrupt-parent = <&ipic>;
  239. };
  240. };
  241. };