db78x00-bp-setup.c 2.2 KB

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  1. /*
  2. * arch/arm/mach-mv78xx0/db78x00-bp-setup.c
  3. *
  4. * Marvell DB-78x00-BP Development Board Setup
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/ata_platform.h>
  14. #include <linux/mv643xx_eth.h>
  15. #include <asm/arch/mv78xx0.h>
  16. #include <asm/mach-types.h>
  17. #include <asm/mach/arch.h>
  18. #include "common.h"
  19. static struct mv643xx_eth_platform_data db78x00_ge00_data = {
  20. .phy_addr = 8,
  21. };
  22. static struct mv643xx_eth_platform_data db78x00_ge01_data = {
  23. .phy_addr = 9,
  24. };
  25. static struct mv643xx_eth_platform_data db78x00_ge10_data = {
  26. .phy_addr = -1,
  27. };
  28. static struct mv643xx_eth_platform_data db78x00_ge11_data = {
  29. .phy_addr = -1,
  30. };
  31. static struct mv_sata_platform_data db78x00_sata_data = {
  32. .n_ports = 2,
  33. };
  34. static void __init db78x00_init(void)
  35. {
  36. /*
  37. * Basic MV78xx0 setup. Needs to be called early.
  38. */
  39. mv78xx0_init();
  40. /*
  41. * Partition on-chip peripherals between the two CPU cores.
  42. */
  43. if (mv78xx0_core_index() == 0) {
  44. mv78xx0_ehci0_init();
  45. mv78xx0_ehci1_init();
  46. mv78xx0_ehci2_init();
  47. mv78xx0_ge00_init(&db78x00_ge00_data);
  48. mv78xx0_ge01_init(&db78x00_ge01_data);
  49. mv78xx0_ge10_init(&db78x00_ge10_data);
  50. mv78xx0_ge11_init(&db78x00_ge11_data);
  51. mv78xx0_sata_init(&db78x00_sata_data);
  52. mv78xx0_uart0_init();
  53. mv78xx0_uart2_init();
  54. } else {
  55. mv78xx0_uart1_init();
  56. mv78xx0_uart3_init();
  57. }
  58. }
  59. static int __init db78x00_pci_init(void)
  60. {
  61. if (machine_is_db78x00_bp()) {
  62. /*
  63. * Assign the x16 PCIe slot on the board to CPU core
  64. * #0, and let CPU core #1 have the four x1 slots.
  65. */
  66. if (mv78xx0_core_index() == 0)
  67. mv78xx0_pcie_init(0, 1);
  68. else
  69. mv78xx0_pcie_init(1, 0);
  70. }
  71. return 0;
  72. }
  73. subsys_initcall(db78x00_pci_init);
  74. MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
  75. /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
  76. .phys_io = MV78XX0_REGS_PHYS_BASE,
  77. .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
  78. .boot_params = 0x00000100,
  79. .init_machine = db78x00_init,
  80. .map_io = mv78xx0_map_io,
  81. .init_irq = mv78xx0_init_irq,
  82. .timer = &mv78xx0_timer,
  83. MACHINE_END