spear320.dtsi 2.7 KB

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  1. /*
  2. * DTS file for SPEAr320 SoC
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "spear3xx.dtsi"
  14. / {
  15. ahb {
  16. #address-cells = <1>;
  17. #size-cells = <1>;
  18. compatible = "simple-bus";
  19. ranges = <0x40000000 0x40000000 0x80000000
  20. 0xd0000000 0xd0000000 0x30000000>;
  21. pinmux: pinmux@b3000000 {
  22. compatible = "st,spear320-pinmux";
  23. reg = <0xb3000000 0x1000>;
  24. #gpio-range-cells = <2>;
  25. };
  26. clcd@90000000 {
  27. compatible = "arm,clcd-pl110", "arm,primecell";
  28. reg = <0x90000000 0x1000>;
  29. interrupts = <33>;
  30. status = "disabled";
  31. };
  32. fsmc: flash@4c000000 {
  33. compatible = "st,spear600-fsmc-nand";
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. reg = <0x4c000000 0x1000 /* FSMC Register */
  37. 0x50000000 0x0010>; /* NAND Base */
  38. reg-names = "fsmc_regs", "nand_data";
  39. st,ale-off = <0x20000>;
  40. st,cle-off = <0x10000>;
  41. status = "disabled";
  42. };
  43. sdhci@70000000 {
  44. compatible = "st,sdhci-spear";
  45. reg = <0x70000000 0x100>;
  46. interrupts = <29>;
  47. status = "disabled";
  48. };
  49. spi1: spi@a5000000 {
  50. compatible = "arm,pl022", "arm,primecell";
  51. reg = <0xa5000000 0x1000>;
  52. status = "disabled";
  53. };
  54. spi2: spi@a6000000 {
  55. compatible = "arm,pl022", "arm,primecell";
  56. reg = <0xa6000000 0x1000>;
  57. status = "disabled";
  58. };
  59. apb {
  60. #address-cells = <1>;
  61. #size-cells = <1>;
  62. compatible = "simple-bus";
  63. ranges = <0xa0000000 0xa0000000 0x10000000
  64. 0xd0000000 0xd0000000 0x30000000>;
  65. i2c1: i2c@a7000000 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. compatible = "snps,designware-i2c";
  69. reg = <0xa7000000 0x1000>;
  70. status = "disabled";
  71. };
  72. serial@a3000000 {
  73. compatible = "arm,pl011", "arm,primecell";
  74. reg = <0xa3000000 0x1000>;
  75. status = "disabled";
  76. };
  77. serial@a4000000 {
  78. compatible = "arm,pl011", "arm,primecell";
  79. reg = <0xa4000000 0x1000>;
  80. status = "disabled";
  81. };
  82. gpiopinctrl: gpio@b3000000 {
  83. compatible = "st,spear-plgpio";
  84. reg = <0xb3000000 0x1000>;
  85. #interrupt-cells = <1>;
  86. interrupt-controller;
  87. gpio-controller;
  88. #gpio-cells = <2>;
  89. gpio-ranges = <&pinmux 0 102>;
  90. status = "disabled";
  91. st-plgpio,ngpio = <102>;
  92. st-plgpio,enb-reg = <0x24>;
  93. st-plgpio,wdata-reg = <0x34>;
  94. st-plgpio,dir-reg = <0x44>;
  95. st-plgpio,ie-reg = <0x64>;
  96. st-plgpio,rdata-reg = <0x54>;
  97. st-plgpio,mis-reg = <0x84>;
  98. st-plgpio,eit-reg = <0x94>;
  99. };
  100. };
  101. };
  102. };