adv7343.c 12 KB

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  1. /*
  2. * adv7343 - ADV7343 Video Encoder Driver
  3. *
  4. * The encoder hardware does not support SECAM.
  5. *
  6. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2.
  11. *
  12. * This program is distributed .as is. WITHOUT ANY WARRANTY of any
  13. * kind, whether express or implied; without even the implied warranty
  14. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/ctype.h>
  20. #include <linux/slab.h>
  21. #include <linux/i2c.h>
  22. #include <linux/device.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/uaccess.h>
  27. #include <media/adv7343.h>
  28. #include <media/v4l2-device.h>
  29. #include <media/v4l2-ctrls.h>
  30. #include "adv7343_regs.h"
  31. MODULE_DESCRIPTION("ADV7343 video encoder driver");
  32. MODULE_LICENSE("GPL");
  33. static int debug;
  34. module_param(debug, int, 0644);
  35. MODULE_PARM_DESC(debug, "Debug level 0-1");
  36. struct adv7343_state {
  37. struct v4l2_subdev sd;
  38. struct v4l2_ctrl_handler hdl;
  39. const struct adv7343_platform_data *pdata;
  40. u8 reg00;
  41. u8 reg01;
  42. u8 reg02;
  43. u8 reg35;
  44. u8 reg80;
  45. u8 reg82;
  46. u32 output;
  47. v4l2_std_id std;
  48. };
  49. static inline struct adv7343_state *to_state(struct v4l2_subdev *sd)
  50. {
  51. return container_of(sd, struct adv7343_state, sd);
  52. }
  53. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  54. {
  55. return &container_of(ctrl->handler, struct adv7343_state, hdl)->sd;
  56. }
  57. static inline int adv7343_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  58. {
  59. struct i2c_client *client = v4l2_get_subdevdata(sd);
  60. return i2c_smbus_write_byte_data(client, reg, value);
  61. }
  62. static const u8 adv7343_init_reg_val[] = {
  63. ADV7343_SOFT_RESET, ADV7343_SOFT_RESET_DEFAULT,
  64. ADV7343_POWER_MODE_REG, ADV7343_POWER_MODE_REG_DEFAULT,
  65. ADV7343_HD_MODE_REG1, ADV7343_HD_MODE_REG1_DEFAULT,
  66. ADV7343_HD_MODE_REG2, ADV7343_HD_MODE_REG2_DEFAULT,
  67. ADV7343_HD_MODE_REG3, ADV7343_HD_MODE_REG3_DEFAULT,
  68. ADV7343_HD_MODE_REG4, ADV7343_HD_MODE_REG4_DEFAULT,
  69. ADV7343_HD_MODE_REG5, ADV7343_HD_MODE_REG5_DEFAULT,
  70. ADV7343_HD_MODE_REG6, ADV7343_HD_MODE_REG6_DEFAULT,
  71. ADV7343_HD_MODE_REG7, ADV7343_HD_MODE_REG7_DEFAULT,
  72. ADV7343_SD_MODE_REG1, ADV7343_SD_MODE_REG1_DEFAULT,
  73. ADV7343_SD_MODE_REG2, ADV7343_SD_MODE_REG2_DEFAULT,
  74. ADV7343_SD_MODE_REG3, ADV7343_SD_MODE_REG3_DEFAULT,
  75. ADV7343_SD_MODE_REG4, ADV7343_SD_MODE_REG4_DEFAULT,
  76. ADV7343_SD_MODE_REG5, ADV7343_SD_MODE_REG5_DEFAULT,
  77. ADV7343_SD_MODE_REG6, ADV7343_SD_MODE_REG6_DEFAULT,
  78. ADV7343_SD_MODE_REG7, ADV7343_SD_MODE_REG7_DEFAULT,
  79. ADV7343_SD_MODE_REG8, ADV7343_SD_MODE_REG8_DEFAULT,
  80. ADV7343_SD_HUE_REG, ADV7343_SD_HUE_REG_DEFAULT,
  81. ADV7343_SD_CGMS_WSS0, ADV7343_SD_CGMS_WSS0_DEFAULT,
  82. ADV7343_SD_BRIGHTNESS_WSS, ADV7343_SD_BRIGHTNESS_WSS_DEFAULT,
  83. };
  84. /*
  85. * 2^32
  86. * FSC(reg) = FSC (HZ) * --------
  87. * 27000000
  88. */
  89. static const struct adv7343_std_info stdinfo[] = {
  90. {
  91. /* FSC(Hz) = 3,579,545.45 Hz */
  92. SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
  93. }, {
  94. /* FSC(Hz) = 3,575,611.00 Hz */
  95. SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
  96. }, {
  97. /* FSC(Hz) = 3,582,056.00 */
  98. SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
  99. }, {
  100. /* FSC(Hz) = 4,433,618.75 Hz */
  101. SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
  102. }, {
  103. /* FSC(Hz) = 4,433,618.75 Hz */
  104. SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
  105. }, {
  106. /* FSC(Hz) = 4,433,618.75 Hz */
  107. SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
  108. }, {
  109. /* FSC(Hz) = 4,433,618.75 Hz */
  110. SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
  111. },
  112. };
  113. static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
  114. {
  115. struct adv7343_state *state = to_state(sd);
  116. struct adv7343_std_info *std_info;
  117. int num_std;
  118. char *fsc_ptr;
  119. u8 reg, val;
  120. int err = 0;
  121. int i = 0;
  122. std_info = (struct adv7343_std_info *)stdinfo;
  123. num_std = ARRAY_SIZE(stdinfo);
  124. for (i = 0; i < num_std; i++) {
  125. if (std_info[i].stdid & std)
  126. break;
  127. }
  128. if (i == num_std) {
  129. v4l2_dbg(1, debug, sd,
  130. "Invalid std or std is not supported: %llx\n",
  131. (unsigned long long)std);
  132. return -EINVAL;
  133. }
  134. /* Set the standard */
  135. val = state->reg80 & (~(SD_STD_MASK));
  136. val |= std_info[i].standard_val3;
  137. err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
  138. if (err < 0)
  139. goto setstd_exit;
  140. state->reg80 = val;
  141. /* Configure the input mode register */
  142. val = state->reg01 & (~((u8) INPUT_MODE_MASK));
  143. val |= SD_INPUT_MODE;
  144. err = adv7343_write(sd, ADV7343_MODE_SELECT_REG, val);
  145. if (err < 0)
  146. goto setstd_exit;
  147. state->reg01 = val;
  148. /* Program the sub carrier frequency registers */
  149. fsc_ptr = (unsigned char *)&std_info[i].fsc_val;
  150. reg = ADV7343_FSC_REG0;
  151. for (i = 0; i < 4; i++, reg++, fsc_ptr++) {
  152. err = adv7343_write(sd, reg, *fsc_ptr);
  153. if (err < 0)
  154. goto setstd_exit;
  155. }
  156. val = state->reg80;
  157. /* Filter settings */
  158. if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
  159. val &= 0x03;
  160. else if (std & ~V4L2_STD_SECAM)
  161. val |= 0x04;
  162. err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
  163. if (err < 0)
  164. goto setstd_exit;
  165. state->reg80 = val;
  166. setstd_exit:
  167. if (err != 0)
  168. v4l2_err(sd, "Error setting std, write failed\n");
  169. return err;
  170. }
  171. static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
  172. {
  173. struct adv7343_state *state = to_state(sd);
  174. unsigned char val;
  175. int err = 0;
  176. if (output_type > ADV7343_SVIDEO_ID) {
  177. v4l2_dbg(1, debug, sd,
  178. "Invalid output type or output type not supported:%d\n",
  179. output_type);
  180. return -EINVAL;
  181. }
  182. /* Enable Appropriate DAC */
  183. val = state->reg00 & 0x03;
  184. /* configure default configuration */
  185. if (!state->pdata)
  186. if (output_type == ADV7343_COMPOSITE_ID)
  187. val |= ADV7343_COMPOSITE_POWER_VALUE;
  188. else if (output_type == ADV7343_COMPONENT_ID)
  189. val |= ADV7343_COMPONENT_POWER_VALUE;
  190. else
  191. val |= ADV7343_SVIDEO_POWER_VALUE;
  192. else
  193. val = state->pdata->mode_config.sleep_mode << 0 |
  194. state->pdata->mode_config.pll_control << 1 |
  195. state->pdata->mode_config.dac_3 << 2 |
  196. state->pdata->mode_config.dac_2 << 3 |
  197. state->pdata->mode_config.dac_1 << 4 |
  198. state->pdata->mode_config.dac_6 << 5 |
  199. state->pdata->mode_config.dac_5 << 6 |
  200. state->pdata->mode_config.dac_4 << 7;
  201. err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
  202. if (err < 0)
  203. goto setoutput_exit;
  204. state->reg00 = val;
  205. /* Enable YUV output */
  206. val = state->reg02 | YUV_OUTPUT_SELECT;
  207. err = adv7343_write(sd, ADV7343_MODE_REG0, val);
  208. if (err < 0)
  209. goto setoutput_exit;
  210. state->reg02 = val;
  211. /* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
  212. val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
  213. if (state->pdata && state->pdata->sd_config.sd_dac_out1)
  214. val = val | (state->pdata->sd_config.sd_dac_out1 << 1);
  215. else if (state->pdata && !state->pdata->sd_config.sd_dac_out1)
  216. val = val & ~(state->pdata->sd_config.sd_dac_out1 << 1);
  217. if (state->pdata && state->pdata->sd_config.sd_dac_out2)
  218. val = val | (state->pdata->sd_config.sd_dac_out2 << 2);
  219. else if (state->pdata && !state->pdata->sd_config.sd_dac_out2)
  220. val = val & ~(state->pdata->sd_config.sd_dac_out2 << 2);
  221. err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
  222. if (err < 0)
  223. goto setoutput_exit;
  224. state->reg82 = val;
  225. /* configure ED/HD Color DAC Swap and ED/HD RGB Input Enable bit to
  226. * zero */
  227. val = state->reg35 & (HD_RGB_INPUT_DI & HD_DAC_SWAP_DI);
  228. err = adv7343_write(sd, ADV7343_HD_MODE_REG6, val);
  229. if (err < 0)
  230. goto setoutput_exit;
  231. state->reg35 = val;
  232. setoutput_exit:
  233. if (err != 0)
  234. v4l2_err(sd, "Error setting output, write failed\n");
  235. return err;
  236. }
  237. static int adv7343_log_status(struct v4l2_subdev *sd)
  238. {
  239. struct adv7343_state *state = to_state(sd);
  240. v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
  241. v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
  242. ((state->output == 1) ? "Component" : "S-Video"));
  243. return 0;
  244. }
  245. static int adv7343_s_ctrl(struct v4l2_ctrl *ctrl)
  246. {
  247. struct v4l2_subdev *sd = to_sd(ctrl);
  248. switch (ctrl->id) {
  249. case V4L2_CID_BRIGHTNESS:
  250. return adv7343_write(sd, ADV7343_SD_BRIGHTNESS_WSS,
  251. ctrl->val);
  252. case V4L2_CID_HUE:
  253. return adv7343_write(sd, ADV7343_SD_HUE_REG, ctrl->val);
  254. case V4L2_CID_GAIN:
  255. return adv7343_write(sd, ADV7343_DAC2_OUTPUT_LEVEL, ctrl->val);
  256. }
  257. return -EINVAL;
  258. }
  259. static const struct v4l2_ctrl_ops adv7343_ctrl_ops = {
  260. .s_ctrl = adv7343_s_ctrl,
  261. };
  262. static const struct v4l2_subdev_core_ops adv7343_core_ops = {
  263. .log_status = adv7343_log_status,
  264. .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
  265. .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
  266. .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
  267. .g_ctrl = v4l2_subdev_g_ctrl,
  268. .s_ctrl = v4l2_subdev_s_ctrl,
  269. .queryctrl = v4l2_subdev_queryctrl,
  270. .querymenu = v4l2_subdev_querymenu,
  271. };
  272. static int adv7343_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
  273. {
  274. struct adv7343_state *state = to_state(sd);
  275. int err = 0;
  276. if (state->std == std)
  277. return 0;
  278. err = adv7343_setstd(sd, std);
  279. if (!err)
  280. state->std = std;
  281. return err;
  282. }
  283. static int adv7343_s_routing(struct v4l2_subdev *sd,
  284. u32 input, u32 output, u32 config)
  285. {
  286. struct adv7343_state *state = to_state(sd);
  287. int err = 0;
  288. if (state->output == output)
  289. return 0;
  290. err = adv7343_setoutput(sd, output);
  291. if (!err)
  292. state->output = output;
  293. return err;
  294. }
  295. static const struct v4l2_subdev_video_ops adv7343_video_ops = {
  296. .s_std_output = adv7343_s_std_output,
  297. .s_routing = adv7343_s_routing,
  298. };
  299. static const struct v4l2_subdev_ops adv7343_ops = {
  300. .core = &adv7343_core_ops,
  301. .video = &adv7343_video_ops,
  302. };
  303. static int adv7343_initialize(struct v4l2_subdev *sd)
  304. {
  305. struct adv7343_state *state = to_state(sd);
  306. int err = 0;
  307. int i;
  308. for (i = 0; i < ARRAY_SIZE(adv7343_init_reg_val); i += 2) {
  309. err = adv7343_write(sd, adv7343_init_reg_val[i],
  310. adv7343_init_reg_val[i+1]);
  311. if (err) {
  312. v4l2_err(sd, "Error initializing\n");
  313. return err;
  314. }
  315. }
  316. /* Configure for default video standard */
  317. err = adv7343_setoutput(sd, state->output);
  318. if (err < 0) {
  319. v4l2_err(sd, "Error setting output during init\n");
  320. return -EINVAL;
  321. }
  322. err = adv7343_setstd(sd, state->std);
  323. if (err < 0) {
  324. v4l2_err(sd, "Error setting std during init\n");
  325. return -EINVAL;
  326. }
  327. return err;
  328. }
  329. static int adv7343_probe(struct i2c_client *client,
  330. const struct i2c_device_id *id)
  331. {
  332. struct adv7343_state *state;
  333. int err;
  334. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  335. return -ENODEV;
  336. v4l_info(client, "chip found @ 0x%x (%s)\n",
  337. client->addr << 1, client->adapter->name);
  338. state = devm_kzalloc(&client->dev, sizeof(struct adv7343_state),
  339. GFP_KERNEL);
  340. if (state == NULL)
  341. return -ENOMEM;
  342. /* Copy board specific information here */
  343. state->pdata = client->dev.platform_data;
  344. state->reg00 = 0x80;
  345. state->reg01 = 0x00;
  346. state->reg02 = 0x20;
  347. state->reg35 = 0x00;
  348. state->reg80 = ADV7343_SD_MODE_REG1_DEFAULT;
  349. state->reg82 = ADV7343_SD_MODE_REG2_DEFAULT;
  350. state->output = ADV7343_COMPOSITE_ID;
  351. state->std = V4L2_STD_NTSC;
  352. v4l2_i2c_subdev_init(&state->sd, client, &adv7343_ops);
  353. v4l2_ctrl_handler_init(&state->hdl, 2);
  354. v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
  355. V4L2_CID_BRIGHTNESS, ADV7343_BRIGHTNESS_MIN,
  356. ADV7343_BRIGHTNESS_MAX, 1,
  357. ADV7343_BRIGHTNESS_DEF);
  358. v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
  359. V4L2_CID_HUE, ADV7343_HUE_MIN,
  360. ADV7343_HUE_MAX, 1,
  361. ADV7343_HUE_DEF);
  362. v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
  363. V4L2_CID_GAIN, ADV7343_GAIN_MIN,
  364. ADV7343_GAIN_MAX, 1,
  365. ADV7343_GAIN_DEF);
  366. state->sd.ctrl_handler = &state->hdl;
  367. if (state->hdl.error) {
  368. int err = state->hdl.error;
  369. v4l2_ctrl_handler_free(&state->hdl);
  370. return err;
  371. }
  372. v4l2_ctrl_handler_setup(&state->hdl);
  373. err = adv7343_initialize(&state->sd);
  374. if (err)
  375. v4l2_ctrl_handler_free(&state->hdl);
  376. return err;
  377. }
  378. static int adv7343_remove(struct i2c_client *client)
  379. {
  380. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  381. struct adv7343_state *state = to_state(sd);
  382. v4l2_device_unregister_subdev(sd);
  383. v4l2_ctrl_handler_free(&state->hdl);
  384. return 0;
  385. }
  386. static const struct i2c_device_id adv7343_id[] = {
  387. {"adv7343", 0},
  388. {},
  389. };
  390. MODULE_DEVICE_TABLE(i2c, adv7343_id);
  391. static struct i2c_driver adv7343_driver = {
  392. .driver = {
  393. .owner = THIS_MODULE,
  394. .name = "adv7343",
  395. },
  396. .probe = adv7343_probe,
  397. .remove = adv7343_remove,
  398. .id_table = adv7343_id,
  399. };
  400. module_i2c_driver(adv7343_driver);