platform.c 7.3 KB

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  1. /*
  2. * Platform driver for the Synopsys DesignWare DMA Controller
  3. *
  4. * Copyright (C) 2007-2008 Atmel Corporation
  5. * Copyright (C) 2010-2011 ST Microelectronics
  6. * Copyright (C) 2013 Intel Corporation
  7. *
  8. * Some parts of this driver are derived from the original dw_dmac.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/device.h>
  16. #include <linux/clk.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/dmaengine.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/of.h>
  21. #include <linux/of_dma.h>
  22. #include <linux/acpi.h>
  23. #include <linux/acpi_dma.h>
  24. #include "internal.h"
  25. struct dw_dma_of_filter_args {
  26. struct dw_dma *dw;
  27. unsigned int req;
  28. unsigned int src;
  29. unsigned int dst;
  30. };
  31. static bool dw_dma_of_filter(struct dma_chan *chan, void *param)
  32. {
  33. struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
  34. struct dw_dma_of_filter_args *fargs = param;
  35. /* Ensure the device matches our channel */
  36. if (chan->device != &fargs->dw->dma)
  37. return false;
  38. dwc->request_line = fargs->req;
  39. dwc->src_master = fargs->src;
  40. dwc->dst_master = fargs->dst;
  41. return true;
  42. }
  43. static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
  44. struct of_dma *ofdma)
  45. {
  46. struct dw_dma *dw = ofdma->of_dma_data;
  47. struct dw_dma_of_filter_args fargs = {
  48. .dw = dw,
  49. };
  50. dma_cap_mask_t cap;
  51. if (dma_spec->args_count != 3)
  52. return NULL;
  53. fargs.req = dma_spec->args[0];
  54. fargs.src = dma_spec->args[1];
  55. fargs.dst = dma_spec->args[2];
  56. if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS ||
  57. fargs.src >= dw->nr_masters ||
  58. fargs.dst >= dw->nr_masters))
  59. return NULL;
  60. dma_cap_zero(cap);
  61. dma_cap_set(DMA_SLAVE, cap);
  62. /* TODO: there should be a simpler way to do this */
  63. return dma_request_channel(cap, dw_dma_of_filter, &fargs);
  64. }
  65. #ifdef CONFIG_ACPI
  66. static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
  67. {
  68. struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
  69. struct acpi_dma_spec *dma_spec = param;
  70. if (chan->device->dev != dma_spec->dev ||
  71. chan->chan_id != dma_spec->chan_id)
  72. return false;
  73. dwc->request_line = dma_spec->slave_id;
  74. dwc->src_master = dwc_get_sms(NULL);
  75. dwc->dst_master = dwc_get_dms(NULL);
  76. return true;
  77. }
  78. static void dw_dma_acpi_controller_register(struct dw_dma *dw)
  79. {
  80. struct device *dev = dw->dma.dev;
  81. struct acpi_dma_filter_info *info;
  82. int ret;
  83. info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
  84. if (!info)
  85. return;
  86. dma_cap_zero(info->dma_cap);
  87. dma_cap_set(DMA_SLAVE, info->dma_cap);
  88. info->filter_fn = dw_dma_acpi_filter;
  89. ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
  90. info);
  91. if (ret)
  92. dev_err(dev, "could not register acpi_dma_controller\n");
  93. }
  94. #else /* !CONFIG_ACPI */
  95. static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
  96. #endif /* !CONFIG_ACPI */
  97. #ifdef CONFIG_OF
  98. static struct dw_dma_platform_data *
  99. dw_dma_parse_dt(struct platform_device *pdev)
  100. {
  101. struct device_node *np = pdev->dev.of_node;
  102. struct dw_dma_platform_data *pdata;
  103. u32 tmp, arr[4];
  104. if (!np) {
  105. dev_err(&pdev->dev, "Missing DT data\n");
  106. return NULL;
  107. }
  108. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  109. if (!pdata)
  110. return NULL;
  111. if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
  112. return NULL;
  113. if (of_property_read_bool(np, "is_private"))
  114. pdata->is_private = true;
  115. if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
  116. pdata->chan_allocation_order = (unsigned char)tmp;
  117. if (!of_property_read_u32(np, "chan_priority", &tmp))
  118. pdata->chan_priority = tmp;
  119. if (!of_property_read_u32(np, "block_size", &tmp))
  120. pdata->block_size = tmp;
  121. if (!of_property_read_u32(np, "dma-masters", &tmp)) {
  122. if (tmp > 4)
  123. return NULL;
  124. pdata->nr_masters = tmp;
  125. }
  126. if (!of_property_read_u32_array(np, "data_width", arr,
  127. pdata->nr_masters))
  128. for (tmp = 0; tmp < pdata->nr_masters; tmp++)
  129. pdata->data_width[tmp] = arr[tmp];
  130. return pdata;
  131. }
  132. #else
  133. static inline struct dw_dma_platform_data *
  134. dw_dma_parse_dt(struct platform_device *pdev)
  135. {
  136. return NULL;
  137. }
  138. #endif
  139. static int dw_probe(struct platform_device *pdev)
  140. {
  141. struct dw_dma_chip *chip;
  142. struct device *dev = &pdev->dev;
  143. struct resource *mem;
  144. struct dw_dma_platform_data *pdata;
  145. int err;
  146. chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
  147. if (!chip)
  148. return -ENOMEM;
  149. chip->irq = platform_get_irq(pdev, 0);
  150. if (chip->irq < 0)
  151. return chip->irq;
  152. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  153. chip->regs = devm_ioremap_resource(dev, mem);
  154. if (IS_ERR(chip->regs))
  155. return PTR_ERR(chip->regs);
  156. /* Apply default dma_mask if needed */
  157. if (!dev->dma_mask) {
  158. dev->dma_mask = &dev->coherent_dma_mask;
  159. dev->coherent_dma_mask = DMA_BIT_MASK(32);
  160. }
  161. pdata = dev_get_platdata(dev);
  162. if (!pdata)
  163. pdata = dw_dma_parse_dt(pdev);
  164. chip->dev = dev;
  165. err = dw_dma_probe(chip, pdata);
  166. if (err)
  167. return err;
  168. platform_set_drvdata(pdev, chip);
  169. if (pdev->dev.of_node) {
  170. err = of_dma_controller_register(pdev->dev.of_node,
  171. dw_dma_of_xlate, chip->dw);
  172. if (err)
  173. dev_err(&pdev->dev,
  174. "could not register of_dma_controller\n");
  175. }
  176. if (ACPI_HANDLE(&pdev->dev))
  177. dw_dma_acpi_controller_register(chip->dw);
  178. return 0;
  179. }
  180. static int dw_remove(struct platform_device *pdev)
  181. {
  182. struct dw_dma_chip *chip = platform_get_drvdata(pdev);
  183. if (pdev->dev.of_node)
  184. of_dma_controller_free(pdev->dev.of_node);
  185. return dw_dma_remove(chip);
  186. }
  187. static void dw_shutdown(struct platform_device *pdev)
  188. {
  189. struct dw_dma_chip *chip = platform_get_drvdata(pdev);
  190. dw_dma_shutdown(chip);
  191. }
  192. #ifdef CONFIG_OF
  193. static const struct of_device_id dw_dma_of_id_table[] = {
  194. { .compatible = "snps,dma-spear1340" },
  195. {}
  196. };
  197. MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
  198. #endif
  199. #ifdef CONFIG_ACPI
  200. static const struct acpi_device_id dw_dma_acpi_id_table[] = {
  201. { "INTL9C60", 0 },
  202. { }
  203. };
  204. MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
  205. #endif
  206. #ifdef CONFIG_PM_SLEEP
  207. static int dw_suspend_noirq(struct device *dev)
  208. {
  209. struct platform_device *pdev = to_platform_device(dev);
  210. struct dw_dma_chip *chip = platform_get_drvdata(pdev);
  211. return dw_dma_suspend(chip);
  212. }
  213. static int dw_resume_noirq(struct device *dev)
  214. {
  215. struct platform_device *pdev = to_platform_device(dev);
  216. struct dw_dma_chip *chip = platform_get_drvdata(pdev);
  217. return dw_dma_resume(chip);
  218. }
  219. #else /* !CONFIG_PM_SLEEP */
  220. #define dw_suspend_noirq NULL
  221. #define dw_resume_noirq NULL
  222. #endif /* !CONFIG_PM_SLEEP */
  223. static const struct dev_pm_ops dw_dev_pm_ops = {
  224. .suspend_noirq = dw_suspend_noirq,
  225. .resume_noirq = dw_resume_noirq,
  226. .freeze_noirq = dw_suspend_noirq,
  227. .thaw_noirq = dw_resume_noirq,
  228. .restore_noirq = dw_resume_noirq,
  229. .poweroff_noirq = dw_suspend_noirq,
  230. };
  231. static struct platform_driver dw_driver = {
  232. .probe = dw_probe,
  233. .remove = dw_remove,
  234. .shutdown = dw_shutdown,
  235. .driver = {
  236. .name = "dw_dmac",
  237. .pm = &dw_dev_pm_ops,
  238. .of_match_table = of_match_ptr(dw_dma_of_id_table),
  239. .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
  240. },
  241. };
  242. static int __init dw_init(void)
  243. {
  244. return platform_driver_register(&dw_driver);
  245. }
  246. subsys_initcall(dw_init);
  247. static void __exit dw_exit(void)
  248. {
  249. platform_driver_unregister(&dw_driver);
  250. }
  251. module_exit(dw_exit);
  252. MODULE_LICENSE("GPL v2");
  253. MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");