bcm_kona_timer.c 5.1 KB

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  1. /*
  2. * Copyright (C) 2012 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation version 2.
  7. *
  8. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9. * kind, whether express or implied; without even the implied warranty
  10. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/irq.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/clockchips.h>
  18. #include <linux/types.h>
  19. #include <linux/io.h>
  20. #include <asm/mach/time.h>
  21. #include <linux/of.h>
  22. #include <linux/of_address.h>
  23. #include <linux/of_irq.h>
  24. #define KONA_GPTIMER_STCS_OFFSET 0x00000000
  25. #define KONA_GPTIMER_STCLO_OFFSET 0x00000004
  26. #define KONA_GPTIMER_STCHI_OFFSET 0x00000008
  27. #define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
  28. #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
  29. #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
  30. struct kona_bcm_timers {
  31. int tmr_irq;
  32. void __iomem *tmr_regs;
  33. };
  34. static struct kona_bcm_timers timers;
  35. static u32 arch_timer_rate;
  36. /*
  37. * We use the peripheral timers for system tick, the cpu global timer for
  38. * profile tick
  39. */
  40. static void kona_timer_disable_and_clear(void __iomem *base)
  41. {
  42. uint32_t reg;
  43. /*
  44. * clear and disable interrupts
  45. * We are using compare/match register 0 for our system interrupts
  46. */
  47. reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
  48. /* Clear compare (0) interrupt */
  49. reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
  50. /* disable compare */
  51. reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
  52. writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
  53. }
  54. static void
  55. kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
  56. {
  57. void __iomem *base = IOMEM(timer_base);
  58. int loop_limit = 4;
  59. /*
  60. * Read 64-bit free running counter
  61. * 1. Read hi-word
  62. * 2. Read low-word
  63. * 3. Read hi-word again
  64. * 4.1
  65. * if new hi-word is not equal to previously read hi-word, then
  66. * start from #1
  67. * 4.2
  68. * if new hi-word is equal to previously read hi-word then stop.
  69. */
  70. while (--loop_limit) {
  71. *msw = readl(base + KONA_GPTIMER_STCHI_OFFSET);
  72. *lsw = readl(base + KONA_GPTIMER_STCLO_OFFSET);
  73. if (*msw == readl(base + KONA_GPTIMER_STCHI_OFFSET))
  74. break;
  75. }
  76. if (!loop_limit) {
  77. pr_err("bcm_kona_timer: getting counter failed.\n");
  78. pr_err(" Timer will be impacted\n");
  79. }
  80. return;
  81. }
  82. static const struct of_device_id bcm_timer_ids[] __initconst = {
  83. {.compatible = "bcm,kona-timer"},
  84. {},
  85. };
  86. static void __init kona_timers_init(struct device_node *node)
  87. {
  88. u32 freq;
  89. if (!of_property_read_u32(node, "clock-frequency", &freq))
  90. arch_timer_rate = freq;
  91. else
  92. panic("clock-frequency not set in the .dts file");
  93. /* Setup IRQ numbers */
  94. timers.tmr_irq = irq_of_parse_and_map(node, 0);
  95. /* Setup IO addresses */
  96. timers.tmr_regs = of_iomap(node, 0);
  97. kona_timer_disable_and_clear(timers.tmr_regs);
  98. }
  99. static int kona_timer_set_next_event(unsigned long clc,
  100. struct clock_event_device *unused)
  101. {
  102. /*
  103. * timer (0) is disabled by the timer interrupt already
  104. * so, here we reload the next event value and re-enable
  105. * the timer.
  106. *
  107. * This way, we are potentially losing the time between
  108. * timer-interrupt->set_next_event. CPU local timers, when
  109. * they come in should get rid of skew.
  110. */
  111. uint32_t lsw, msw;
  112. uint32_t reg;
  113. kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
  114. /* Load the "next" event tick value */
  115. writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
  116. /* Enable compare */
  117. reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
  118. reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
  119. writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
  120. return 0;
  121. }
  122. static void kona_timer_set_mode(enum clock_event_mode mode,
  123. struct clock_event_device *unused)
  124. {
  125. switch (mode) {
  126. case CLOCK_EVT_MODE_ONESHOT:
  127. /* by default mode is one shot don't do any thing */
  128. break;
  129. case CLOCK_EVT_MODE_UNUSED:
  130. case CLOCK_EVT_MODE_SHUTDOWN:
  131. default:
  132. kona_timer_disable_and_clear(timers.tmr_regs);
  133. }
  134. }
  135. static struct clock_event_device kona_clockevent_timer = {
  136. .name = "timer 1",
  137. .features = CLOCK_EVT_FEAT_ONESHOT,
  138. .set_next_event = kona_timer_set_next_event,
  139. .set_mode = kona_timer_set_mode
  140. };
  141. static void __init kona_timer_clockevents_init(void)
  142. {
  143. kona_clockevent_timer.cpumask = cpumask_of(0);
  144. clockevents_config_and_register(&kona_clockevent_timer,
  145. arch_timer_rate, 6, 0xffffffff);
  146. }
  147. static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
  148. {
  149. struct clock_event_device *evt = &kona_clockevent_timer;
  150. kona_timer_disable_and_clear(timers.tmr_regs);
  151. evt->event_handler(evt);
  152. return IRQ_HANDLED;
  153. }
  154. static struct irqaction kona_timer_irq = {
  155. .name = "Kona Timer Tick",
  156. .flags = IRQF_TIMER,
  157. .handler = kona_timer_interrupt,
  158. };
  159. static void __init kona_timer_init(struct device_node *node)
  160. {
  161. kona_timers_init(node);
  162. kona_timer_clockevents_init();
  163. setup_irq(timers.tmr_irq, &kona_timer_irq);
  164. kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
  165. }
  166. CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);