dmatest.c 26 KB

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  1. /*
  2. * DMA Engine test module
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. * Copyright (C) 2013 Intel Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/delay.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/dmaengine.h>
  15. #include <linux/freezer.h>
  16. #include <linux/init.h>
  17. #include <linux/kthread.h>
  18. #include <linux/module.h>
  19. #include <linux/moduleparam.h>
  20. #include <linux/random.h>
  21. #include <linux/slab.h>
  22. #include <linux/wait.h>
  23. static unsigned int test_buf_size = 16384;
  24. module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
  25. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  26. static char test_channel[20];
  27. module_param_string(channel, test_channel, sizeof(test_channel),
  28. S_IRUGO | S_IWUSR);
  29. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  30. static char test_device[20];
  31. module_param_string(device, test_device, sizeof(test_device),
  32. S_IRUGO | S_IWUSR);
  33. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  34. static unsigned int threads_per_chan = 1;
  35. module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
  36. MODULE_PARM_DESC(threads_per_chan,
  37. "Number of threads to start per channel (default: 1)");
  38. static unsigned int max_channels;
  39. module_param(max_channels, uint, S_IRUGO | S_IWUSR);
  40. MODULE_PARM_DESC(max_channels,
  41. "Maximum number of channels to use (default: all)");
  42. static unsigned int iterations;
  43. module_param(iterations, uint, S_IRUGO | S_IWUSR);
  44. MODULE_PARM_DESC(iterations,
  45. "Iterations before stopping test (default: infinite)");
  46. static unsigned int xor_sources = 3;
  47. module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
  48. MODULE_PARM_DESC(xor_sources,
  49. "Number of xor source buffers (default: 3)");
  50. static unsigned int pq_sources = 3;
  51. module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
  52. MODULE_PARM_DESC(pq_sources,
  53. "Number of p+q source buffers (default: 3)");
  54. static int timeout = 3000;
  55. module_param(timeout, uint, S_IRUGO | S_IWUSR);
  56. MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  57. "Pass -1 for infinite timeout");
  58. static bool noverify;
  59. module_param(noverify, bool, S_IRUGO | S_IWUSR);
  60. MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
  61. static bool verbose;
  62. module_param(verbose, bool, S_IRUGO | S_IWUSR);
  63. MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
  64. /**
  65. * struct dmatest_params - test parameters.
  66. * @buf_size: size of the memcpy test buffer
  67. * @channel: bus ID of the channel to test
  68. * @device: bus ID of the DMA Engine to test
  69. * @threads_per_chan: number of threads to start per channel
  70. * @max_channels: maximum number of channels to use
  71. * @iterations: iterations before stopping test
  72. * @xor_sources: number of xor source buffers
  73. * @pq_sources: number of p+q source buffers
  74. * @timeout: transfer timeout in msec, -1 for infinite timeout
  75. */
  76. struct dmatest_params {
  77. unsigned int buf_size;
  78. char channel[20];
  79. char device[20];
  80. unsigned int threads_per_chan;
  81. unsigned int max_channels;
  82. unsigned int iterations;
  83. unsigned int xor_sources;
  84. unsigned int pq_sources;
  85. int timeout;
  86. bool noverify;
  87. };
  88. /**
  89. * struct dmatest_info - test information.
  90. * @params: test parameters
  91. * @lock: access protection to the fields of this structure
  92. */
  93. static struct dmatest_info {
  94. /* Test parameters */
  95. struct dmatest_params params;
  96. /* Internal state */
  97. struct list_head channels;
  98. unsigned int nr_channels;
  99. struct mutex lock;
  100. bool did_init;
  101. } test_info = {
  102. .channels = LIST_HEAD_INIT(test_info.channels),
  103. .lock = __MUTEX_INITIALIZER(test_info.lock),
  104. };
  105. static int dmatest_run_set(const char *val, const struct kernel_param *kp);
  106. static int dmatest_run_get(char *val, const struct kernel_param *kp);
  107. static struct kernel_param_ops run_ops = {
  108. .set = dmatest_run_set,
  109. .get = dmatest_run_get,
  110. };
  111. static bool dmatest_run;
  112. module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
  113. MODULE_PARM_DESC(run, "Run the test (default: false)");
  114. /* Maximum amount of mismatched bytes in buffer to print */
  115. #define MAX_ERROR_COUNT 32
  116. /*
  117. * Initialization patterns. All bytes in the source buffer has bit 7
  118. * set, all bytes in the destination buffer has bit 7 cleared.
  119. *
  120. * Bit 6 is set for all bytes which are to be copied by the DMA
  121. * engine. Bit 5 is set for all bytes which are to be overwritten by
  122. * the DMA engine.
  123. *
  124. * The remaining bits are the inverse of a counter which increments by
  125. * one for each byte address.
  126. */
  127. #define PATTERN_SRC 0x80
  128. #define PATTERN_DST 0x00
  129. #define PATTERN_COPY 0x40
  130. #define PATTERN_OVERWRITE 0x20
  131. #define PATTERN_COUNT_MASK 0x1f
  132. struct dmatest_thread {
  133. struct list_head node;
  134. struct dmatest_info *info;
  135. struct task_struct *task;
  136. struct dma_chan *chan;
  137. u8 **srcs;
  138. u8 **dsts;
  139. enum dma_transaction_type type;
  140. bool done;
  141. };
  142. struct dmatest_chan {
  143. struct list_head node;
  144. struct dma_chan *chan;
  145. struct list_head threads;
  146. };
  147. static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
  148. static bool wait;
  149. static bool is_threaded_test_run(struct dmatest_info *info)
  150. {
  151. struct dmatest_chan *dtc;
  152. list_for_each_entry(dtc, &info->channels, node) {
  153. struct dmatest_thread *thread;
  154. list_for_each_entry(thread, &dtc->threads, node) {
  155. if (!thread->done)
  156. return true;
  157. }
  158. }
  159. return false;
  160. }
  161. static int dmatest_wait_get(char *val, const struct kernel_param *kp)
  162. {
  163. struct dmatest_info *info = &test_info;
  164. struct dmatest_params *params = &info->params;
  165. if (params->iterations)
  166. wait_event(thread_wait, !is_threaded_test_run(info));
  167. wait = true;
  168. return param_get_bool(val, kp);
  169. }
  170. static struct kernel_param_ops wait_ops = {
  171. .get = dmatest_wait_get,
  172. .set = param_set_bool,
  173. };
  174. module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
  175. MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
  176. static bool dmatest_match_channel(struct dmatest_params *params,
  177. struct dma_chan *chan)
  178. {
  179. if (params->channel[0] == '\0')
  180. return true;
  181. return strcmp(dma_chan_name(chan), params->channel) == 0;
  182. }
  183. static bool dmatest_match_device(struct dmatest_params *params,
  184. struct dma_device *device)
  185. {
  186. if (params->device[0] == '\0')
  187. return true;
  188. return strcmp(dev_name(device->dev), params->device) == 0;
  189. }
  190. static unsigned long dmatest_random(void)
  191. {
  192. unsigned long buf;
  193. prandom_bytes(&buf, sizeof(buf));
  194. return buf;
  195. }
  196. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
  197. unsigned int buf_size)
  198. {
  199. unsigned int i;
  200. u8 *buf;
  201. for (; (buf = *bufs); bufs++) {
  202. for (i = 0; i < start; i++)
  203. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  204. for ( ; i < start + len; i++)
  205. buf[i] = PATTERN_SRC | PATTERN_COPY
  206. | (~i & PATTERN_COUNT_MASK);
  207. for ( ; i < buf_size; i++)
  208. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  209. buf++;
  210. }
  211. }
  212. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
  213. unsigned int buf_size)
  214. {
  215. unsigned int i;
  216. u8 *buf;
  217. for (; (buf = *bufs); bufs++) {
  218. for (i = 0; i < start; i++)
  219. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  220. for ( ; i < start + len; i++)
  221. buf[i] = PATTERN_DST | PATTERN_OVERWRITE
  222. | (~i & PATTERN_COUNT_MASK);
  223. for ( ; i < buf_size; i++)
  224. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  225. }
  226. }
  227. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  228. unsigned int counter, bool is_srcbuf)
  229. {
  230. u8 diff = actual ^ pattern;
  231. u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
  232. const char *thread_name = current->comm;
  233. if (is_srcbuf)
  234. pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
  235. thread_name, index, expected, actual);
  236. else if ((pattern & PATTERN_COPY)
  237. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  238. pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
  239. thread_name, index, expected, actual);
  240. else if (diff & PATTERN_SRC)
  241. pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
  242. thread_name, index, expected, actual);
  243. else
  244. pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
  245. thread_name, index, expected, actual);
  246. }
  247. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  248. unsigned int end, unsigned int counter, u8 pattern,
  249. bool is_srcbuf)
  250. {
  251. unsigned int i;
  252. unsigned int error_count = 0;
  253. u8 actual;
  254. u8 expected;
  255. u8 *buf;
  256. unsigned int counter_orig = counter;
  257. for (; (buf = *bufs); bufs++) {
  258. counter = counter_orig;
  259. for (i = start; i < end; i++) {
  260. actual = buf[i];
  261. expected = pattern | (~counter & PATTERN_COUNT_MASK);
  262. if (actual != expected) {
  263. if (error_count < MAX_ERROR_COUNT)
  264. dmatest_mismatch(actual, pattern, i,
  265. counter, is_srcbuf);
  266. error_count++;
  267. }
  268. counter++;
  269. }
  270. }
  271. if (error_count > MAX_ERROR_COUNT)
  272. pr_warn("%s: %u errors suppressed\n",
  273. current->comm, error_count - MAX_ERROR_COUNT);
  274. return error_count;
  275. }
  276. /* poor man's completion - we want to use wait_event_freezable() on it */
  277. struct dmatest_done {
  278. bool done;
  279. wait_queue_head_t *wait;
  280. };
  281. static void dmatest_callback(void *arg)
  282. {
  283. struct dmatest_done *done = arg;
  284. done->done = true;
  285. wake_up_all(done->wait);
  286. }
  287. static unsigned int min_odd(unsigned int x, unsigned int y)
  288. {
  289. unsigned int val = min(x, y);
  290. return val % 2 ? val : val - 1;
  291. }
  292. static void result(const char *err, unsigned int n, unsigned int src_off,
  293. unsigned int dst_off, unsigned int len, unsigned long data)
  294. {
  295. pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
  296. current->comm, n, err, src_off, dst_off, len, data);
  297. }
  298. static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
  299. unsigned int dst_off, unsigned int len,
  300. unsigned long data)
  301. {
  302. pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
  303. current->comm, n, err, src_off, dst_off, len, data);
  304. }
  305. #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
  306. if (verbose) \
  307. result(err, n, src_off, dst_off, len, data); \
  308. else \
  309. dbg_result(err, n, src_off, dst_off, len, data); \
  310. })
  311. static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
  312. {
  313. unsigned long long per_sec = 1000000;
  314. if (runtime <= 0)
  315. return 0;
  316. /* drop precision until runtime is 32-bits */
  317. while (runtime > UINT_MAX) {
  318. runtime >>= 1;
  319. per_sec <<= 1;
  320. }
  321. per_sec *= val;
  322. do_div(per_sec, runtime);
  323. return per_sec;
  324. }
  325. static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
  326. {
  327. return dmatest_persec(runtime, len >> 10);
  328. }
  329. /*
  330. * This function repeatedly tests DMA transfers of various lengths and
  331. * offsets for a given operation type until it is told to exit by
  332. * kthread_stop(). There may be multiple threads running this function
  333. * in parallel for a single channel, and there may be multiple channels
  334. * being tested in parallel.
  335. *
  336. * Before each test, the source and destination buffer is initialized
  337. * with a known pattern. This pattern is different depending on
  338. * whether it's in an area which is supposed to be copied or
  339. * overwritten, and different in the source and destination buffers.
  340. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  341. * we'll notice.
  342. */
  343. static int dmatest_func(void *data)
  344. {
  345. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
  346. struct dmatest_thread *thread = data;
  347. struct dmatest_done done = { .wait = &done_wait };
  348. struct dmatest_info *info;
  349. struct dmatest_params *params;
  350. struct dma_chan *chan;
  351. struct dma_device *dev;
  352. unsigned int src_off, dst_off, len;
  353. unsigned int error_count;
  354. unsigned int failed_tests = 0;
  355. unsigned int total_tests = 0;
  356. dma_cookie_t cookie;
  357. enum dma_status status;
  358. enum dma_ctrl_flags flags;
  359. u8 *pq_coefs = NULL;
  360. int ret;
  361. int src_cnt;
  362. int dst_cnt;
  363. int i;
  364. ktime_t ktime;
  365. s64 runtime = 0;
  366. unsigned long long total_len = 0;
  367. set_freezable();
  368. ret = -ENOMEM;
  369. smp_rmb();
  370. info = thread->info;
  371. params = &info->params;
  372. chan = thread->chan;
  373. dev = chan->device;
  374. if (thread->type == DMA_MEMCPY)
  375. src_cnt = dst_cnt = 1;
  376. else if (thread->type == DMA_XOR) {
  377. /* force odd to ensure dst = src */
  378. src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
  379. dst_cnt = 1;
  380. } else if (thread->type == DMA_PQ) {
  381. /* force odd to ensure dst = src */
  382. src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
  383. dst_cnt = 2;
  384. pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
  385. if (!pq_coefs)
  386. goto err_thread_type;
  387. for (i = 0; i < src_cnt; i++)
  388. pq_coefs[i] = 1;
  389. } else
  390. goto err_thread_type;
  391. thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
  392. if (!thread->srcs)
  393. goto err_srcs;
  394. for (i = 0; i < src_cnt; i++) {
  395. thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
  396. if (!thread->srcs[i])
  397. goto err_srcbuf;
  398. }
  399. thread->srcs[i] = NULL;
  400. thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
  401. if (!thread->dsts)
  402. goto err_dsts;
  403. for (i = 0; i < dst_cnt; i++) {
  404. thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
  405. if (!thread->dsts[i])
  406. goto err_dstbuf;
  407. }
  408. thread->dsts[i] = NULL;
  409. set_user_nice(current, 10);
  410. /*
  411. * src and dst buffers are freed by ourselves below
  412. */
  413. flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
  414. ktime = ktime_get();
  415. while (!kthread_should_stop()
  416. && !(params->iterations && total_tests >= params->iterations)) {
  417. struct dma_async_tx_descriptor *tx = NULL;
  418. struct dmaengine_unmap_data *um;
  419. dma_addr_t srcs[src_cnt];
  420. dma_addr_t *dsts;
  421. u8 align = 0;
  422. total_tests++;
  423. /* honor alignment restrictions */
  424. if (thread->type == DMA_MEMCPY)
  425. align = dev->copy_align;
  426. else if (thread->type == DMA_XOR)
  427. align = dev->xor_align;
  428. else if (thread->type == DMA_PQ)
  429. align = dev->pq_align;
  430. if (1 << align > params->buf_size) {
  431. pr_err("%u-byte buffer too small for %d-byte alignment\n",
  432. params->buf_size, 1 << align);
  433. break;
  434. }
  435. if (params->noverify) {
  436. len = params->buf_size;
  437. src_off = 0;
  438. dst_off = 0;
  439. } else {
  440. len = dmatest_random() % params->buf_size + 1;
  441. len = (len >> align) << align;
  442. if (!len)
  443. len = 1 << align;
  444. src_off = dmatest_random() % (params->buf_size - len + 1);
  445. dst_off = dmatest_random() % (params->buf_size - len + 1);
  446. src_off = (src_off >> align) << align;
  447. dst_off = (dst_off >> align) << align;
  448. dmatest_init_srcs(thread->srcs, src_off, len,
  449. params->buf_size);
  450. dmatest_init_dsts(thread->dsts, dst_off, len,
  451. params->buf_size);
  452. }
  453. len = (len >> align) << align;
  454. if (!len)
  455. len = 1 << align;
  456. total_len += len;
  457. um = dmaengine_get_unmap_data(dev->dev, src_cnt+dst_cnt,
  458. GFP_KERNEL);
  459. if (!um) {
  460. failed_tests++;
  461. result("unmap data NULL", total_tests,
  462. src_off, dst_off, len, ret);
  463. continue;
  464. }
  465. um->len = params->buf_size;
  466. for (i = 0; i < src_cnt; i++) {
  467. unsigned long buf = (unsigned long) thread->srcs[i];
  468. struct page *pg = virt_to_page(buf);
  469. unsigned pg_off = buf & ~PAGE_MASK;
  470. um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
  471. um->len, DMA_TO_DEVICE);
  472. srcs[i] = um->addr[i] + src_off;
  473. ret = dma_mapping_error(dev->dev, um->addr[i]);
  474. if (ret) {
  475. dmaengine_unmap_put(um);
  476. result("src mapping error", total_tests,
  477. src_off, dst_off, len, ret);
  478. failed_tests++;
  479. continue;
  480. }
  481. um->to_cnt++;
  482. }
  483. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  484. dsts = &um->addr[src_cnt];
  485. for (i = 0; i < dst_cnt; i++) {
  486. unsigned long buf = (unsigned long) thread->dsts[i];
  487. struct page *pg = virt_to_page(buf);
  488. unsigned pg_off = buf & ~PAGE_MASK;
  489. dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
  490. DMA_BIDIRECTIONAL);
  491. ret = dma_mapping_error(dev->dev, dsts[i]);
  492. if (ret) {
  493. dmaengine_unmap_put(um);
  494. result("dst mapping error", total_tests,
  495. src_off, dst_off, len, ret);
  496. failed_tests++;
  497. continue;
  498. }
  499. um->bidi_cnt++;
  500. }
  501. if (thread->type == DMA_MEMCPY)
  502. tx = dev->device_prep_dma_memcpy(chan,
  503. dsts[0] + dst_off,
  504. srcs[0], len, flags);
  505. else if (thread->type == DMA_XOR)
  506. tx = dev->device_prep_dma_xor(chan,
  507. dsts[0] + dst_off,
  508. srcs, src_cnt,
  509. len, flags);
  510. else if (thread->type == DMA_PQ) {
  511. dma_addr_t dma_pq[dst_cnt];
  512. for (i = 0; i < dst_cnt; i++)
  513. dma_pq[i] = dsts[i] + dst_off;
  514. tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
  515. src_cnt, pq_coefs,
  516. len, flags);
  517. }
  518. if (!tx) {
  519. dmaengine_unmap_put(um);
  520. result("prep error", total_tests, src_off,
  521. dst_off, len, ret);
  522. msleep(100);
  523. failed_tests++;
  524. continue;
  525. }
  526. done.done = false;
  527. tx->callback = dmatest_callback;
  528. tx->callback_param = &done;
  529. cookie = tx->tx_submit(tx);
  530. if (dma_submit_error(cookie)) {
  531. dmaengine_unmap_put(um);
  532. result("submit error", total_tests, src_off,
  533. dst_off, len, ret);
  534. msleep(100);
  535. failed_tests++;
  536. continue;
  537. }
  538. dma_async_issue_pending(chan);
  539. wait_event_freezable_timeout(done_wait, done.done,
  540. msecs_to_jiffies(params->timeout));
  541. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  542. if (!done.done) {
  543. /*
  544. * We're leaving the timed out dma operation with
  545. * dangling pointer to done_wait. To make this
  546. * correct, we'll need to allocate wait_done for
  547. * each test iteration and perform "who's gonna
  548. * free it this time?" dancing. For now, just
  549. * leave it dangling.
  550. */
  551. dmaengine_unmap_put(um);
  552. result("test timed out", total_tests, src_off, dst_off,
  553. len, 0);
  554. failed_tests++;
  555. continue;
  556. } else if (status != DMA_SUCCESS) {
  557. dmaengine_unmap_put(um);
  558. result(status == DMA_ERROR ?
  559. "completion error status" :
  560. "completion busy status", total_tests, src_off,
  561. dst_off, len, ret);
  562. failed_tests++;
  563. continue;
  564. }
  565. dmaengine_unmap_put(um);
  566. if (params->noverify) {
  567. verbose_result("test passed", total_tests, src_off,
  568. dst_off, len, 0);
  569. continue;
  570. }
  571. pr_debug("%s: verifying source buffer...\n", current->comm);
  572. error_count = dmatest_verify(thread->srcs, 0, src_off,
  573. 0, PATTERN_SRC, true);
  574. error_count += dmatest_verify(thread->srcs, src_off,
  575. src_off + len, src_off,
  576. PATTERN_SRC | PATTERN_COPY, true);
  577. error_count += dmatest_verify(thread->srcs, src_off + len,
  578. params->buf_size, src_off + len,
  579. PATTERN_SRC, true);
  580. pr_debug("%s: verifying dest buffer...\n", current->comm);
  581. error_count += dmatest_verify(thread->dsts, 0, dst_off,
  582. 0, PATTERN_DST, false);
  583. error_count += dmatest_verify(thread->dsts, dst_off,
  584. dst_off + len, src_off,
  585. PATTERN_SRC | PATTERN_COPY, false);
  586. error_count += dmatest_verify(thread->dsts, dst_off + len,
  587. params->buf_size, dst_off + len,
  588. PATTERN_DST, false);
  589. if (error_count) {
  590. result("data error", total_tests, src_off, dst_off,
  591. len, error_count);
  592. failed_tests++;
  593. } else {
  594. verbose_result("test passed", total_tests, src_off,
  595. dst_off, len, 0);
  596. }
  597. }
  598. runtime = ktime_us_delta(ktime_get(), ktime);
  599. ret = 0;
  600. for (i = 0; thread->dsts[i]; i++)
  601. kfree(thread->dsts[i]);
  602. err_dstbuf:
  603. kfree(thread->dsts);
  604. err_dsts:
  605. for (i = 0; thread->srcs[i]; i++)
  606. kfree(thread->srcs[i]);
  607. err_srcbuf:
  608. kfree(thread->srcs);
  609. err_srcs:
  610. kfree(pq_coefs);
  611. err_thread_type:
  612. pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
  613. current->comm, total_tests, failed_tests,
  614. dmatest_persec(runtime, total_tests),
  615. dmatest_KBs(runtime, total_len), ret);
  616. /* terminate all transfers on specified channels */
  617. if (ret)
  618. dmaengine_terminate_all(chan);
  619. thread->done = true;
  620. wake_up(&thread_wait);
  621. return ret;
  622. }
  623. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  624. {
  625. struct dmatest_thread *thread;
  626. struct dmatest_thread *_thread;
  627. int ret;
  628. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  629. ret = kthread_stop(thread->task);
  630. pr_debug("thread %s exited with status %d\n",
  631. thread->task->comm, ret);
  632. list_del(&thread->node);
  633. put_task_struct(thread->task);
  634. kfree(thread);
  635. }
  636. /* terminate all transfers on specified channels */
  637. dmaengine_terminate_all(dtc->chan);
  638. kfree(dtc);
  639. }
  640. static int dmatest_add_threads(struct dmatest_info *info,
  641. struct dmatest_chan *dtc, enum dma_transaction_type type)
  642. {
  643. struct dmatest_params *params = &info->params;
  644. struct dmatest_thread *thread;
  645. struct dma_chan *chan = dtc->chan;
  646. char *op;
  647. unsigned int i;
  648. if (type == DMA_MEMCPY)
  649. op = "copy";
  650. else if (type == DMA_XOR)
  651. op = "xor";
  652. else if (type == DMA_PQ)
  653. op = "pq";
  654. else
  655. return -EINVAL;
  656. for (i = 0; i < params->threads_per_chan; i++) {
  657. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  658. if (!thread) {
  659. pr_warn("No memory for %s-%s%u\n",
  660. dma_chan_name(chan), op, i);
  661. break;
  662. }
  663. thread->info = info;
  664. thread->chan = dtc->chan;
  665. thread->type = type;
  666. smp_wmb();
  667. thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
  668. dma_chan_name(chan), op, i);
  669. if (IS_ERR(thread->task)) {
  670. pr_warn("Failed to create thread %s-%s%u\n",
  671. dma_chan_name(chan), op, i);
  672. kfree(thread);
  673. break;
  674. }
  675. /* srcbuf and dstbuf are allocated by the thread itself */
  676. get_task_struct(thread->task);
  677. list_add_tail(&thread->node, &dtc->threads);
  678. wake_up_process(thread->task);
  679. }
  680. return i;
  681. }
  682. static int dmatest_add_channel(struct dmatest_info *info,
  683. struct dma_chan *chan)
  684. {
  685. struct dmatest_chan *dtc;
  686. struct dma_device *dma_dev = chan->device;
  687. unsigned int thread_count = 0;
  688. int cnt;
  689. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  690. if (!dtc) {
  691. pr_warn("No memory for %s\n", dma_chan_name(chan));
  692. return -ENOMEM;
  693. }
  694. dtc->chan = chan;
  695. INIT_LIST_HEAD(&dtc->threads);
  696. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  697. cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
  698. thread_count += cnt > 0 ? cnt : 0;
  699. }
  700. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  701. cnt = dmatest_add_threads(info, dtc, DMA_XOR);
  702. thread_count += cnt > 0 ? cnt : 0;
  703. }
  704. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  705. cnt = dmatest_add_threads(info, dtc, DMA_PQ);
  706. thread_count += cnt > 0 ? cnt : 0;
  707. }
  708. pr_info("Started %u threads using %s\n",
  709. thread_count, dma_chan_name(chan));
  710. list_add_tail(&dtc->node, &info->channels);
  711. info->nr_channels++;
  712. return 0;
  713. }
  714. static bool filter(struct dma_chan *chan, void *param)
  715. {
  716. struct dmatest_params *params = param;
  717. if (!dmatest_match_channel(params, chan) ||
  718. !dmatest_match_device(params, chan->device))
  719. return false;
  720. else
  721. return true;
  722. }
  723. static void request_channels(struct dmatest_info *info,
  724. enum dma_transaction_type type)
  725. {
  726. dma_cap_mask_t mask;
  727. dma_cap_zero(mask);
  728. dma_cap_set(type, mask);
  729. for (;;) {
  730. struct dmatest_params *params = &info->params;
  731. struct dma_chan *chan;
  732. chan = dma_request_channel(mask, filter, params);
  733. if (chan) {
  734. if (dmatest_add_channel(info, chan)) {
  735. dma_release_channel(chan);
  736. break; /* add_channel failed, punt */
  737. }
  738. } else
  739. break; /* no more channels available */
  740. if (params->max_channels &&
  741. info->nr_channels >= params->max_channels)
  742. break; /* we have all we need */
  743. }
  744. }
  745. static void run_threaded_test(struct dmatest_info *info)
  746. {
  747. struct dmatest_params *params = &info->params;
  748. /* Copy test parameters */
  749. params->buf_size = test_buf_size;
  750. strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
  751. strlcpy(params->device, strim(test_device), sizeof(params->device));
  752. params->threads_per_chan = threads_per_chan;
  753. params->max_channels = max_channels;
  754. params->iterations = iterations;
  755. params->xor_sources = xor_sources;
  756. params->pq_sources = pq_sources;
  757. params->timeout = timeout;
  758. params->noverify = noverify;
  759. request_channels(info, DMA_MEMCPY);
  760. request_channels(info, DMA_XOR);
  761. request_channels(info, DMA_PQ);
  762. }
  763. static void stop_threaded_test(struct dmatest_info *info)
  764. {
  765. struct dmatest_chan *dtc, *_dtc;
  766. struct dma_chan *chan;
  767. list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
  768. list_del(&dtc->node);
  769. chan = dtc->chan;
  770. dmatest_cleanup_channel(dtc);
  771. pr_debug("dropped channel %s\n", dma_chan_name(chan));
  772. dma_release_channel(chan);
  773. }
  774. info->nr_channels = 0;
  775. }
  776. static void restart_threaded_test(struct dmatest_info *info, bool run)
  777. {
  778. /* we might be called early to set run=, defer running until all
  779. * parameters have been evaluated
  780. */
  781. if (!info->did_init)
  782. return;
  783. /* Stop any running test first */
  784. stop_threaded_test(info);
  785. /* Run test with new parameters */
  786. run_threaded_test(info);
  787. }
  788. static int dmatest_run_get(char *val, const struct kernel_param *kp)
  789. {
  790. struct dmatest_info *info = &test_info;
  791. mutex_lock(&info->lock);
  792. if (is_threaded_test_run(info)) {
  793. dmatest_run = true;
  794. } else {
  795. stop_threaded_test(info);
  796. dmatest_run = false;
  797. }
  798. mutex_unlock(&info->lock);
  799. return param_get_bool(val, kp);
  800. }
  801. static int dmatest_run_set(const char *val, const struct kernel_param *kp)
  802. {
  803. struct dmatest_info *info = &test_info;
  804. int ret;
  805. mutex_lock(&info->lock);
  806. ret = param_set_bool(val, kp);
  807. if (ret) {
  808. mutex_unlock(&info->lock);
  809. return ret;
  810. }
  811. if (is_threaded_test_run(info))
  812. ret = -EBUSY;
  813. else if (dmatest_run)
  814. restart_threaded_test(info, dmatest_run);
  815. mutex_unlock(&info->lock);
  816. return ret;
  817. }
  818. static int __init dmatest_init(void)
  819. {
  820. struct dmatest_info *info = &test_info;
  821. struct dmatest_params *params = &info->params;
  822. if (dmatest_run) {
  823. mutex_lock(&info->lock);
  824. run_threaded_test(info);
  825. mutex_unlock(&info->lock);
  826. }
  827. if (params->iterations && wait)
  828. wait_event(thread_wait, !is_threaded_test_run(info));
  829. /* module parameters are stable, inittime tests are started,
  830. * let userspace take over 'run' control
  831. */
  832. info->did_init = true;
  833. return 0;
  834. }
  835. /* when compiled-in wait for drivers to load first */
  836. late_initcall(dmatest_init);
  837. static void __exit dmatest_exit(void)
  838. {
  839. struct dmatest_info *info = &test_info;
  840. mutex_lock(&info->lock);
  841. stop_threaded_test(info);
  842. mutex_unlock(&info->lock);
  843. }
  844. module_exit(dmatest_exit);
  845. MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
  846. MODULE_LICENSE("GPL v2");