prima2-cb.dts 8.7 KB

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  1. /dts-v1/;
  2. / {
  3. model = "SiRF Prima2 eVB";
  4. compatible = "sirf,prima2-cb", "sirf,prima2";
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. interrupt-parent = <&intc>;
  8. memory {
  9. reg = <0x00000000 0x20000000>;
  10. };
  11. chosen {
  12. bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
  13. linux,stdout-path = &uart1;
  14. };
  15. cpus {
  16. #address-cells = <1>;
  17. #size-cells = <0>;
  18. cpu@0 {
  19. reg = <0x0>;
  20. d-cache-line-size = <32>;
  21. i-cache-line-size = <32>;
  22. d-cache-size = <32768>;
  23. i-cache-size = <32768>;
  24. /* from bootloader */
  25. timebase-frequency = <0>;
  26. bus-frequency = <0>;
  27. clock-frequency = <0>;
  28. };
  29. };
  30. axi {
  31. compatible = "simple-bus";
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. ranges = <0x40000000 0x40000000 0x80000000>;
  35. l2-cache-controller@80040000 {
  36. compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
  37. reg = <0x80040000 0x1000>;
  38. interrupts = <59>;
  39. arm,tag-latency = <1 1 1>;
  40. arm,data-latency = <1 1 1>;
  41. arm,filter-ranges = <0 0x40000000>;
  42. };
  43. intc: interrupt-controller@80020000 {
  44. #interrupt-cells = <1>;
  45. interrupt-controller;
  46. compatible = "sirf,prima2-intc";
  47. reg = <0x80020000 0x1000>;
  48. };
  49. sys-iobg {
  50. compatible = "simple-bus";
  51. #address-cells = <1>;
  52. #size-cells = <1>;
  53. ranges = <0x88000000 0x88000000 0x40000>;
  54. clock-controller@88000000 {
  55. compatible = "sirf,prima2-clkc";
  56. reg = <0x88000000 0x1000>;
  57. interrupts = <3>;
  58. };
  59. reset-controller@88010000 {
  60. compatible = "sirf,prima2-rstc";
  61. reg = <0x88010000 0x1000>;
  62. };
  63. rsc-controller@88020000 {
  64. compatible = "sirf,prima2-rsc";
  65. reg = <0x88020000 0x1000>;
  66. };
  67. };
  68. mem-iobg {
  69. compatible = "simple-bus";
  70. #address-cells = <1>;
  71. #size-cells = <1>;
  72. ranges = <0x90000000 0x90000000 0x10000>;
  73. memory-controller@90000000 {
  74. compatible = "sirf,prima2-memc";
  75. reg = <0x90000000 0x10000>;
  76. interrupts = <27>;
  77. };
  78. };
  79. disp-iobg {
  80. compatible = "simple-bus";
  81. #address-cells = <1>;
  82. #size-cells = <1>;
  83. ranges = <0x90010000 0x90010000 0x30000>;
  84. display@90010000 {
  85. compatible = "sirf,prima2-lcd";
  86. reg = <0x90010000 0x20000>;
  87. interrupts = <30>;
  88. };
  89. vpp@90020000 {
  90. compatible = "sirf,prima2-vpp";
  91. reg = <0x90020000 0x10000>;
  92. interrupts = <31>;
  93. };
  94. };
  95. graphics-iobg {
  96. compatible = "simple-bus";
  97. #address-cells = <1>;
  98. #size-cells = <1>;
  99. ranges = <0x98000000 0x98000000 0x8000000>;
  100. graphics@98000000 {
  101. compatible = "powervr,sgx531";
  102. reg = <0x98000000 0x8000000>;
  103. interrupts = <6>;
  104. };
  105. };
  106. multimedia-iobg {
  107. compatible = "simple-bus";
  108. #address-cells = <1>;
  109. #size-cells = <1>;
  110. ranges = <0xa0000000 0xa0000000 0x8000000>;
  111. multimedia@a0000000 {
  112. compatible = "sirf,prima2-video-codec";
  113. reg = <0xa0000000 0x8000000>;
  114. interrupts = <5>;
  115. };
  116. };
  117. dsp-iobg {
  118. compatible = "simple-bus";
  119. #address-cells = <1>;
  120. #size-cells = <1>;
  121. ranges = <0xa8000000 0xa8000000 0x2000000>;
  122. dspif@a8000000 {
  123. compatible = "sirf,prima2-dspif";
  124. reg = <0xa8000000 0x10000>;
  125. interrupts = <9>;
  126. };
  127. gps@a8010000 {
  128. compatible = "sirf,prima2-gps";
  129. reg = <0xa8010000 0x10000>;
  130. interrupts = <7>;
  131. };
  132. dsp@a9000000 {
  133. compatible = "sirf,prima2-dsp";
  134. reg = <0xa9000000 0x1000000>;
  135. interrupts = <8>;
  136. };
  137. };
  138. peri-iobg {
  139. compatible = "simple-bus";
  140. #address-cells = <1>;
  141. #size-cells = <1>;
  142. ranges = <0xb0000000 0xb0000000 0x180000>;
  143. timer@b0020000 {
  144. compatible = "sirf,prima2-tick";
  145. reg = <0xb0020000 0x1000>;
  146. interrupts = <0>;
  147. };
  148. nand@b0030000 {
  149. compatible = "sirf,prima2-nand";
  150. reg = <0xb0030000 0x10000>;
  151. interrupts = <41>;
  152. };
  153. audio@b0040000 {
  154. compatible = "sirf,prima2-audio";
  155. reg = <0xb0040000 0x10000>;
  156. interrupts = <35>;
  157. };
  158. uart0: uart@b0050000 {
  159. cell-index = <0>;
  160. compatible = "sirf,prima2-uart";
  161. reg = <0xb0050000 0x10000>;
  162. interrupts = <17>;
  163. };
  164. uart1: uart@b0060000 {
  165. cell-index = <1>;
  166. compatible = "sirf,prima2-uart";
  167. reg = <0xb0060000 0x10000>;
  168. interrupts = <18>;
  169. };
  170. uart2: uart@b0070000 {
  171. cell-index = <2>;
  172. compatible = "sirf,prima2-uart";
  173. reg = <0xb0070000 0x10000>;
  174. interrupts = <19>;
  175. };
  176. usp0: usp@b0080000 {
  177. cell-index = <0>;
  178. compatible = "sirf,prima2-usp";
  179. reg = <0xb0080000 0x10000>;
  180. interrupts = <20>;
  181. };
  182. usp1: usp@b0090000 {
  183. cell-index = <1>;
  184. compatible = "sirf,prima2-usp";
  185. reg = <0xb0090000 0x10000>;
  186. interrupts = <21>;
  187. };
  188. usp2: usp@b00a0000 {
  189. cell-index = <2>;
  190. compatible = "sirf,prima2-usp";
  191. reg = <0xb00a0000 0x10000>;
  192. interrupts = <22>;
  193. };
  194. dmac0: dma-controller@b00b0000 {
  195. cell-index = <0>;
  196. compatible = "sirf,prima2-dmac";
  197. reg = <0xb00b0000 0x10000>;
  198. interrupts = <12>;
  199. };
  200. dmac1: dma-controller@b0160000 {
  201. cell-index = <1>;
  202. compatible = "sirf,prima2-dmac";
  203. reg = <0xb0160000 0x10000>;
  204. interrupts = <13>;
  205. };
  206. vip@b00C0000 {
  207. compatible = "sirf,prima2-vip";
  208. reg = <0xb00C0000 0x10000>;
  209. };
  210. spi0: spi@b00d0000 {
  211. cell-index = <0>;
  212. compatible = "sirf,prima2-spi";
  213. reg = <0xb00d0000 0x10000>;
  214. interrupts = <15>;
  215. };
  216. spi1: spi@b0170000 {
  217. cell-index = <1>;
  218. compatible = "sirf,prima2-spi";
  219. reg = <0xb0170000 0x10000>;
  220. interrupts = <16>;
  221. };
  222. i2c0: i2c@b00e0000 {
  223. cell-index = <0>;
  224. compatible = "sirf,prima2-i2c";
  225. reg = <0xb00e0000 0x10000>;
  226. interrupts = <24>;
  227. };
  228. i2c1: i2c@b00f0000 {
  229. cell-index = <1>;
  230. compatible = "sirf,prima2-i2c";
  231. reg = <0xb00f0000 0x10000>;
  232. interrupts = <25>;
  233. };
  234. tsc@b0110000 {
  235. compatible = "sirf,prima2-tsc";
  236. reg = <0xb0110000 0x10000>;
  237. interrupts = <33>;
  238. };
  239. gpio: gpio-controller@b0120000 {
  240. #gpio-cells = <2>;
  241. #interrupt-cells = <2>;
  242. compatible = "sirf,prima2-gpio-pinmux";
  243. reg = <0xb0120000 0x10000>;
  244. interrupts = <43 44 45 46 47>;
  245. gpio-controller;
  246. interrupt-controller;
  247. };
  248. pwm@b0130000 {
  249. compatible = "sirf,prima2-pwm";
  250. reg = <0xb0130000 0x10000>;
  251. };
  252. efusesys@b0140000 {
  253. compatible = "sirf,prima2-efuse";
  254. reg = <0xb0140000 0x10000>;
  255. };
  256. pulsec@b0150000 {
  257. compatible = "sirf,prima2-pulsec";
  258. reg = <0xb0150000 0x10000>;
  259. interrupts = <48>;
  260. };
  261. pci-iobg {
  262. compatible = "sirf,prima2-pciiobg", "simple-bus";
  263. #address-cells = <1>;
  264. #size-cells = <1>;
  265. ranges = <0x56000000 0x56000000 0x1b00000>;
  266. sd0: sdhci@56000000 {
  267. cell-index = <0>;
  268. compatible = "sirf,prima2-sdhc";
  269. reg = <0x56000000 0x100000>;
  270. interrupts = <38>;
  271. };
  272. sd1: sdhci@56100000 {
  273. cell-index = <1>;
  274. compatible = "sirf,prima2-sdhc";
  275. reg = <0x56100000 0x100000>;
  276. interrupts = <38>;
  277. };
  278. sd2: sdhci@56200000 {
  279. cell-index = <2>;
  280. compatible = "sirf,prima2-sdhc";
  281. reg = <0x56200000 0x100000>;
  282. interrupts = <23>;
  283. };
  284. sd3: sdhci@56300000 {
  285. cell-index = <3>;
  286. compatible = "sirf,prima2-sdhc";
  287. reg = <0x56300000 0x100000>;
  288. interrupts = <23>;
  289. };
  290. sd4: sdhci@56400000 {
  291. cell-index = <4>;
  292. compatible = "sirf,prima2-sdhc";
  293. reg = <0x56400000 0x100000>;
  294. interrupts = <39>;
  295. };
  296. sd5: sdhci@56500000 {
  297. cell-index = <5>;
  298. compatible = "sirf,prima2-sdhc";
  299. reg = <0x56500000 0x100000>;
  300. interrupts = <39>;
  301. };
  302. pci-copy@57900000 {
  303. compatible = "sirf,prima2-pcicp";
  304. reg = <0x57900000 0x100000>;
  305. interrupts = <40>;
  306. };
  307. rom-interface@57a00000 {
  308. compatible = "sirf,prima2-romif";
  309. reg = <0x57a00000 0x100000>;
  310. };
  311. };
  312. };
  313. rtc-iobg {
  314. compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
  315. #address-cells = <1>;
  316. #size-cells = <1>;
  317. reg = <0x80030000 0x10000>;
  318. gpsrtc@1000 {
  319. compatible = "sirf,prima2-gpsrtc";
  320. reg = <0x1000 0x1000>;
  321. interrupts = <55 56 57>;
  322. };
  323. sysrtc@2000 {
  324. compatible = "sirf,prima2-sysrtc";
  325. reg = <0x2000 0x1000>;
  326. interrupts = <52 53 54>;
  327. };
  328. pwrc@3000 {
  329. compatible = "sirf,prima2-pwrc";
  330. reg = <0x3000 0x1000>;
  331. interrupts = <32>;
  332. };
  333. };
  334. uus-iobg {
  335. compatible = "simple-bus";
  336. #address-cells = <1>;
  337. #size-cells = <1>;
  338. ranges = <0xb8000000 0xb8000000 0x40000>;
  339. usb0: usb@b00e0000 {
  340. compatible = "chipidea,ci13611a-prima2";
  341. reg = <0xb8000000 0x10000>;
  342. interrupts = <10>;
  343. };
  344. usb1: usb@b00f0000 {
  345. compatible = "chipidea,ci13611a-prima2";
  346. reg = <0xb8010000 0x10000>;
  347. interrupts = <11>;
  348. };
  349. sata@b00f0000 {
  350. compatible = "synopsys,dwc-ahsata";
  351. reg = <0xb8020000 0x10000>;
  352. interrupts = <37>;
  353. };
  354. security@b00f0000 {
  355. compatible = "sirf,prima2-security";
  356. reg = <0xb8030000 0x10000>;
  357. interrupts = <42>;
  358. };
  359. };
  360. };
  361. };