ezkit.c 25 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/stamp.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/physmap.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/i2c.h>
  41. #include <linux/irq.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/usb/sl811.h>
  44. #include <linux/usb/musb.h>
  45. #include <asm/cplb.h>
  46. #include <asm/dma.h>
  47. #include <asm/bfin5xx_spi.h>
  48. #include <asm/reboot.h>
  49. #include <asm/nand.h>
  50. #include <asm/portmux.h>
  51. #include <asm/dpmc.h>
  52. #include <linux/spi/ad7877.h>
  53. /*
  54. * Name the Board for the /proc/cpuinfo
  55. */
  56. const char bfin_board_name[] = "ADDS-BF527-EZKIT";
  57. /*
  58. * Driver needs to know address, irq and flag pin.
  59. */
  60. #define ISP1761_BASE 0x203C0000
  61. #define ISP1761_IRQ IRQ_PF7
  62. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  63. static struct resource bfin_isp1761_resources[] = {
  64. [0] = {
  65. .name = "isp1761-regs",
  66. .start = ISP1761_BASE + 0x00000000,
  67. .end = ISP1761_BASE + 0x000fffff,
  68. .flags = IORESOURCE_MEM,
  69. },
  70. [1] = {
  71. .start = ISP1761_IRQ,
  72. .end = ISP1761_IRQ,
  73. .flags = IORESOURCE_IRQ,
  74. },
  75. };
  76. static struct platform_device bfin_isp1761_device = {
  77. .name = "isp1761",
  78. .id = 0,
  79. .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
  80. .resource = bfin_isp1761_resources,
  81. };
  82. static struct platform_device *bfin_isp1761_devices[] = {
  83. &bfin_isp1761_device,
  84. };
  85. int __init bfin_isp1761_init(void)
  86. {
  87. unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
  88. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  89. set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
  90. return platform_add_devices(bfin_isp1761_devices, num_devices);
  91. }
  92. void __exit bfin_isp1761_exit(void)
  93. {
  94. platform_device_unregister(&bfin_isp1761_device);
  95. }
  96. arch_initcall(bfin_isp1761_init);
  97. #endif
  98. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  99. static struct resource musb_resources[] = {
  100. [0] = {
  101. .start = 0xffc03800,
  102. .end = 0xffc03cff,
  103. .flags = IORESOURCE_MEM,
  104. },
  105. [1] = { /* general IRQ */
  106. .start = IRQ_USB_INT0,
  107. .end = IRQ_USB_INT0,
  108. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  109. },
  110. [2] = { /* DMA IRQ */
  111. .start = IRQ_USB_DMA,
  112. .end = IRQ_USB_DMA,
  113. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  114. },
  115. };
  116. static struct musb_hdrc_config musb_config = {
  117. .multipoint = 0,
  118. .dyn_fifo = 0,
  119. .soft_con = 1,
  120. .dma = 1,
  121. .num_eps = 7,
  122. .dma_channels = 7,
  123. .gpio_vrsel = GPIO_PG13,
  124. };
  125. static struct musb_hdrc_platform_data musb_plat = {
  126. #if defined(CONFIG_USB_MUSB_OTG)
  127. .mode = MUSB_OTG,
  128. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  129. .mode = MUSB_HOST,
  130. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  131. .mode = MUSB_PERIPHERAL,
  132. #endif
  133. .config = &musb_config,
  134. };
  135. static u64 musb_dmamask = ~(u32)0;
  136. static struct platform_device musb_device = {
  137. .name = "musb_hdrc",
  138. .id = 0,
  139. .dev = {
  140. .dma_mask = &musb_dmamask,
  141. .coherent_dma_mask = 0xffffffff,
  142. .platform_data = &musb_plat,
  143. },
  144. .num_resources = ARRAY_SIZE(musb_resources),
  145. .resource = musb_resources,
  146. };
  147. #endif
  148. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  149. static struct resource bf52x_t350mcqb_resources[] = {
  150. {
  151. .start = IRQ_PPI_ERROR,
  152. .end = IRQ_PPI_ERROR,
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. static struct platform_device bf52x_t350mcqb_device = {
  157. .name = "bfin-t350mcqb",
  158. .id = -1,
  159. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  160. .resource = bf52x_t350mcqb_resources,
  161. };
  162. #endif
  163. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  164. static struct mtd_partition ezkit_partitions[] = {
  165. {
  166. .name = "bootloader(nor)",
  167. .size = 0x40000,
  168. .offset = 0,
  169. }, {
  170. .name = "linux kernel(nor)",
  171. .size = 0x1C0000,
  172. .offset = MTDPART_OFS_APPEND,
  173. }, {
  174. .name = "file system(nor)",
  175. .size = MTDPART_SIZ_FULL,
  176. .offset = MTDPART_OFS_APPEND,
  177. }
  178. };
  179. static struct physmap_flash_data ezkit_flash_data = {
  180. .width = 2,
  181. .parts = ezkit_partitions,
  182. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  183. };
  184. static struct resource ezkit_flash_resource = {
  185. .start = 0x20000000,
  186. .end = 0x203fffff,
  187. .flags = IORESOURCE_MEM,
  188. };
  189. static struct platform_device ezkit_flash_device = {
  190. .name = "physmap-flash",
  191. .id = 0,
  192. .dev = {
  193. .platform_data = &ezkit_flash_data,
  194. },
  195. .num_resources = 1,
  196. .resource = &ezkit_flash_resource,
  197. };
  198. #endif
  199. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  200. static struct mtd_partition partition_info[] = {
  201. {
  202. .name = "linux kernel(nand)",
  203. .offset = 0,
  204. .size = 4 * SIZE_1M,
  205. },
  206. {
  207. .name = "file system(nand)",
  208. .offset = MTDPART_OFS_APPEND,
  209. .size = MTDPART_SIZ_FULL,
  210. },
  211. };
  212. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  213. .page_size = NFC_PG_SIZE_256,
  214. .data_width = NFC_NWIDTH_8,
  215. .partitions = partition_info,
  216. .nr_partitions = ARRAY_SIZE(partition_info),
  217. .rd_dly = 3,
  218. .wr_dly = 3,
  219. };
  220. static struct resource bf5xx_nand_resources[] = {
  221. {
  222. .start = NFC_CTL,
  223. .end = NFC_DATA_RD + 2,
  224. .flags = IORESOURCE_MEM,
  225. },
  226. {
  227. .start = CH_NFC,
  228. .end = CH_NFC,
  229. .flags = IORESOURCE_IRQ,
  230. },
  231. };
  232. static struct platform_device bf5xx_nand_device = {
  233. .name = "bf5xx-nand",
  234. .id = 0,
  235. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  236. .resource = bf5xx_nand_resources,
  237. .dev = {
  238. .platform_data = &bf5xx_nand_platform,
  239. },
  240. };
  241. #endif
  242. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  243. static struct resource bfin_pcmcia_cf_resources[] = {
  244. {
  245. .start = 0x20310000, /* IO PORT */
  246. .end = 0x20312000,
  247. .flags = IORESOURCE_MEM,
  248. }, {
  249. .start = 0x20311000, /* Attribute Memory */
  250. .end = 0x20311FFF,
  251. .flags = IORESOURCE_MEM,
  252. }, {
  253. .start = IRQ_PF4,
  254. .end = IRQ_PF4,
  255. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  256. }, {
  257. .start = 6, /* Card Detect PF6 */
  258. .end = 6,
  259. .flags = IORESOURCE_IRQ,
  260. },
  261. };
  262. static struct platform_device bfin_pcmcia_cf_device = {
  263. .name = "bfin_cf_pcmcia",
  264. .id = -1,
  265. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  266. .resource = bfin_pcmcia_cf_resources,
  267. };
  268. #endif
  269. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  270. static struct platform_device rtc_device = {
  271. .name = "rtc-bfin",
  272. .id = -1,
  273. };
  274. #endif
  275. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  276. static struct resource smc91x_resources[] = {
  277. {
  278. .name = "smc91x-regs",
  279. .start = 0x20300300,
  280. .end = 0x20300300 + 16,
  281. .flags = IORESOURCE_MEM,
  282. }, {
  283. .start = IRQ_PF7,
  284. .end = IRQ_PF7,
  285. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  286. },
  287. };
  288. static struct platform_device smc91x_device = {
  289. .name = "smc91x",
  290. .id = 0,
  291. .num_resources = ARRAY_SIZE(smc91x_resources),
  292. .resource = smc91x_resources,
  293. };
  294. #endif
  295. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  296. static struct resource dm9000_resources[] = {
  297. [0] = {
  298. .start = 0x203FB800,
  299. .end = 0x203FB800 + 1,
  300. .flags = IORESOURCE_MEM,
  301. },
  302. [1] = {
  303. .start = 0x203FB800 + 4,
  304. .end = 0x203FB800 + 5,
  305. .flags = IORESOURCE_MEM,
  306. },
  307. [2] = {
  308. .start = IRQ_PF9,
  309. .end = IRQ_PF9,
  310. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  311. },
  312. };
  313. static struct platform_device dm9000_device = {
  314. .name = "dm9000",
  315. .id = -1,
  316. .num_resources = ARRAY_SIZE(dm9000_resources),
  317. .resource = dm9000_resources,
  318. };
  319. #endif
  320. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  321. static struct resource sl811_hcd_resources[] = {
  322. {
  323. .start = 0x20340000,
  324. .end = 0x20340000,
  325. .flags = IORESOURCE_MEM,
  326. }, {
  327. .start = 0x20340004,
  328. .end = 0x20340004,
  329. .flags = IORESOURCE_MEM,
  330. }, {
  331. .start = CONFIG_USB_SL811_BFIN_IRQ,
  332. .end = CONFIG_USB_SL811_BFIN_IRQ,
  333. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  334. },
  335. };
  336. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  337. void sl811_port_power(struct device *dev, int is_on)
  338. {
  339. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  340. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  341. }
  342. #endif
  343. static struct sl811_platform_data sl811_priv = {
  344. .potpg = 10,
  345. .power = 250, /* == 500mA */
  346. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  347. .port_power = &sl811_port_power,
  348. #endif
  349. };
  350. static struct platform_device sl811_hcd_device = {
  351. .name = "sl811-hcd",
  352. .id = 0,
  353. .dev = {
  354. .platform_data = &sl811_priv,
  355. },
  356. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  357. .resource = sl811_hcd_resources,
  358. };
  359. #endif
  360. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  361. static struct resource isp1362_hcd_resources[] = {
  362. {
  363. .start = 0x20360000,
  364. .end = 0x20360000,
  365. .flags = IORESOURCE_MEM,
  366. }, {
  367. .start = 0x20360004,
  368. .end = 0x20360004,
  369. .flags = IORESOURCE_MEM,
  370. }, {
  371. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  372. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  373. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  374. },
  375. };
  376. static struct isp1362_platform_data isp1362_priv = {
  377. .sel15Kres = 1,
  378. .clknotstop = 0,
  379. .oc_enable = 0,
  380. .int_act_high = 0,
  381. .int_edge_triggered = 0,
  382. .remote_wakeup_connected = 0,
  383. .no_power_switching = 1,
  384. .power_switching_mode = 0,
  385. };
  386. static struct platform_device isp1362_hcd_device = {
  387. .name = "isp1362-hcd",
  388. .id = 0,
  389. .dev = {
  390. .platform_data = &isp1362_priv,
  391. },
  392. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  393. .resource = isp1362_hcd_resources,
  394. };
  395. #endif
  396. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  397. static struct platform_device bfin_mac_device = {
  398. .name = "bfin_mac",
  399. };
  400. #endif
  401. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  402. static struct resource net2272_bfin_resources[] = {
  403. {
  404. .start = 0x20300000,
  405. .end = 0x20300000 + 0x100,
  406. .flags = IORESOURCE_MEM,
  407. }, {
  408. .start = IRQ_PF7,
  409. .end = IRQ_PF7,
  410. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  411. },
  412. };
  413. static struct platform_device net2272_bfin_device = {
  414. .name = "net2272",
  415. .id = -1,
  416. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  417. .resource = net2272_bfin_resources,
  418. };
  419. #endif
  420. #if defined(CONFIG_MTD_M25P80) \
  421. || defined(CONFIG_MTD_M25P80_MODULE)
  422. static struct mtd_partition bfin_spi_flash_partitions[] = {
  423. {
  424. .name = "bootloader(spi)",
  425. .size = 0x00040000,
  426. .offset = 0,
  427. .mask_flags = MTD_CAP_ROM
  428. }, {
  429. .name = "linux kernel(spi)",
  430. .size = MTDPART_SIZ_FULL,
  431. .offset = MTDPART_OFS_APPEND,
  432. }
  433. };
  434. static struct flash_platform_data bfin_spi_flash_data = {
  435. .name = "m25p80",
  436. .parts = bfin_spi_flash_partitions,
  437. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  438. .type = "m25p16",
  439. };
  440. /* SPI flash chip (m25p64) */
  441. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  442. .enable_dma = 0, /* use dma transfer with this chip*/
  443. .bits_per_word = 8,
  444. };
  445. #endif
  446. #if defined(CONFIG_SPI_ADC_BF533) \
  447. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  448. /* SPI ADC chip */
  449. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  450. .enable_dma = 1, /* use dma transfer with this chip*/
  451. .bits_per_word = 16,
  452. };
  453. #endif
  454. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  455. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  456. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  457. .enable_dma = 0,
  458. .bits_per_word = 16,
  459. };
  460. #endif
  461. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  462. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  463. .enable_dma = 0,
  464. .bits_per_word = 16,
  465. };
  466. #endif
  467. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  468. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  469. .enable_dma = 1,
  470. .bits_per_word = 8,
  471. };
  472. #endif
  473. #if defined(CONFIG_PBX)
  474. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  475. .ctl_reg = 0x4, /* send zero */
  476. .enable_dma = 0,
  477. .bits_per_word = 8,
  478. .cs_change_per_word = 1,
  479. };
  480. #endif
  481. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  482. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  483. .enable_dma = 0,
  484. .bits_per_word = 16,
  485. };
  486. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  487. .model = 7877,
  488. .vref_delay_usecs = 50, /* internal, no capacitor */
  489. .x_plate_ohms = 419,
  490. .y_plate_ohms = 486,
  491. .pressure_max = 1000,
  492. .pressure_min = 0,
  493. .stopacq_polarity = 1,
  494. .first_conversion_delay = 3,
  495. .acquisition_time = 1,
  496. .averaging = 1,
  497. .pen_down_acc_interval = 1,
  498. };
  499. #endif
  500. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  501. && defined(CONFIG_SND_SOC_WM8731_SPI)
  502. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  503. .enable_dma = 0,
  504. .bits_per_word = 16,
  505. };
  506. #endif
  507. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  508. static struct bfin5xx_spi_chip spidev_chip_info = {
  509. .enable_dma = 0,
  510. .bits_per_word = 8,
  511. };
  512. #endif
  513. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  514. #if defined(CONFIG_MTD_M25P80) \
  515. || defined(CONFIG_MTD_M25P80_MODULE)
  516. {
  517. /* the modalias must be the same as spi device driver name */
  518. .modalias = "m25p80", /* Name of spi_driver for this device */
  519. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  520. .bus_num = 0, /* Framework bus number */
  521. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  522. .platform_data = &bfin_spi_flash_data,
  523. .controller_data = &spi_flash_chip_info,
  524. .mode = SPI_MODE_3,
  525. },
  526. #endif
  527. #if defined(CONFIG_SPI_ADC_BF533) \
  528. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  529. {
  530. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  531. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  532. .bus_num = 0, /* Framework bus number */
  533. .chip_select = 1, /* Framework chip select. */
  534. .platform_data = NULL, /* No spi_driver specific config */
  535. .controller_data = &spi_adc_chip_info,
  536. },
  537. #endif
  538. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  539. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  540. {
  541. .modalias = "ad1836-spi",
  542. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  543. .bus_num = 0,
  544. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  545. .controller_data = &ad1836_spi_chip_info,
  546. },
  547. #endif
  548. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  549. {
  550. .modalias = "ad9960-spi",
  551. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  552. .bus_num = 0,
  553. .chip_select = 1,
  554. .controller_data = &ad9960_spi_chip_info,
  555. },
  556. #endif
  557. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  558. {
  559. .modalias = "spi_mmc_dummy",
  560. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  561. .bus_num = 0,
  562. .chip_select = 0,
  563. .platform_data = NULL,
  564. .controller_data = &spi_mmc_chip_info,
  565. .mode = SPI_MODE_3,
  566. },
  567. {
  568. .modalias = "spi_mmc",
  569. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  570. .bus_num = 0,
  571. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  572. .platform_data = NULL,
  573. .controller_data = &spi_mmc_chip_info,
  574. .mode = SPI_MODE_3,
  575. },
  576. #endif
  577. #if defined(CONFIG_PBX)
  578. {
  579. .modalias = "fxs-spi",
  580. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  581. .bus_num = 0,
  582. .chip_select = 8 - CONFIG_J11_JUMPER,
  583. .controller_data = &spi_si3xxx_chip_info,
  584. .mode = SPI_MODE_3,
  585. },
  586. {
  587. .modalias = "fxo-spi",
  588. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  589. .bus_num = 0,
  590. .chip_select = 8 - CONFIG_J19_JUMPER,
  591. .controller_data = &spi_si3xxx_chip_info,
  592. .mode = SPI_MODE_3,
  593. },
  594. #endif
  595. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  596. {
  597. .modalias = "ad7877",
  598. .platform_data = &bfin_ad7877_ts_info,
  599. .irq = IRQ_PF8,
  600. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  601. .bus_num = 0,
  602. .chip_select = 2,
  603. .controller_data = &spi_ad7877_chip_info,
  604. },
  605. #endif
  606. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  607. && defined(CONFIG_SND_SOC_WM8731_SPI)
  608. {
  609. .modalias = "wm8731",
  610. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  611. .bus_num = 0,
  612. .chip_select = 5,
  613. .controller_data = &spi_wm8731_chip_info,
  614. .mode = SPI_MODE_0,
  615. },
  616. #endif
  617. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  618. {
  619. .modalias = "spidev",
  620. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  621. .bus_num = 0,
  622. .chip_select = 1,
  623. .controller_data = &spidev_chip_info,
  624. },
  625. #endif
  626. };
  627. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  628. /* SPI controller data */
  629. static struct bfin5xx_spi_master bfin_spi0_info = {
  630. .num_chipselect = 8,
  631. .enable_dma = 1, /* master has the ability to do dma transfer */
  632. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  633. };
  634. /* SPI (0) */
  635. static struct resource bfin_spi0_resource[] = {
  636. [0] = {
  637. .start = SPI0_REGBASE,
  638. .end = SPI0_REGBASE + 0xFF,
  639. .flags = IORESOURCE_MEM,
  640. },
  641. [1] = {
  642. .start = CH_SPI,
  643. .end = CH_SPI,
  644. .flags = IORESOURCE_IRQ,
  645. },
  646. };
  647. static struct platform_device bfin_spi0_device = {
  648. .name = "bfin-spi",
  649. .id = 0, /* Bus number */
  650. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  651. .resource = bfin_spi0_resource,
  652. .dev = {
  653. .platform_data = &bfin_spi0_info, /* Passed to driver */
  654. },
  655. };
  656. #endif /* spi master and devices */
  657. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  658. static struct platform_device bfin_fb_device = {
  659. .name = "bf537-lq035",
  660. };
  661. #endif
  662. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  663. static struct platform_device bfin_fb_adv7393_device = {
  664. .name = "bfin-adv7393",
  665. };
  666. #endif
  667. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  668. static struct resource bfin_uart_resources[] = {
  669. #ifdef CONFIG_SERIAL_BFIN_UART0
  670. {
  671. .start = 0xFFC00400,
  672. .end = 0xFFC004FF,
  673. .flags = IORESOURCE_MEM,
  674. },
  675. #endif
  676. #ifdef CONFIG_SERIAL_BFIN_UART1
  677. {
  678. .start = 0xFFC02000,
  679. .end = 0xFFC020FF,
  680. .flags = IORESOURCE_MEM,
  681. },
  682. #endif
  683. };
  684. static struct platform_device bfin_uart_device = {
  685. .name = "bfin-uart",
  686. .id = 1,
  687. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  688. .resource = bfin_uart_resources,
  689. };
  690. #endif
  691. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  692. static struct resource bfin_sir_resources[] = {
  693. #ifdef CONFIG_BFIN_SIR0
  694. {
  695. .start = 0xFFC00400,
  696. .end = 0xFFC004FF,
  697. .flags = IORESOURCE_MEM,
  698. },
  699. #endif
  700. #ifdef CONFIG_BFIN_SIR1
  701. {
  702. .start = 0xFFC02000,
  703. .end = 0xFFC020FF,
  704. .flags = IORESOURCE_MEM,
  705. },
  706. #endif
  707. };
  708. static struct platform_device bfin_sir_device = {
  709. .name = "bfin_sir",
  710. .id = 0,
  711. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  712. .resource = bfin_sir_resources,
  713. };
  714. #endif
  715. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  716. static struct resource bfin_twi0_resource[] = {
  717. [0] = {
  718. .start = TWI0_REGBASE,
  719. .end = TWI0_REGBASE,
  720. .flags = IORESOURCE_MEM,
  721. },
  722. [1] = {
  723. .start = IRQ_TWI,
  724. .end = IRQ_TWI,
  725. .flags = IORESOURCE_IRQ,
  726. },
  727. };
  728. static struct platform_device i2c_bfin_twi_device = {
  729. .name = "i2c-bfin-twi",
  730. .id = 0,
  731. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  732. .resource = bfin_twi0_resource,
  733. };
  734. #endif
  735. #ifdef CONFIG_I2C_BOARDINFO
  736. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  737. #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
  738. {
  739. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  740. },
  741. #endif
  742. #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
  743. {
  744. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  745. .irq = IRQ_PF8,
  746. },
  747. #endif
  748. };
  749. #endif
  750. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  751. static struct platform_device bfin_sport0_uart_device = {
  752. .name = "bfin-sport-uart",
  753. .id = 0,
  754. };
  755. static struct platform_device bfin_sport1_uart_device = {
  756. .name = "bfin-sport-uart",
  757. .id = 1,
  758. };
  759. #endif
  760. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  761. #include <linux/input.h>
  762. #include <linux/gpio_keys.h>
  763. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  764. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  765. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  766. };
  767. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  768. .buttons = bfin_gpio_keys_table,
  769. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  770. };
  771. static struct platform_device bfin_device_gpiokeys = {
  772. .name = "gpio-keys",
  773. .dev = {
  774. .platform_data = &bfin_gpio_keys_data,
  775. },
  776. };
  777. #endif
  778. static struct resource bfin_gpios_resources = {
  779. .start = 0,
  780. .end = MAX_BLACKFIN_GPIOS - 1,
  781. .flags = IORESOURCE_IRQ,
  782. };
  783. static struct platform_device bfin_gpios_device = {
  784. .name = "simple-gpio",
  785. .id = -1,
  786. .num_resources = 1,
  787. .resource = &bfin_gpios_resources,
  788. };
  789. static const unsigned int cclk_vlev_datasheet[] =
  790. {
  791. VRPAIR(VLEV_100, 400000000),
  792. VRPAIR(VLEV_105, 426000000),
  793. VRPAIR(VLEV_110, 500000000),
  794. VRPAIR(VLEV_115, 533000000),
  795. VRPAIR(VLEV_120, 600000000),
  796. };
  797. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  798. .tuple_tab = cclk_vlev_datasheet,
  799. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  800. .vr_settling_time = 25 /* us */,
  801. };
  802. static struct platform_device bfin_dpmc = {
  803. .name = "bfin dpmc",
  804. .dev = {
  805. .platform_data = &bfin_dmpc_vreg_data,
  806. },
  807. };
  808. static struct platform_device *stamp_devices[] __initdata = {
  809. &bfin_dpmc,
  810. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  811. &bf5xx_nand_device,
  812. #endif
  813. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  814. &bfin_pcmcia_cf_device,
  815. #endif
  816. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  817. &rtc_device,
  818. #endif
  819. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  820. &sl811_hcd_device,
  821. #endif
  822. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  823. &isp1362_hcd_device,
  824. #endif
  825. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  826. &musb_device,
  827. #endif
  828. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  829. &smc91x_device,
  830. #endif
  831. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  832. &dm9000_device,
  833. #endif
  834. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  835. &bfin_mac_device,
  836. #endif
  837. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  838. &net2272_bfin_device,
  839. #endif
  840. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  841. &bfin_spi0_device,
  842. #endif
  843. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  844. &bfin_fb_device,
  845. #endif
  846. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  847. &bf52x_t350mcqb_device,
  848. #endif
  849. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  850. &bfin_fb_adv7393_device,
  851. #endif
  852. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  853. &bfin_uart_device,
  854. #endif
  855. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  856. &bfin_sir_device,
  857. #endif
  858. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  859. &i2c_bfin_twi_device,
  860. #endif
  861. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  862. &bfin_sport0_uart_device,
  863. &bfin_sport1_uart_device,
  864. #endif
  865. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  866. &bfin_device_gpiokeys,
  867. #endif
  868. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  869. &ezkit_flash_device,
  870. #endif
  871. &bfin_gpios_device,
  872. };
  873. static int __init stamp_init(void)
  874. {
  875. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  876. #ifdef CONFIG_I2C_BOARDINFO
  877. i2c_register_board_info(0, bfin_i2c_board_info,
  878. ARRAY_SIZE(bfin_i2c_board_info));
  879. #endif
  880. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  881. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  882. return 0;
  883. }
  884. arch_initcall(stamp_init);
  885. void native_machine_restart(char *cmd)
  886. {
  887. /* workaround reboot hang when booting from SPI */
  888. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  889. bfin_gpio_reset_spi0_ssel1();
  890. }
  891. void bfin_get_ether_addr(char *addr)
  892. {
  893. /* the MAC is stored in OTP memory page 0xDF */
  894. u32 ret;
  895. u64 otp_mac;
  896. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  897. ret = otp_read(0xDF, 0x00, &otp_mac);
  898. if (!(ret & 0x1)) {
  899. char *otp_mac_p = (char *)&otp_mac;
  900. for (ret = 0; ret < 6; ++ret)
  901. addr[ret] = otp_mac_p[5 - ret];
  902. }
  903. }
  904. EXPORT_SYMBOL(bfin_get_ether_addr);