io.h 7.5 KB

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  1. /*
  2. * $Id: io.h,v 1.30 2001/12/21 01:23:21 davem Exp $
  3. */
  4. #ifndef __SPARC_IO_H
  5. #define __SPARC_IO_H
  6. #include <linux/kernel.h>
  7. #include <linux/types.h>
  8. #include <linux/ioport.h> /* struct resource */
  9. #include <asm/page.h> /* IO address mapping routines need this */
  10. #include <asm/system.h>
  11. #define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT)
  12. static inline u32 flip_dword (u32 l)
  13. {
  14. return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
  15. }
  16. static inline u16 flip_word (u16 w)
  17. {
  18. return ((w&0xff) << 8) | ((w>>8)&0xff);
  19. }
  20. #define mmiowb()
  21. /*
  22. * Memory mapped I/O to PCI
  23. */
  24. static inline u8 __raw_readb(const volatile void __iomem *addr)
  25. {
  26. return *(__force volatile u8 *)addr;
  27. }
  28. static inline u16 __raw_readw(const volatile void __iomem *addr)
  29. {
  30. return *(__force volatile u16 *)addr;
  31. }
  32. static inline u32 __raw_readl(const volatile void __iomem *addr)
  33. {
  34. return *(__force volatile u32 *)addr;
  35. }
  36. static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
  37. {
  38. *(__force volatile u8 *)addr = b;
  39. }
  40. static inline void __raw_writew(u16 w, volatile void __iomem *addr)
  41. {
  42. *(__force volatile u16 *)addr = w;
  43. }
  44. static inline void __raw_writel(u32 l, volatile void __iomem *addr)
  45. {
  46. *(__force volatile u32 *)addr = l;
  47. }
  48. static inline u8 __readb(const volatile void __iomem *addr)
  49. {
  50. return *(__force volatile u8 *)addr;
  51. }
  52. static inline u16 __readw(const volatile void __iomem *addr)
  53. {
  54. return flip_word(*(__force volatile u16 *)addr);
  55. }
  56. static inline u32 __readl(const volatile void __iomem *addr)
  57. {
  58. return flip_dword(*(__force volatile u32 *)addr);
  59. }
  60. static inline void __writeb(u8 b, volatile void __iomem *addr)
  61. {
  62. *(__force volatile u8 *)addr = b;
  63. }
  64. static inline void __writew(u16 w, volatile void __iomem *addr)
  65. {
  66. *(__force volatile u16 *)addr = flip_word(w);
  67. }
  68. static inline void __writel(u32 l, volatile void __iomem *addr)
  69. {
  70. *(__force volatile u32 *)addr = flip_dword(l);
  71. }
  72. #define readb(__addr) __readb(__addr)
  73. #define readw(__addr) __readw(__addr)
  74. #define readl(__addr) __readl(__addr)
  75. #define readb_relaxed(__addr) readb(__addr)
  76. #define readw_relaxed(__addr) readw(__addr)
  77. #define readl_relaxed(__addr) readl(__addr)
  78. #define writeb(__b, __addr) __writeb((__b),(__addr))
  79. #define writew(__w, __addr) __writew((__w),(__addr))
  80. #define writel(__l, __addr) __writel((__l),(__addr))
  81. /*
  82. * I/O space operations
  83. *
  84. * Arrangement on a Sun is somewhat complicated.
  85. *
  86. * First of all, we want to use standard Linux drivers
  87. * for keyboard, PC serial, etc. These drivers think
  88. * they access I/O space and use inb/outb.
  89. * On the other hand, EBus bridge accepts PCI *memory*
  90. * cycles and converts them into ISA *I/O* cycles.
  91. * Ergo, we want inb & outb to generate PCI memory cycles.
  92. *
  93. * If we want to issue PCI *I/O* cycles, we do this
  94. * with a low 64K fixed window in PCIC. This window gets
  95. * mapped somewhere into virtual kernel space and we
  96. * can use inb/outb again.
  97. */
  98. #define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr))
  99. #define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr))
  100. #define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr))
  101. #define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr))
  102. #define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr))
  103. #define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr))
  104. #define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr))
  105. #define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr))
  106. #define inb_p(__addr) inb(__addr)
  107. #define outb_p(__b, __addr) outb(__b, __addr)
  108. #define inw_p(__addr) inw(__addr)
  109. #define outw_p(__w, __addr) outw(__w, __addr)
  110. #define inl_p(__addr) inl(__addr)
  111. #define outl_p(__l, __addr) outl(__l, __addr)
  112. void outsb(unsigned long addr, const void *src, unsigned long cnt);
  113. void outsw(unsigned long addr, const void *src, unsigned long cnt);
  114. void outsl(unsigned long addr, const void *src, unsigned long cnt);
  115. void insb(unsigned long addr, void *dst, unsigned long count);
  116. void insw(unsigned long addr, void *dst, unsigned long count);
  117. void insl(unsigned long addr, void *dst, unsigned long count);
  118. #define IO_SPACE_LIMIT 0xffffffff
  119. /*
  120. * SBus accessors.
  121. *
  122. * SBus has only one, memory mapped, I/O space.
  123. * We do not need to flip bytes for SBus of course.
  124. */
  125. static inline u8 _sbus_readb(const volatile void __iomem *addr)
  126. {
  127. return *(__force volatile u8 *)addr;
  128. }
  129. static inline u16 _sbus_readw(const volatile void __iomem *addr)
  130. {
  131. return *(__force volatile u16 *)addr;
  132. }
  133. static inline u32 _sbus_readl(const volatile void __iomem *addr)
  134. {
  135. return *(__force volatile u32 *)addr;
  136. }
  137. static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
  138. {
  139. *(__force volatile u8 *)addr = b;
  140. }
  141. static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
  142. {
  143. *(__force volatile u16 *)addr = w;
  144. }
  145. static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
  146. {
  147. *(__force volatile u32 *)addr = l;
  148. }
  149. /*
  150. * The only reason for #define's is to hide casts to unsigned long.
  151. */
  152. #define sbus_readb(__addr) _sbus_readb(__addr)
  153. #define sbus_readw(__addr) _sbus_readw(__addr)
  154. #define sbus_readl(__addr) _sbus_readl(__addr)
  155. #define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr)
  156. #define sbus_writew(__w, __addr) _sbus_writew(__w, __addr)
  157. #define sbus_writel(__l, __addr) _sbus_writel(__l, __addr)
  158. static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n)
  159. {
  160. while(n--) {
  161. sbus_writeb(c, __dst);
  162. __dst++;
  163. }
  164. }
  165. static inline void
  166. _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
  167. {
  168. volatile void __iomem *d = dst;
  169. while (n--) {
  170. writeb(c, d);
  171. d++;
  172. }
  173. }
  174. #define memset_io(d,c,sz) _memset_io(d,c,sz)
  175. static inline void
  176. _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
  177. {
  178. char *d = dst;
  179. while (n--) {
  180. char tmp = readb(src);
  181. *d++ = tmp;
  182. src++;
  183. }
  184. }
  185. #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
  186. static inline void
  187. _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
  188. {
  189. const char *s = src;
  190. volatile void __iomem *d = dst;
  191. while (n--) {
  192. char tmp = *s++;
  193. writeb(tmp, d);
  194. d++;
  195. }
  196. }
  197. #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
  198. #ifdef __KERNEL__
  199. /*
  200. * Bus number may be embedded in the higher bits of the physical address.
  201. * This is why we have no bus number argument to ioremap().
  202. */
  203. extern void __iomem *ioremap(unsigned long offset, unsigned long size);
  204. #define ioremap_nocache(X,Y) ioremap((X),(Y))
  205. extern void iounmap(volatile void __iomem *addr);
  206. /*
  207. * Bus number may be in res->flags... somewhere.
  208. */
  209. extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset,
  210. unsigned long size, char *name);
  211. extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size);
  212. /*
  213. * At the moment, we do not use CMOS_READ anywhere outside of rtc.c,
  214. * so rtc_port is static in it. This should not change unless a new
  215. * hardware pops up.
  216. */
  217. #define RTC_PORT(x) (rtc_port + (x))
  218. #define RTC_ALWAYS_BCD 0
  219. /* Nothing to do */
  220. /* P3: Only IDE DMA may need these. XXX Verify that it still does... */
  221. #define dma_cache_inv(_start,_size) do { } while (0)
  222. #define dma_cache_wback(_start,_size) do { } while (0)
  223. #define dma_cache_wback_inv(_start,_size) do { } while (0)
  224. #endif
  225. #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
  226. /*
  227. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  228. * access
  229. */
  230. #define xlate_dev_mem_ptr(p) __va(p)
  231. /*
  232. * Convert a virtual cached pointer to an uncached pointer
  233. */
  234. #define xlate_dev_kmem_ptr(p) p
  235. #endif /* !(__SPARC_IO_H) */