processor.h 6.2 KB

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  1. /*
  2. * include/asm-sh/processor.h
  3. *
  4. * Copyright (C) 1999, 2000 Niibe Yutaka
  5. * Copyright (C) 2002, 2003 Paul Mundt
  6. */
  7. #ifndef __ASM_SH_PROCESSOR_H
  8. #define __ASM_SH_PROCESSOR_H
  9. #ifdef __KERNEL__
  10. #include <asm/page.h>
  11. #include <asm/types.h>
  12. #include <asm/cache.h>
  13. #include <asm/ptrace.h>
  14. /*
  15. * Default implementation of macro that returns current
  16. * instruction pointer ("program counter").
  17. */
  18. #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
  19. /* Core Processor Version Register */
  20. #define CCN_PVR 0xff000030
  21. #define CCN_CVR 0xff000040
  22. #define CCN_PRR 0xff000044
  23. /*
  24. * CPU type and hardware bug flags. Kept separately for each CPU.
  25. *
  26. * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
  27. * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
  28. * for parsing the subtype in get_cpu_subtype().
  29. */
  30. enum cpu_type {
  31. /* SH-2 types */
  32. CPU_SH7604,
  33. /* SH-3 types */
  34. CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
  35. CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
  36. /* SH-4 types */
  37. CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
  38. CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
  39. CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,
  40. /* Unknown subtype */
  41. CPU_SH_NONE
  42. };
  43. struct sh_cpuinfo {
  44. enum cpu_type type;
  45. unsigned long loops_per_jiffy;
  46. struct cache_info icache;
  47. struct cache_info dcache;
  48. unsigned long flags;
  49. };
  50. extern struct sh_cpuinfo boot_cpu_data;
  51. #ifdef CONFIG_SMP
  52. extern struct sh_cpuinfo cpu_data[];
  53. #define current_cpu_data cpu_data[smp_processor_id()]
  54. #else
  55. #define cpu_data (&boot_cpu_data)
  56. #define current_cpu_data boot_cpu_data
  57. #endif
  58. /*
  59. * User space process size: 2GB.
  60. *
  61. * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
  62. */
  63. #define TASK_SIZE 0x7c000000UL
  64. /* This decides where the kernel will search for a free chunk of vm
  65. * space during mmap's.
  66. */
  67. #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
  68. /*
  69. * Bit of SR register
  70. *
  71. * FD-bit:
  72. * When it's set, it means the processor doesn't have right to use FPU,
  73. * and it results exception when the floating operation is executed.
  74. *
  75. * IMASK-bit:
  76. * Interrupt level mask
  77. */
  78. #define SR_FD 0x00008000
  79. #define SR_DSP 0x00001000
  80. #define SR_IMASK 0x000000f0
  81. /*
  82. * FPU structure and data
  83. */
  84. struct sh_fpu_hard_struct {
  85. unsigned long fp_regs[16];
  86. unsigned long xfp_regs[16];
  87. unsigned long fpscr;
  88. unsigned long fpul;
  89. long status; /* software status information */
  90. };
  91. /* Dummy fpu emulator */
  92. struct sh_fpu_soft_struct {
  93. unsigned long fp_regs[16];
  94. unsigned long xfp_regs[16];
  95. unsigned long fpscr;
  96. unsigned long fpul;
  97. unsigned char lookahead;
  98. unsigned long entry_pc;
  99. };
  100. union sh_fpu_union {
  101. struct sh_fpu_hard_struct hard;
  102. struct sh_fpu_soft_struct soft;
  103. };
  104. /*
  105. * Processor flags
  106. */
  107. #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
  108. #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
  109. #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
  110. #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
  111. #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
  112. #define CPU_HAS_PTEA 0x0020 /* PTEA register */
  113. struct thread_struct {
  114. unsigned long sp;
  115. unsigned long pc;
  116. unsigned long trap_no, error_code;
  117. unsigned long address;
  118. /* Hardware debugging registers may come here */
  119. unsigned long ubc_pc;
  120. /* floating point info */
  121. union sh_fpu_union fpu;
  122. };
  123. /* Count of active tasks with UBC settings */
  124. extern int ubc_usercnt;
  125. #define INIT_THREAD { \
  126. sizeof(init_stack) + (long) &init_stack, /* sp */ \
  127. 0, /* pc */ \
  128. 0, 0, \
  129. 0, \
  130. 0, \
  131. {{{0,}},} /* fpu state */ \
  132. }
  133. /*
  134. * Do necessary setup to start up a newly executed thread.
  135. */
  136. #define start_thread(regs, new_pc, new_sp) \
  137. set_fs(USER_DS); \
  138. regs->pr = 0; \
  139. regs->sr = SR_FD; /* User mode. */ \
  140. regs->pc = new_pc; \
  141. regs->regs[15] = new_sp
  142. /* Forward declaration, a strange C thing */
  143. struct task_struct;
  144. struct mm_struct;
  145. /* Free all resources held by a thread. */
  146. extern void release_thread(struct task_struct *);
  147. /* Prepare to copy thread state - unlazy all lazy status */
  148. #define prepare_to_copy(tsk) do { } while (0)
  149. /*
  150. * create a kernel thread without removing it from tasklists
  151. */
  152. extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
  153. /* Copy and release all segment info associated with a VM */
  154. #define copy_segments(p, mm) do { } while(0)
  155. #define release_segments(mm) do { } while(0)
  156. /*
  157. * FPU lazy state save handling.
  158. */
  159. static __inline__ void disable_fpu(void)
  160. {
  161. unsigned long __dummy;
  162. /* Set FD flag in SR */
  163. __asm__ __volatile__("stc sr, %0\n\t"
  164. "or %1, %0\n\t"
  165. "ldc %0, sr"
  166. : "=&r" (__dummy)
  167. : "r" (SR_FD));
  168. }
  169. static __inline__ void enable_fpu(void)
  170. {
  171. unsigned long __dummy;
  172. /* Clear out FD flag in SR */
  173. __asm__ __volatile__("stc sr, %0\n\t"
  174. "and %1, %0\n\t"
  175. "ldc %0, sr"
  176. : "=&r" (__dummy)
  177. : "r" (~SR_FD));
  178. }
  179. static __inline__ void release_fpu(struct pt_regs *regs)
  180. {
  181. regs->sr |= SR_FD;
  182. }
  183. static __inline__ void grab_fpu(struct pt_regs *regs)
  184. {
  185. regs->sr &= ~SR_FD;
  186. }
  187. #ifdef CONFIG_CPU_SH4
  188. extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
  189. #else
  190. #define save_fpu(tsk) do { } while (0)
  191. #endif
  192. #define unlazy_fpu(tsk, regs) do { \
  193. if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
  194. save_fpu(tsk, regs); \
  195. } \
  196. } while (0)
  197. #define clear_fpu(tsk, regs) do { \
  198. if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
  199. clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
  200. release_fpu(regs); \
  201. } \
  202. } while (0)
  203. /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
  204. #define FPSCR_INIT 0x00080000
  205. #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
  206. #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
  207. /*
  208. * Return saved PC of a blocked thread.
  209. */
  210. #define thread_saved_pc(tsk) (tsk->thread.pc)
  211. extern unsigned long get_wchan(struct task_struct *p);
  212. #define KSTK_EIP(tsk) ((tsk)->thread.pc)
  213. #define KSTK_ESP(tsk) ((tsk)->thread.sp)
  214. #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
  215. #define cpu_relax() do { } while (0)
  216. #endif /* __KERNEL__ */
  217. #endif /* __ASM_SH_PROCESSOR_H */