dma.h 755 B

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  1. #ifndef __ASM_CPU_SH3_DMA_H
  2. #define __ASM_CPU_SH3_DMA_H
  3. #define SH_DMAC_BASE 0xa4000020
  4. /* Definitions for the SuperH DMAC */
  5. #define TM_BURST 0x00000020
  6. #define TS_8 0x00000000
  7. #define TS_16 0x00000008
  8. #define TS_32 0x00000010
  9. #define TS_128 0x00000018
  10. #define CHCR_TS_MASK 0x18
  11. #define CHCR_TS_SHIFT 3
  12. #define DMAOR_INIT DMAOR_DME
  13. /*
  14. * The SuperH DMAC supports a number of transmit sizes, we list them here,
  15. * with their respective values as they appear in the CHCR registers.
  16. */
  17. enum {
  18. XMIT_SZ_8BIT,
  19. XMIT_SZ_16BIT,
  20. XMIT_SZ_32BIT,
  21. XMIT_SZ_128BIT,
  22. };
  23. static unsigned int ts_shift[] __attribute__ ((used)) = {
  24. [XMIT_SZ_8BIT] = 0,
  25. [XMIT_SZ_16BIT] = 1,
  26. [XMIT_SZ_32BIT] = 2,
  27. [XMIT_SZ_128BIT] = 4,
  28. };
  29. #endif /* __ASM_CPU_SH3_DMA_H */