io.h 14 KB

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  1. #ifndef _ASM_POWERPC_IO_H
  2. #define _ASM_POWERPC_IO_H
  3. #ifdef __KERNEL__
  4. /*
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version
  8. * 2 of the License, or (at your option) any later version.
  9. */
  10. #ifndef CONFIG_PPC64
  11. #include <asm-ppc/io.h>
  12. #else
  13. #include <linux/compiler.h>
  14. #include <asm/page.h>
  15. #include <asm/byteorder.h>
  16. #ifdef CONFIG_PPC_ISERIES
  17. #include <asm/iseries/iseries_io.h>
  18. #endif
  19. #include <asm/synch.h>
  20. #include <asm/delay.h>
  21. #include <asm-generic/iomap.h>
  22. #define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c))
  23. #define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c))
  24. #define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c))
  25. #define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c))
  26. #define SIO_CONFIG_RA 0x398
  27. #define SIO_CONFIG_RD 0x399
  28. #define SLOW_DOWN_IO
  29. extern unsigned long isa_io_base;
  30. extern unsigned long pci_io_base;
  31. extern unsigned long io_page_mask;
  32. #define MAX_ISA_PORT 0x10000
  33. #define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) \
  34. & io_page_mask)
  35. #ifdef CONFIG_PPC_ISERIES
  36. /* __raw_* accessors aren't supported on iSeries */
  37. #define __raw_readb(addr) { BUG(); 0; }
  38. #define __raw_readw(addr) { BUG(); 0; }
  39. #define __raw_readl(addr) { BUG(); 0; }
  40. #define __raw_readq(addr) { BUG(); 0; }
  41. #define __raw_writeb(v, addr) { BUG(); 0; }
  42. #define __raw_writew(v, addr) { BUG(); 0; }
  43. #define __raw_writel(v, addr) { BUG(); 0; }
  44. #define __raw_writeq(v, addr) { BUG(); 0; }
  45. #define readb(addr) iSeries_Read_Byte(addr)
  46. #define readw(addr) iSeries_Read_Word(addr)
  47. #define readl(addr) iSeries_Read_Long(addr)
  48. #define writeb(data, addr) iSeries_Write_Byte((data),(addr))
  49. #define writew(data, addr) iSeries_Write_Word((data),(addr))
  50. #define writel(data, addr) iSeries_Write_Long((data),(addr))
  51. #define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
  52. #define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
  53. #define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
  54. #define inb(addr) readb(((void __iomem *)(long)(addr)))
  55. #define inw(addr) readw(((void __iomem *)(long)(addr)))
  56. #define inl(addr) readl(((void __iomem *)(long)(addr)))
  57. #define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
  58. #define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
  59. #define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
  60. /*
  61. * The *_ns versions below don't do byte-swapping.
  62. * Neither do the standard versions now, these are just here
  63. * for older code.
  64. */
  65. #define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
  66. #define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
  67. #else
  68. static inline unsigned char __raw_readb(const volatile void __iomem *addr)
  69. {
  70. return *(volatile unsigned char __force *)addr;
  71. }
  72. static inline unsigned short __raw_readw(const volatile void __iomem *addr)
  73. {
  74. return *(volatile unsigned short __force *)addr;
  75. }
  76. static inline unsigned int __raw_readl(const volatile void __iomem *addr)
  77. {
  78. return *(volatile unsigned int __force *)addr;
  79. }
  80. static inline unsigned long __raw_readq(const volatile void __iomem *addr)
  81. {
  82. return *(volatile unsigned long __force *)addr;
  83. }
  84. static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
  85. {
  86. *(volatile unsigned char __force *)addr = v;
  87. }
  88. static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
  89. {
  90. *(volatile unsigned short __force *)addr = v;
  91. }
  92. static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
  93. {
  94. *(volatile unsigned int __force *)addr = v;
  95. }
  96. static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
  97. {
  98. *(volatile unsigned long __force *)addr = v;
  99. }
  100. #define readb(addr) eeh_readb(addr)
  101. #define readw(addr) eeh_readw(addr)
  102. #define readl(addr) eeh_readl(addr)
  103. #define readq(addr) eeh_readq(addr)
  104. #define writeb(data, addr) eeh_writeb((data), (addr))
  105. #define writew(data, addr) eeh_writew((data), (addr))
  106. #define writel(data, addr) eeh_writel((data), (addr))
  107. #define writeq(data, addr) eeh_writeq((data), (addr))
  108. #define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
  109. #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
  110. #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
  111. #define inb(port) eeh_inb((unsigned long)port)
  112. #define outb(val, port) eeh_outb(val, (unsigned long)port)
  113. #define inw(port) eeh_inw((unsigned long)port)
  114. #define outw(val, port) eeh_outw(val, (unsigned long)port)
  115. #define inl(port) eeh_inl((unsigned long)port)
  116. #define outl(val, port) eeh_outl(val, (unsigned long)port)
  117. /*
  118. * The insw/outsw/insl/outsl macros don't do byte-swapping.
  119. * They are only used in practice for transferring buffers which
  120. * are arrays of bytes, and byte-swapping is not appropriate in
  121. * that case. - paulus */
  122. #define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
  123. #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
  124. #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
  125. #define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
  126. #define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
  127. #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
  128. #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
  129. #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
  130. #endif
  131. #define readb_relaxed(addr) readb(addr)
  132. #define readw_relaxed(addr) readw(addr)
  133. #define readl_relaxed(addr) readl(addr)
  134. #define readq_relaxed(addr) readq(addr)
  135. extern void _insb(volatile u8 __iomem *port, void *buf, int ns);
  136. extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns);
  137. extern void _insw(volatile u16 __iomem *port, void *buf, int ns);
  138. extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns);
  139. extern void _insl(volatile u32 __iomem *port, void *buf, int nl);
  140. extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl);
  141. extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns);
  142. extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns);
  143. extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl);
  144. extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
  145. #define mmiowb()
  146. /*
  147. * output pause versions need a delay at least for the
  148. * w83c105 ide controller in a p610.
  149. */
  150. #define inb_p(port) inb(port)
  151. #define outb_p(val, port) (udelay(1), outb((val), (port)))
  152. #define inw_p(port) inw(port)
  153. #define outw_p(val, port) (udelay(1), outw((val), (port)))
  154. #define inl_p(port) inl(port)
  155. #define outl_p(val, port) (udelay(1), outl((val), (port)))
  156. /*
  157. * The *_ns versions below don't do byte-swapping.
  158. * Neither do the standard versions now, these are just here
  159. * for older code.
  160. */
  161. #define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
  162. #define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
  163. #define IO_SPACE_LIMIT ~(0UL)
  164. extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
  165. unsigned long size, unsigned long flags);
  166. extern void __iomem *__ioremap(unsigned long address, unsigned long size,
  167. unsigned long flags);
  168. /**
  169. * ioremap - map bus memory into CPU space
  170. * @address: bus address of the memory
  171. * @size: size of the resource to map
  172. *
  173. * ioremap performs a platform specific sequence of operations to
  174. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  175. * writew/writel functions and the other mmio helpers. The returned
  176. * address is not guaranteed to be usable directly as a virtual
  177. * address.
  178. */
  179. extern void __iomem *ioremap(unsigned long address, unsigned long size);
  180. #define ioremap_nocache(addr, size) ioremap((addr), (size))
  181. extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
  182. extern void iounmap(volatile void __iomem *addr);
  183. extern void __iomem * reserve_phb_iospace(unsigned long size);
  184. /**
  185. * virt_to_phys - map virtual addresses to physical
  186. * @address: address to remap
  187. *
  188. * The returned physical address is the physical (CPU) mapping for
  189. * the memory address given. It is only valid to use this function on
  190. * addresses directly mapped or allocated via kmalloc.
  191. *
  192. * This function does not give bus mappings for DMA transfers. In
  193. * almost all conceivable cases a device driver should not be using
  194. * this function
  195. */
  196. static inline unsigned long virt_to_phys(volatile void * address)
  197. {
  198. return __pa((unsigned long)address);
  199. }
  200. /**
  201. * phys_to_virt - map physical address to virtual
  202. * @address: address to remap
  203. *
  204. * The returned virtual address is a current CPU mapping for
  205. * the memory address given. It is only valid to use this function on
  206. * addresses that have a kernel mapping
  207. *
  208. * This function does not handle bus mappings for DMA transfers. In
  209. * almost all conceivable cases a device driver should not be using
  210. * this function
  211. */
  212. static inline void * phys_to_virt(unsigned long address)
  213. {
  214. return (void *)__va(address);
  215. }
  216. /*
  217. * Change "struct page" to physical address.
  218. */
  219. #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
  220. /* We do NOT want virtual merging, it would put too much pressure on
  221. * our iommu allocator. Instead, we want drivers to be smart enough
  222. * to coalesce sglists that happen to have been mapped in a contiguous
  223. * way by the iommu
  224. */
  225. #define BIO_VMERGE_BOUNDARY 0
  226. static inline void iosync(void)
  227. {
  228. __asm__ __volatile__ ("sync" : : : "memory");
  229. }
  230. /* Enforce in-order execution of data I/O.
  231. * No distinction between read/write on PPC; use eieio for all three.
  232. */
  233. #define iobarrier_rw() eieio()
  234. #define iobarrier_r() eieio()
  235. #define iobarrier_w() eieio()
  236. /*
  237. * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
  238. * These routines do not perform EEH-related I/O address translation,
  239. * and should not be used directly by device drivers. Use inb/readb
  240. * instead.
  241. */
  242. static inline int in_8(const volatile unsigned char __iomem *addr)
  243. {
  244. int ret;
  245. __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
  246. : "=r" (ret) : "m" (*addr));
  247. return ret;
  248. }
  249. static inline void out_8(volatile unsigned char __iomem *addr, int val)
  250. {
  251. __asm__ __volatile__("stb%U0%X0 %1,%0; sync"
  252. : "=m" (*addr) : "r" (val));
  253. }
  254. static inline int in_le16(const volatile unsigned short __iomem *addr)
  255. {
  256. int ret;
  257. __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
  258. : "=r" (ret) : "r" (addr), "m" (*addr));
  259. return ret;
  260. }
  261. static inline int in_be16(const volatile unsigned short __iomem *addr)
  262. {
  263. int ret;
  264. __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
  265. : "=r" (ret) : "m" (*addr));
  266. return ret;
  267. }
  268. static inline void out_le16(volatile unsigned short __iomem *addr, int val)
  269. {
  270. __asm__ __volatile__("sthbrx %1,0,%2; sync"
  271. : "=m" (*addr) : "r" (val), "r" (addr));
  272. }
  273. static inline void out_be16(volatile unsigned short __iomem *addr, int val)
  274. {
  275. __asm__ __volatile__("sth%U0%X0 %1,%0; sync"
  276. : "=m" (*addr) : "r" (val));
  277. }
  278. static inline unsigned in_le32(const volatile unsigned __iomem *addr)
  279. {
  280. unsigned ret;
  281. __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
  282. : "=r" (ret) : "r" (addr), "m" (*addr));
  283. return ret;
  284. }
  285. static inline unsigned in_be32(const volatile unsigned __iomem *addr)
  286. {
  287. unsigned ret;
  288. __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
  289. : "=r" (ret) : "m" (*addr));
  290. return ret;
  291. }
  292. static inline void out_le32(volatile unsigned __iomem *addr, int val)
  293. {
  294. __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
  295. : "r" (val), "r" (addr));
  296. }
  297. static inline void out_be32(volatile unsigned __iomem *addr, int val)
  298. {
  299. __asm__ __volatile__("stw%U0%X0 %1,%0; sync"
  300. : "=m" (*addr) : "r" (val));
  301. }
  302. static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
  303. {
  304. unsigned long tmp, ret;
  305. __asm__ __volatile__(
  306. "ld %1,0(%2)\n"
  307. "twi 0,%1,0\n"
  308. "isync\n"
  309. "rldimi %0,%1,5*8,1*8\n"
  310. "rldimi %0,%1,3*8,2*8\n"
  311. "rldimi %0,%1,1*8,3*8\n"
  312. "rldimi %0,%1,7*8,4*8\n"
  313. "rldicl %1,%1,32,0\n"
  314. "rlwimi %0,%1,8,8,31\n"
  315. "rlwimi %0,%1,24,16,23\n"
  316. : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
  317. return ret;
  318. }
  319. static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
  320. {
  321. unsigned long ret;
  322. __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync"
  323. : "=r" (ret) : "m" (*addr));
  324. return ret;
  325. }
  326. static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val)
  327. {
  328. unsigned long tmp;
  329. __asm__ __volatile__(
  330. "rldimi %0,%1,5*8,1*8\n"
  331. "rldimi %0,%1,3*8,2*8\n"
  332. "rldimi %0,%1,1*8,3*8\n"
  333. "rldimi %0,%1,7*8,4*8\n"
  334. "rldicl %1,%1,32,0\n"
  335. "rlwimi %0,%1,8,8,31\n"
  336. "rlwimi %0,%1,24,16,23\n"
  337. "std %0,0(%3)\n"
  338. "sync"
  339. : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
  340. }
  341. static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val)
  342. {
  343. __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
  344. }
  345. #ifndef CONFIG_PPC_ISERIES
  346. #include <asm/eeh.h>
  347. #endif
  348. /**
  349. * check_signature - find BIOS signatures
  350. * @io_addr: mmio address to check
  351. * @signature: signature block
  352. * @length: length of signature
  353. *
  354. * Perform a signature comparison with the mmio address io_addr. This
  355. * address should have been obtained by ioremap.
  356. * Returns 1 on a match.
  357. */
  358. static inline int check_signature(const volatile void __iomem * io_addr,
  359. const unsigned char *signature, int length)
  360. {
  361. int retval = 0;
  362. #ifndef CONFIG_PPC_ISERIES
  363. do {
  364. if (readb(io_addr) != *signature)
  365. goto out;
  366. io_addr++;
  367. signature++;
  368. length--;
  369. } while (length);
  370. retval = 1;
  371. out:
  372. #endif
  373. return retval;
  374. }
  375. /* Nothing to do */
  376. #define dma_cache_inv(_start,_size) do { } while (0)
  377. #define dma_cache_wback(_start,_size) do { } while (0)
  378. #define dma_cache_wback_inv(_start,_size) do { } while (0)
  379. /* Check of existence of legacy devices */
  380. extern int check_legacy_ioport(unsigned long base_port);
  381. /*
  382. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  383. * access
  384. */
  385. #define xlate_dev_mem_ptr(p) __va(p)
  386. /*
  387. * Convert a virtual cached pointer to an uncached pointer
  388. */
  389. #define xlate_dev_kmem_ptr(p) p
  390. #endif /* __KERNEL__ */
  391. #endif /* CONFIG_PPC64 */
  392. #endif /* _ASM_POWERPC_IO_H */