ide.h 4.1 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994-1996 Linus Torvalds & authors
  7. *
  8. * Copied from i386; many of the especially older MIPS or ISA-based platforms
  9. * are basically identical. Using this file probably implies i8259 PIC
  10. * support in a system but the very least interrupt numbers 0 - 15 need to
  11. * be put aside for legacy devices.
  12. */
  13. #ifndef __ASM_MACH_GENERIC_IDE_H
  14. #define __ASM_MACH_GENERIC_IDE_H
  15. #ifdef __KERNEL__
  16. #include <linux/config.h>
  17. #include <linux/pci.h>
  18. #include <linux/stddef.h>
  19. #include <asm/processor.h>
  20. #ifndef MAX_HWIFS
  21. # ifdef CONFIG_BLK_DEV_IDEPCI
  22. #define MAX_HWIFS 10
  23. # else
  24. #define MAX_HWIFS 6
  25. # endif
  26. #endif
  27. #define IDE_ARCH_OBSOLETE_DEFAULTS
  28. static __inline__ int ide_probe_legacy(void)
  29. {
  30. #ifdef CONFIG_PCI
  31. struct pci_dev *dev;
  32. if ((dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL)) != NULL ||
  33. (dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL)) != NULL) {
  34. pci_dev_put(dev);
  35. return 1;
  36. }
  37. return 0;
  38. #elif defined(CONFIG_EISA) || defined(CONFIG_ISA)
  39. return 1;
  40. #else
  41. return 0;
  42. #endif
  43. }
  44. static __inline__ int ide_default_irq(unsigned long base)
  45. {
  46. if (ide_probe_legacy())
  47. switch (base) {
  48. case 0x1f0:
  49. return 14;
  50. case 0x170:
  51. return 15;
  52. case 0x1e8:
  53. return 11;
  54. case 0x168:
  55. return 10;
  56. case 0x1e0:
  57. return 8;
  58. case 0x160:
  59. return 12;
  60. default:
  61. return 0;
  62. }
  63. else
  64. return 0;
  65. }
  66. static __inline__ unsigned long ide_default_io_base(int index)
  67. {
  68. if (ide_probe_legacy())
  69. switch (index) {
  70. case 0:
  71. return 0x1f0;
  72. case 1:
  73. return 0x170;
  74. case 2:
  75. return 0x1e8;
  76. case 3:
  77. return 0x168;
  78. case 4:
  79. return 0x1e0;
  80. case 5:
  81. return 0x160;
  82. default:
  83. return 0;
  84. }
  85. else
  86. return 0;
  87. }
  88. #define IDE_ARCH_OBSOLETE_INIT
  89. #define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */
  90. #ifdef CONFIG_BLK_DEV_IDEPCI
  91. #define ide_init_default_irq(base) (0)
  92. #else
  93. #define ide_init_default_irq(base) ide_default_irq(base)
  94. #endif
  95. /* MIPS port and memory-mapped I/O string operations. */
  96. static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
  97. {
  98. if (cpu_has_dc_aliases) {
  99. unsigned long end = addr + size;
  100. for (; addr < end; addr += PAGE_SIZE)
  101. flush_dcache_page(virt_to_page(addr));
  102. }
  103. }
  104. static inline void __ide_insw(unsigned long port, void *addr,
  105. unsigned int count)
  106. {
  107. insw(port, addr, count);
  108. __ide_flush_dcache_range((unsigned long)addr, count * 2);
  109. }
  110. static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
  111. {
  112. insl(port, addr, count);
  113. __ide_flush_dcache_range((unsigned long)addr, count * 4);
  114. }
  115. static inline void __ide_outsw(unsigned long port, const void *addr,
  116. unsigned long count)
  117. {
  118. outsw(port, addr, count);
  119. __ide_flush_dcache_range((unsigned long)addr, count * 2);
  120. }
  121. static inline void __ide_outsl(unsigned long port, const void *addr,
  122. unsigned long count)
  123. {
  124. outsl(port, addr, count);
  125. __ide_flush_dcache_range((unsigned long)addr, count * 4);
  126. }
  127. static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
  128. {
  129. readsw(port, addr, count);
  130. __ide_flush_dcache_range((unsigned long)addr, count * 2);
  131. }
  132. static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
  133. {
  134. readsl(port, addr, count);
  135. __ide_flush_dcache_range((unsigned long)addr, count * 4);
  136. }
  137. static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
  138. {
  139. writesw(port, addr, count);
  140. __ide_flush_dcache_range((unsigned long)addr, count * 2);
  141. }
  142. static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
  143. {
  144. writesl(port, addr, count);
  145. __ide_flush_dcache_range((unsigned long)addr, count * 4);
  146. }
  147. /* ide_insw calls insw, not __ide_insw. Why? */
  148. #undef insw
  149. #undef insl
  150. #undef outsw
  151. #undef outsl
  152. #define insw(port, addr, count) __ide_insw(port, addr, count)
  153. #define insl(port, addr, count) __ide_insl(port, addr, count)
  154. #define outsw(port, addr, count) __ide_outsw(port, addr, count)
  155. #define outsl(port, addr, count) __ide_outsl(port, addr, count)
  156. #endif /* __KERNEL__ */
  157. #endif /* __ASM_MACH_GENERIC_IDE_H */