w83792d.c 50 KB

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  1. /*
  2. w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (C) 2004, 2005 Winbond Electronics Corp.
  5. Chunhao Huang <DZShen@Winbond.com.tw>,
  6. Rudolf Marek <r.marek@sh.cvut.cz>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. Note:
  19. 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
  20. 2. This driver is only for Winbond W83792D C version device, there
  21. are also some motherboards with B version W83792D device. The
  22. calculation method to in6-in7(measured value, limits) is a little
  23. different between C and B version. C or B version can be identified
  24. by CR[0x49h].
  25. */
  26. /*
  27. Supports following chips:
  28. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  29. w83792d 9 7 7 3 0x7a 0x5ca3 yes no
  30. */
  31. #include <linux/config.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/slab.h>
  35. #include <linux/i2c.h>
  36. #include <linux/hwmon.h>
  37. #include <linux/hwmon-sysfs.h>
  38. #include <linux/err.h>
  39. /* Addresses to scan */
  40. static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  41. /* Insmod parameters */
  42. I2C_CLIENT_INSMOD_1(w83792d);
  43. I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  44. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  45. static int init;
  46. module_param(init, bool, 0);
  47. MODULE_PARM_DESC(init, "Set to one to force chip initialization");
  48. /* The W83792D registers */
  49. static const u8 W83792D_REG_IN[9] = {
  50. 0x20, /* Vcore A in DataSheet */
  51. 0x21, /* Vcore B in DataSheet */
  52. 0x22, /* VIN0 in DataSheet */
  53. 0x23, /* VIN1 in DataSheet */
  54. 0x24, /* VIN2 in DataSheet */
  55. 0x25, /* VIN3 in DataSheet */
  56. 0x26, /* 5VCC in DataSheet */
  57. 0xB0, /* 5VSB in DataSheet */
  58. 0xB1 /* VBAT in DataSheet */
  59. };
  60. #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
  61. #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
  62. static const u8 W83792D_REG_IN_MAX[9] = {
  63. 0x2B, /* Vcore A High Limit in DataSheet */
  64. 0x2D, /* Vcore B High Limit in DataSheet */
  65. 0x2F, /* VIN0 High Limit in DataSheet */
  66. 0x31, /* VIN1 High Limit in DataSheet */
  67. 0x33, /* VIN2 High Limit in DataSheet */
  68. 0x35, /* VIN3 High Limit in DataSheet */
  69. 0x37, /* 5VCC High Limit in DataSheet */
  70. 0xB4, /* 5VSB High Limit in DataSheet */
  71. 0xB6 /* VBAT High Limit in DataSheet */
  72. };
  73. static const u8 W83792D_REG_IN_MIN[9] = {
  74. 0x2C, /* Vcore A Low Limit in DataSheet */
  75. 0x2E, /* Vcore B Low Limit in DataSheet */
  76. 0x30, /* VIN0 Low Limit in DataSheet */
  77. 0x32, /* VIN1 Low Limit in DataSheet */
  78. 0x34, /* VIN2 Low Limit in DataSheet */
  79. 0x36, /* VIN3 Low Limit in DataSheet */
  80. 0x38, /* 5VCC Low Limit in DataSheet */
  81. 0xB5, /* 5VSB Low Limit in DataSheet */
  82. 0xB7 /* VBAT Low Limit in DataSheet */
  83. };
  84. static const u8 W83792D_REG_FAN[7] = {
  85. 0x28, /* FAN 1 Count in DataSheet */
  86. 0x29, /* FAN 2 Count in DataSheet */
  87. 0x2A, /* FAN 3 Count in DataSheet */
  88. 0xB8, /* FAN 4 Count in DataSheet */
  89. 0xB9, /* FAN 5 Count in DataSheet */
  90. 0xBA, /* FAN 6 Count in DataSheet */
  91. 0xBE /* FAN 7 Count in DataSheet */
  92. };
  93. static const u8 W83792D_REG_FAN_MIN[7] = {
  94. 0x3B, /* FAN 1 Count Low Limit in DataSheet */
  95. 0x3C, /* FAN 2 Count Low Limit in DataSheet */
  96. 0x3D, /* FAN 3 Count Low Limit in DataSheet */
  97. 0xBB, /* FAN 4 Count Low Limit in DataSheet */
  98. 0xBC, /* FAN 5 Count Low Limit in DataSheet */
  99. 0xBD, /* FAN 6 Count Low Limit in DataSheet */
  100. 0xBF /* FAN 7 Count Low Limit in DataSheet */
  101. };
  102. #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
  103. static const u8 W83792D_REG_FAN_DIV[4] = {
  104. 0x47, /* contains FAN2 and FAN1 Divisor */
  105. 0x5B, /* contains FAN4 and FAN3 Divisor */
  106. 0x5C, /* contains FAN6 and FAN5 Divisor */
  107. 0x9E /* contains FAN7 Divisor. */
  108. };
  109. static const u8 W83792D_REG_PWM[7] = {
  110. 0x81, /* FAN 1 Duty Cycle, be used to control */
  111. 0x83, /* FAN 2 Duty Cycle, be used to control */
  112. 0x94, /* FAN 3 Duty Cycle, be used to control */
  113. 0xA3, /* FAN 4 Duty Cycle, be used to control */
  114. 0xA4, /* FAN 5 Duty Cycle, be used to control */
  115. 0xA5, /* FAN 6 Duty Cycle, be used to control */
  116. 0xA6 /* FAN 7 Duty Cycle, be used to control */
  117. };
  118. #define W83792D_REG_BANK 0x4E
  119. #define W83792D_REG_TEMP2_CONFIG 0xC2
  120. #define W83792D_REG_TEMP3_CONFIG 0xCA
  121. static const u8 W83792D_REG_TEMP1[3] = {
  122. 0x27, /* TEMP 1 in DataSheet */
  123. 0x39, /* TEMP 1 Over in DataSheet */
  124. 0x3A, /* TEMP 1 Hyst in DataSheet */
  125. };
  126. static const u8 W83792D_REG_TEMP_ADD[2][6] = {
  127. { 0xC0, /* TEMP 2 in DataSheet */
  128. 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
  129. 0xC5, /* TEMP 2 Over High part in DataSheet */
  130. 0xC6, /* TEMP 2 Over Low part in DataSheet */
  131. 0xC3, /* TEMP 2 Thyst High part in DataSheet */
  132. 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
  133. { 0xC8, /* TEMP 3 in DataSheet */
  134. 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
  135. 0xCD, /* TEMP 3 Over High part in DataSheet */
  136. 0xCE, /* TEMP 3 Over Low part in DataSheet */
  137. 0xCB, /* TEMP 3 Thyst High part in DataSheet */
  138. 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
  139. };
  140. static const u8 W83792D_REG_THERMAL[3] = {
  141. 0x85, /* SmartFanI: Fan1 target value */
  142. 0x86, /* SmartFanI: Fan2 target value */
  143. 0x96 /* SmartFanI: Fan3 target value */
  144. };
  145. static const u8 W83792D_REG_TOLERANCE[3] = {
  146. 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
  147. 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
  148. 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
  149. };
  150. static const u8 W83792D_REG_POINTS[3][4] = {
  151. { 0x85, /* SmartFanII: Fan1 temp point 1 */
  152. 0xE3, /* SmartFanII: Fan1 temp point 2 */
  153. 0xE4, /* SmartFanII: Fan1 temp point 3 */
  154. 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
  155. { 0x86, /* SmartFanII: Fan2 temp point 1 */
  156. 0xE6, /* SmartFanII: Fan2 temp point 2 */
  157. 0xE7, /* SmartFanII: Fan2 temp point 3 */
  158. 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
  159. { 0x96, /* SmartFanII: Fan3 temp point 1 */
  160. 0xE9, /* SmartFanII: Fan3 temp point 2 */
  161. 0xEA, /* SmartFanII: Fan3 temp point 3 */
  162. 0xEB } /* SmartFanII: Fan3 temp point 4 */
  163. };
  164. static const u8 W83792D_REG_LEVELS[3][4] = {
  165. { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
  166. 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
  167. 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
  168. 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
  169. { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
  170. 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
  171. 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
  172. 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
  173. { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
  174. 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
  175. 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
  176. 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
  177. };
  178. #define W83792D_REG_GPIO_EN 0x1A
  179. #define W83792D_REG_CONFIG 0x40
  180. #define W83792D_REG_VID_FANDIV 0x47
  181. #define W83792D_REG_CHIPID 0x49
  182. #define W83792D_REG_WCHIPID 0x58
  183. #define W83792D_REG_CHIPMAN 0x4F
  184. #define W83792D_REG_PIN 0x4B
  185. #define W83792D_REG_I2C_SUBADDR 0x4A
  186. #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
  187. #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
  188. #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
  189. #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
  190. #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
  191. /* control in0/in1 's limit modifiability */
  192. #define W83792D_REG_VID_IN_B 0x17
  193. #define W83792D_REG_VBAT 0x5D
  194. #define W83792D_REG_I2C_ADDR 0x48
  195. /* Conversions. Rounding and limit checking is only done on the TO_REG
  196. variants. Note that you should be a bit careful with which arguments
  197. these macros are called: arguments may be evaluated more than once.
  198. Fixing this is just not worth it. */
  199. #define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
  200. ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
  201. #define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
  202. ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
  203. static inline u8
  204. FAN_TO_REG(long rpm, int div)
  205. {
  206. if (rpm == 0)
  207. return 255;
  208. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  209. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  210. }
  211. #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
  212. ((val) == 255 ? 0 : \
  213. 1350000 / ((val) * (div))))
  214. /* for temp1 */
  215. #define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  216. : (val)) / 1000, 0, 0xff))
  217. #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
  218. /* for temp2 and temp3, because they need addtional resolution */
  219. #define TEMP_ADD_FROM_REG(val1, val2) \
  220. ((((val1) & 0x80 ? (val1)-0x100 \
  221. : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
  222. #define TEMP_ADD_TO_REG_HIGH(val) \
  223. (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  224. : (val)) / 1000, 0, 0xff))
  225. #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
  226. #define PWM_FROM_REG(val) (val)
  227. #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
  228. #define DIV_FROM_REG(val) (1 << (val))
  229. static inline u8
  230. DIV_TO_REG(long val)
  231. {
  232. int i;
  233. val = SENSORS_LIMIT(val, 1, 128) >> 1;
  234. for (i = 0; i < 7; i++) {
  235. if (val == 0)
  236. break;
  237. val >>= 1;
  238. }
  239. return ((u8) i);
  240. }
  241. struct w83792d_data {
  242. struct i2c_client client;
  243. struct class_device *class_dev;
  244. enum chips type;
  245. struct semaphore update_lock;
  246. char valid; /* !=0 if following fields are valid */
  247. unsigned long last_updated; /* In jiffies */
  248. /* array of 2 pointers to subclients */
  249. struct i2c_client *lm75[2];
  250. u8 in[9]; /* Register value */
  251. u8 in_max[9]; /* Register value */
  252. u8 in_min[9]; /* Register value */
  253. u16 low_bits; /* Additional resolution to voltage in6-0 */
  254. u8 fan[7]; /* Register value */
  255. u8 fan_min[7]; /* Register value */
  256. u8 temp1[3]; /* current, over, thyst */
  257. u8 temp_add[2][6]; /* Register value */
  258. u8 fan_div[7]; /* Register encoding, shifted right */
  259. u8 pwm[7]; /* We only consider the first 3 set of pwm,
  260. although 792 chip has 7 set of pwm. */
  261. u8 pwmenable[3];
  262. u8 pwm_mode[7]; /* indicates PWM or DC mode: 1->PWM; 0->DC */
  263. u32 alarms; /* realtime status register encoding,combined */
  264. u8 chassis; /* Chassis status */
  265. u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
  266. u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
  267. u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
  268. u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
  269. u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
  270. };
  271. static int w83792d_attach_adapter(struct i2c_adapter *adapter);
  272. static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
  273. static int w83792d_detach_client(struct i2c_client *client);
  274. static int w83792d_read_value(struct i2c_client *client, u8 register);
  275. static int w83792d_write_value(struct i2c_client *client, u8 register,
  276. u8 value);
  277. static struct w83792d_data *w83792d_update_device(struct device *dev);
  278. #ifdef DEBUG
  279. static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
  280. #endif
  281. static void w83792d_init_client(struct i2c_client *client);
  282. static struct i2c_driver w83792d_driver = {
  283. .driver = {
  284. .name = "w83792d",
  285. },
  286. .attach_adapter = w83792d_attach_adapter,
  287. .detach_client = w83792d_detach_client,
  288. };
  289. static inline long in_count_from_reg(int nr, struct w83792d_data *data)
  290. {
  291. /* in7 and in8 do not have low bits, but the formula still works */
  292. return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
  293. }
  294. /* following are the sysfs callback functions */
  295. static ssize_t show_in(struct device *dev, struct device_attribute *attr,
  296. char *buf)
  297. {
  298. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  299. int nr = sensor_attr->index;
  300. struct w83792d_data *data = w83792d_update_device(dev);
  301. return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
  302. }
  303. #define show_in_reg(reg) \
  304. static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
  305. char *buf) \
  306. { \
  307. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  308. int nr = sensor_attr->index; \
  309. struct w83792d_data *data = w83792d_update_device(dev); \
  310. return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
  311. }
  312. show_in_reg(in_min);
  313. show_in_reg(in_max);
  314. #define store_in_reg(REG, reg) \
  315. static ssize_t store_in_##reg (struct device *dev, \
  316. struct device_attribute *attr, \
  317. const char *buf, size_t count) \
  318. { \
  319. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  320. int nr = sensor_attr->index; \
  321. struct i2c_client *client = to_i2c_client(dev); \
  322. struct w83792d_data *data = i2c_get_clientdata(client); \
  323. u32 val; \
  324. \
  325. val = simple_strtoul(buf, NULL, 10); \
  326. data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
  327. w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
  328. \
  329. return count; \
  330. }
  331. store_in_reg(MIN, min);
  332. store_in_reg(MAX, max);
  333. #define sysfs_in_reg(offset) \
  334. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, show_in, \
  335. NULL, offset); \
  336. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  337. show_in_min, store_in_min, offset); \
  338. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  339. show_in_max, store_in_max, offset);
  340. sysfs_in_reg(0);
  341. sysfs_in_reg(1);
  342. sysfs_in_reg(2);
  343. sysfs_in_reg(3);
  344. sysfs_in_reg(4);
  345. sysfs_in_reg(5);
  346. sysfs_in_reg(6);
  347. sysfs_in_reg(7);
  348. sysfs_in_reg(8);
  349. #define device_create_file_in(client, offset) \
  350. do { \
  351. device_create_file(&client->dev, &sensor_dev_attr_in##offset##_input.dev_attr); \
  352. device_create_file(&client->dev, &sensor_dev_attr_in##offset##_max.dev_attr); \
  353. device_create_file(&client->dev, &sensor_dev_attr_in##offset##_min.dev_attr); \
  354. } while (0)
  355. #define show_fan_reg(reg) \
  356. static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
  357. char *buf) \
  358. { \
  359. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  360. int nr = sensor_attr->index - 1; \
  361. struct w83792d_data *data = w83792d_update_device(dev); \
  362. return sprintf(buf,"%d\n", \
  363. FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
  364. }
  365. show_fan_reg(fan);
  366. show_fan_reg(fan_min);
  367. static ssize_t
  368. store_fan_min(struct device *dev, struct device_attribute *attr,
  369. const char *buf, size_t count)
  370. {
  371. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  372. int nr = sensor_attr->index - 1;
  373. struct i2c_client *client = to_i2c_client(dev);
  374. struct w83792d_data *data = i2c_get_clientdata(client);
  375. u32 val;
  376. val = simple_strtoul(buf, NULL, 10);
  377. data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  378. w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
  379. data->fan_min[nr]);
  380. return count;
  381. }
  382. static ssize_t
  383. show_fan_div(struct device *dev, struct device_attribute *attr,
  384. char *buf)
  385. {
  386. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  387. int nr = sensor_attr->index;
  388. struct w83792d_data *data = w83792d_update_device(dev);
  389. return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
  390. }
  391. /* Note: we save and restore the fan minimum here, because its value is
  392. determined in part by the fan divisor. This follows the principle of
  393. least suprise; the user doesn't expect the fan minimum to change just
  394. because the divisor changed. */
  395. static ssize_t
  396. store_fan_div(struct device *dev, struct device_attribute *attr,
  397. const char *buf, size_t count)
  398. {
  399. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  400. int nr = sensor_attr->index - 1;
  401. struct i2c_client *client = to_i2c_client(dev);
  402. struct w83792d_data *data = i2c_get_clientdata(client);
  403. unsigned long min;
  404. /*u8 reg;*/
  405. u8 fan_div_reg = 0;
  406. u8 tmp_fan_div;
  407. /* Save fan_min */
  408. min = FAN_FROM_REG(data->fan_min[nr],
  409. DIV_FROM_REG(data->fan_div[nr]));
  410. data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
  411. fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
  412. fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
  413. tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
  414. : ((data->fan_div[nr]) & 0x07);
  415. w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
  416. fan_div_reg | tmp_fan_div);
  417. /* Restore fan_min */
  418. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  419. w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
  420. return count;
  421. }
  422. #define sysfs_fan(offset) \
  423. static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_fan, NULL, \
  424. offset); \
  425. static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
  426. show_fan_div, store_fan_div, offset); \
  427. static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
  428. show_fan_min, store_fan_min, offset);
  429. sysfs_fan(1);
  430. sysfs_fan(2);
  431. sysfs_fan(3);
  432. sysfs_fan(4);
  433. sysfs_fan(5);
  434. sysfs_fan(6);
  435. sysfs_fan(7);
  436. #define device_create_file_fan(client, offset) \
  437. do { \
  438. device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_input.dev_attr); \
  439. device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_div.dev_attr); \
  440. device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_min.dev_attr); \
  441. } while (0)
  442. /* read/write the temperature1, includes measured value and limits */
  443. static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
  444. char *buf)
  445. {
  446. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  447. int nr = sensor_attr->index;
  448. struct w83792d_data *data = w83792d_update_device(dev);
  449. return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
  450. }
  451. static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
  452. const char *buf, size_t count)
  453. {
  454. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  455. int nr = sensor_attr->index;
  456. struct i2c_client *client = to_i2c_client(dev);
  457. struct w83792d_data *data = i2c_get_clientdata(client);
  458. s32 val;
  459. val = simple_strtol(buf, NULL, 10);
  460. data->temp1[nr] = TEMP1_TO_REG(val);
  461. w83792d_write_value(client, W83792D_REG_TEMP1[nr],
  462. data->temp1[nr]);
  463. return count;
  464. }
  465. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0);
  466. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1,
  467. store_temp1, 1);
  468. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1,
  469. store_temp1, 2);
  470. #define device_create_file_temp1(client) \
  471. do { \
  472. device_create_file(&client->dev, &sensor_dev_attr_temp1_input.dev_attr); \
  473. device_create_file(&client->dev, &sensor_dev_attr_temp1_max.dev_attr); \
  474. device_create_file(&client->dev, &sensor_dev_attr_temp1_max_hyst.dev_attr); \
  475. } while (0)
  476. /* read/write the temperature2-3, includes measured value and limits */
  477. static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
  478. char *buf)
  479. {
  480. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  481. int nr = sensor_attr->nr;
  482. int index = sensor_attr->index;
  483. struct w83792d_data *data = w83792d_update_device(dev);
  484. return sprintf(buf,"%ld\n",
  485. (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
  486. data->temp_add[nr][index+1]));
  487. }
  488. static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
  489. const char *buf, size_t count)
  490. {
  491. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  492. int nr = sensor_attr->nr;
  493. int index = sensor_attr->index;
  494. struct i2c_client *client = to_i2c_client(dev);
  495. struct w83792d_data *data = i2c_get_clientdata(client);
  496. s32 val;
  497. val = simple_strtol(buf, NULL, 10);
  498. data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
  499. data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
  500. w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
  501. data->temp_add[nr][index]);
  502. w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
  503. data->temp_add[nr][index+1]);
  504. return count;
  505. }
  506. #define sysfs_temp23(name,idx) \
  507. static SENSOR_DEVICE_ATTR_2(name##_input, S_IRUGO, show_temp23, NULL, \
  508. idx, 0); \
  509. static SENSOR_DEVICE_ATTR_2(name##_max, S_IRUGO | S_IWUSR, \
  510. show_temp23, store_temp23, idx, 2); \
  511. static SENSOR_DEVICE_ATTR_2(name##_max_hyst, S_IRUGO | S_IWUSR, \
  512. show_temp23, store_temp23, idx, 4);
  513. sysfs_temp23(temp2,0)
  514. sysfs_temp23(temp3,1)
  515. #define device_create_file_temp_add(client, offset) \
  516. do { \
  517. device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_input.dev_attr); \
  518. device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_max.dev_attr); \
  519. device_create_file(&client->dev, \
  520. &sensor_dev_attr_temp##offset##_max_hyst.dev_attr); \
  521. } while (0)
  522. /* get reatime status of all sensors items: voltage, temp, fan */
  523. static ssize_t
  524. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  525. {
  526. struct w83792d_data *data = w83792d_update_device(dev);
  527. return sprintf(buf, "%d\n", data->alarms);
  528. }
  529. static
  530. DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  531. #define device_create_file_alarms(client) \
  532. device_create_file(&client->dev, &dev_attr_alarms);
  533. static ssize_t
  534. show_pwm(struct device *dev, struct device_attribute *attr,
  535. char *buf)
  536. {
  537. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  538. int nr = sensor_attr->index;
  539. struct w83792d_data *data = w83792d_update_device(dev);
  540. return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr-1]));
  541. }
  542. static ssize_t
  543. show_pwmenable(struct device *dev, struct device_attribute *attr,
  544. char *buf)
  545. {
  546. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  547. int nr = sensor_attr->index - 1;
  548. struct w83792d_data *data = w83792d_update_device(dev);
  549. long pwm_enable_tmp = 1;
  550. switch (data->pwmenable[nr]) {
  551. case 0:
  552. pwm_enable_tmp = 1; /* manual mode */
  553. break;
  554. case 1:
  555. pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
  556. break;
  557. case 2:
  558. pwm_enable_tmp = 2; /* Smart Fan II */
  559. break;
  560. }
  561. return sprintf(buf, "%ld\n", pwm_enable_tmp);
  562. }
  563. static ssize_t
  564. store_pwm(struct device *dev, struct device_attribute *attr,
  565. const char *buf, size_t count)
  566. {
  567. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  568. int nr = sensor_attr->index - 1;
  569. struct i2c_client *client = to_i2c_client(dev);
  570. struct w83792d_data *data = i2c_get_clientdata(client);
  571. u32 val;
  572. val = simple_strtoul(buf, NULL, 10);
  573. data->pwm[nr] = PWM_TO_REG(val);
  574. w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
  575. return count;
  576. }
  577. static ssize_t
  578. store_pwmenable(struct device *dev, struct device_attribute *attr,
  579. const char *buf, size_t count)
  580. {
  581. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  582. int nr = sensor_attr->index - 1;
  583. struct i2c_client *client = to_i2c_client(dev);
  584. struct w83792d_data *data = i2c_get_clientdata(client);
  585. u32 val;
  586. u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
  587. val = simple_strtoul(buf, NULL, 10);
  588. switch (val) {
  589. case 1:
  590. data->pwmenable[nr] = 0; /* manual mode */
  591. break;
  592. case 2:
  593. data->pwmenable[nr] = 2; /* Smart Fan II */
  594. break;
  595. case 3:
  596. data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
  597. break;
  598. default:
  599. return -EINVAL;
  600. }
  601. cfg1_tmp = data->pwmenable[0];
  602. cfg2_tmp = (data->pwmenable[1]) << 2;
  603. cfg3_tmp = (data->pwmenable[2]) << 4;
  604. cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
  605. fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
  606. w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
  607. return count;
  608. }
  609. #define sysfs_pwm(offset) \
  610. static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
  611. show_pwm, store_pwm, offset); \
  612. static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
  613. show_pwmenable, store_pwmenable, offset); \
  614. sysfs_pwm(1);
  615. sysfs_pwm(2);
  616. sysfs_pwm(3);
  617. #define device_create_file_pwm(client, offset) \
  618. do { \
  619. device_create_file(&client->dev, &sensor_dev_attr_pwm##offset.dev_attr); \
  620. } while (0)
  621. #define device_create_file_pwmenable(client, offset) \
  622. do { \
  623. device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_enable.dev_attr); \
  624. } while (0)
  625. static ssize_t
  626. show_pwm_mode(struct device *dev, struct device_attribute *attr,
  627. char *buf)
  628. {
  629. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  630. int nr = sensor_attr->index;
  631. struct w83792d_data *data = w83792d_update_device(dev);
  632. return sprintf(buf, "%d\n", data->pwm_mode[nr-1]);
  633. }
  634. static ssize_t
  635. store_pwm_mode(struct device *dev, struct device_attribute *attr,
  636. const char *buf, size_t count)
  637. {
  638. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  639. int nr = sensor_attr->index - 1;
  640. struct i2c_client *client = to_i2c_client(dev);
  641. struct w83792d_data *data = i2c_get_clientdata(client);
  642. u32 val;
  643. u8 pwm_mode_mask = 0;
  644. val = simple_strtoul(buf, NULL, 10);
  645. data->pwm_mode[nr] = SENSORS_LIMIT(val, 0, 1);
  646. pwm_mode_mask = w83792d_read_value(client,
  647. W83792D_REG_PWM[nr]) & 0x7f;
  648. w83792d_write_value(client, W83792D_REG_PWM[nr],
  649. ((data->pwm_mode[nr]) << 7) | pwm_mode_mask);
  650. return count;
  651. }
  652. #define sysfs_pwm_mode(offset) \
  653. static SENSOR_DEVICE_ATTR(pwm##offset##_mode, S_IRUGO | S_IWUSR, \
  654. show_pwm_mode, store_pwm_mode, offset);
  655. sysfs_pwm_mode(1);
  656. sysfs_pwm_mode(2);
  657. sysfs_pwm_mode(3);
  658. #define device_create_file_pwm_mode(client, offset) \
  659. do { \
  660. device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_mode.dev_attr); \
  661. } while (0)
  662. static ssize_t
  663. show_regs_chassis(struct device *dev, struct device_attribute *attr,
  664. char *buf)
  665. {
  666. struct w83792d_data *data = w83792d_update_device(dev);
  667. return sprintf(buf, "%d\n", data->chassis);
  668. }
  669. static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
  670. #define device_create_file_chassis(client) \
  671. do { \
  672. device_create_file(&client->dev, &dev_attr_chassis); \
  673. } while (0)
  674. static ssize_t
  675. show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
  676. {
  677. struct w83792d_data *data = w83792d_update_device(dev);
  678. return sprintf(buf, "%d\n", data->chassis_clear);
  679. }
  680. static ssize_t
  681. store_chassis_clear(struct device *dev, struct device_attribute *attr,
  682. const char *buf, size_t count)
  683. {
  684. struct i2c_client *client = to_i2c_client(dev);
  685. struct w83792d_data *data = i2c_get_clientdata(client);
  686. u32 val;
  687. u8 temp1 = 0, temp2 = 0;
  688. val = simple_strtoul(buf, NULL, 10);
  689. data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
  690. temp1 = ((data->chassis_clear) << 7) & 0x80;
  691. temp2 = w83792d_read_value(client,
  692. W83792D_REG_CHASSIS_CLR) & 0x7f;
  693. w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
  694. return count;
  695. }
  696. static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
  697. show_chassis_clear, store_chassis_clear);
  698. #define device_create_file_chassis_clear(client) \
  699. do { \
  700. device_create_file(&client->dev, &dev_attr_chassis_clear); \
  701. } while (0)
  702. /* For Smart Fan I / Thermal Cruise */
  703. static ssize_t
  704. show_thermal_cruise(struct device *dev, struct device_attribute *attr,
  705. char *buf)
  706. {
  707. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  708. int nr = sensor_attr->index;
  709. struct w83792d_data *data = w83792d_update_device(dev);
  710. return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
  711. }
  712. static ssize_t
  713. store_thermal_cruise(struct device *dev, struct device_attribute *attr,
  714. const char *buf, size_t count)
  715. {
  716. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  717. int nr = sensor_attr->index - 1;
  718. struct i2c_client *client = to_i2c_client(dev);
  719. struct w83792d_data *data = i2c_get_clientdata(client);
  720. u32 val;
  721. u8 target_tmp=0, target_mask=0;
  722. val = simple_strtoul(buf, NULL, 10);
  723. target_tmp = val;
  724. target_tmp = target_tmp & 0x7f;
  725. target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
  726. data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
  727. w83792d_write_value(client, W83792D_REG_THERMAL[nr],
  728. (data->thermal_cruise[nr]) | target_mask);
  729. return count;
  730. }
  731. #define sysfs_thermal_cruise(offset) \
  732. static SENSOR_DEVICE_ATTR(thermal_cruise##offset, S_IRUGO | S_IWUSR, \
  733. show_thermal_cruise, store_thermal_cruise, offset);
  734. sysfs_thermal_cruise(1);
  735. sysfs_thermal_cruise(2);
  736. sysfs_thermal_cruise(3);
  737. #define device_create_file_thermal_cruise(client, offset) \
  738. do { \
  739. device_create_file(&client->dev, \
  740. &sensor_dev_attr_thermal_cruise##offset.dev_attr); \
  741. } while (0)
  742. /* For Smart Fan I/Thermal Cruise and Smart Fan II */
  743. static ssize_t
  744. show_tolerance(struct device *dev, struct device_attribute *attr,
  745. char *buf)
  746. {
  747. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  748. int nr = sensor_attr->index;
  749. struct w83792d_data *data = w83792d_update_device(dev);
  750. return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
  751. }
  752. static ssize_t
  753. store_tolerance(struct device *dev, struct device_attribute *attr,
  754. const char *buf, size_t count)
  755. {
  756. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  757. int nr = sensor_attr->index - 1;
  758. struct i2c_client *client = to_i2c_client(dev);
  759. struct w83792d_data *data = i2c_get_clientdata(client);
  760. u32 val;
  761. u8 tol_tmp, tol_mask;
  762. val = simple_strtoul(buf, NULL, 10);
  763. tol_mask = w83792d_read_value(client,
  764. W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
  765. tol_tmp = SENSORS_LIMIT(val, 0, 15);
  766. tol_tmp &= 0x0f;
  767. data->tolerance[nr] = tol_tmp;
  768. if (nr == 1) {
  769. tol_tmp <<= 4;
  770. }
  771. w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
  772. tol_mask | tol_tmp);
  773. return count;
  774. }
  775. #define sysfs_tolerance(offset) \
  776. static SENSOR_DEVICE_ATTR(tolerance##offset, S_IRUGO | S_IWUSR, \
  777. show_tolerance, store_tolerance, offset);
  778. sysfs_tolerance(1);
  779. sysfs_tolerance(2);
  780. sysfs_tolerance(3);
  781. #define device_create_file_tolerance(client, offset) \
  782. do { \
  783. device_create_file(&client->dev, &sensor_dev_attr_tolerance##offset.dev_attr); \
  784. } while (0)
  785. /* For Smart Fan II */
  786. static ssize_t
  787. show_sf2_point(struct device *dev, struct device_attribute *attr,
  788. char *buf)
  789. {
  790. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  791. int nr = sensor_attr->nr;
  792. int index = sensor_attr->index;
  793. struct w83792d_data *data = w83792d_update_device(dev);
  794. return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
  795. }
  796. static ssize_t
  797. store_sf2_point(struct device *dev, struct device_attribute *attr,
  798. const char *buf, size_t count)
  799. {
  800. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  801. int nr = sensor_attr->nr - 1;
  802. int index = sensor_attr->index - 1;
  803. struct i2c_client *client = to_i2c_client(dev);
  804. struct w83792d_data *data = i2c_get_clientdata(client);
  805. u32 val;
  806. u8 mask_tmp = 0;
  807. val = simple_strtoul(buf, NULL, 10);
  808. data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
  809. mask_tmp = w83792d_read_value(client,
  810. W83792D_REG_POINTS[index][nr]) & 0x80;
  811. w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
  812. mask_tmp|data->sf2_points[index][nr]);
  813. return count;
  814. }
  815. #define sysfs_sf2_point(offset, index) \
  816. static SENSOR_DEVICE_ATTR_2(sf2_point##offset##_fan##index, S_IRUGO | S_IWUSR, \
  817. show_sf2_point, store_sf2_point, offset, index);
  818. sysfs_sf2_point(1, 1); /* Fan1 */
  819. sysfs_sf2_point(2, 1); /* Fan1 */
  820. sysfs_sf2_point(3, 1); /* Fan1 */
  821. sysfs_sf2_point(4, 1); /* Fan1 */
  822. sysfs_sf2_point(1, 2); /* Fan2 */
  823. sysfs_sf2_point(2, 2); /* Fan2 */
  824. sysfs_sf2_point(3, 2); /* Fan2 */
  825. sysfs_sf2_point(4, 2); /* Fan2 */
  826. sysfs_sf2_point(1, 3); /* Fan3 */
  827. sysfs_sf2_point(2, 3); /* Fan3 */
  828. sysfs_sf2_point(3, 3); /* Fan3 */
  829. sysfs_sf2_point(4, 3); /* Fan3 */
  830. #define device_create_file_sf2_point(client, offset, index) \
  831. do { \
  832. device_create_file(&client->dev, \
  833. &sensor_dev_attr_sf2_point##offset##_fan##index.dev_attr); \
  834. } while (0)
  835. static ssize_t
  836. show_sf2_level(struct device *dev, struct device_attribute *attr,
  837. char *buf)
  838. {
  839. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  840. int nr = sensor_attr->nr;
  841. int index = sensor_attr->index;
  842. struct w83792d_data *data = w83792d_update_device(dev);
  843. return sprintf(buf, "%d\n",
  844. (((data->sf2_levels[index-1][nr]) * 100) / 15));
  845. }
  846. static ssize_t
  847. store_sf2_level(struct device *dev, struct device_attribute *attr,
  848. const char *buf, size_t count)
  849. {
  850. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  851. int nr = sensor_attr->nr;
  852. int index = sensor_attr->index - 1;
  853. struct i2c_client *client = to_i2c_client(dev);
  854. struct w83792d_data *data = i2c_get_clientdata(client);
  855. u32 val;
  856. u8 mask_tmp=0, level_tmp=0;
  857. val = simple_strtoul(buf, NULL, 10);
  858. data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
  859. mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
  860. & ((nr==3) ? 0xf0 : 0x0f);
  861. if (nr==3) {
  862. level_tmp = data->sf2_levels[index][nr];
  863. } else {
  864. level_tmp = data->sf2_levels[index][nr] << 4;
  865. }
  866. w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
  867. return count;
  868. }
  869. #define sysfs_sf2_level(offset, index) \
  870. static SENSOR_DEVICE_ATTR_2(sf2_level##offset##_fan##index, S_IRUGO | S_IWUSR, \
  871. show_sf2_level, store_sf2_level, offset, index);
  872. sysfs_sf2_level(1, 1); /* Fan1 */
  873. sysfs_sf2_level(2, 1); /* Fan1 */
  874. sysfs_sf2_level(3, 1); /* Fan1 */
  875. sysfs_sf2_level(1, 2); /* Fan2 */
  876. sysfs_sf2_level(2, 2); /* Fan2 */
  877. sysfs_sf2_level(3, 2); /* Fan2 */
  878. sysfs_sf2_level(1, 3); /* Fan3 */
  879. sysfs_sf2_level(2, 3); /* Fan3 */
  880. sysfs_sf2_level(3, 3); /* Fan3 */
  881. #define device_create_file_sf2_level(client, offset, index) \
  882. do { \
  883. device_create_file(&client->dev, \
  884. &sensor_dev_attr_sf2_level##offset##_fan##index.dev_attr); \
  885. } while (0)
  886. /* This function is called when:
  887. * w83792d_driver is inserted (when this module is loaded), for each
  888. available adapter
  889. * when a new adapter is inserted (and w83792d_driver is still present) */
  890. static int
  891. w83792d_attach_adapter(struct i2c_adapter *adapter)
  892. {
  893. if (!(adapter->class & I2C_CLASS_HWMON))
  894. return 0;
  895. return i2c_probe(adapter, &addr_data, w83792d_detect);
  896. }
  897. static int
  898. w83792d_create_subclient(struct i2c_adapter *adapter,
  899. struct i2c_client *new_client, int addr,
  900. struct i2c_client **sub_cli)
  901. {
  902. int err;
  903. struct i2c_client *sub_client;
  904. (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  905. if (!(sub_client)) {
  906. return -ENOMEM;
  907. }
  908. sub_client->addr = 0x48 + addr;
  909. i2c_set_clientdata(sub_client, NULL);
  910. sub_client->adapter = adapter;
  911. sub_client->driver = &w83792d_driver;
  912. sub_client->flags = 0;
  913. strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
  914. if ((err = i2c_attach_client(sub_client))) {
  915. dev_err(&new_client->dev, "subclient registration "
  916. "at address 0x%x failed\n", sub_client->addr);
  917. kfree(sub_client);
  918. return err;
  919. }
  920. return 0;
  921. }
  922. static int
  923. w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
  924. struct i2c_client *new_client)
  925. {
  926. int i, id, err;
  927. u8 val;
  928. struct w83792d_data *data = i2c_get_clientdata(new_client);
  929. id = i2c_adapter_id(adapter);
  930. if (force_subclients[0] == id && force_subclients[1] == address) {
  931. for (i = 2; i <= 3; i++) {
  932. if (force_subclients[i] < 0x48 ||
  933. force_subclients[i] > 0x4f) {
  934. dev_err(&new_client->dev, "invalid subclient "
  935. "address %d; must be 0x48-0x4f\n",
  936. force_subclients[i]);
  937. err = -ENODEV;
  938. goto ERROR_SC_0;
  939. }
  940. }
  941. w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
  942. (force_subclients[2] & 0x07) |
  943. ((force_subclients[3] & 0x07) << 4));
  944. }
  945. val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
  946. if (!(val & 0x08)) {
  947. err = w83792d_create_subclient(adapter, new_client, val & 0x7,
  948. &data->lm75[0]);
  949. if (err < 0)
  950. goto ERROR_SC_0;
  951. }
  952. if (!(val & 0x80)) {
  953. if ((data->lm75[0] != NULL) &&
  954. ((val & 0x7) == ((val >> 4) & 0x7))) {
  955. dev_err(&new_client->dev, "duplicate addresses 0x%x, "
  956. "use force_subclient\n", data->lm75[0]->addr);
  957. err = -ENODEV;
  958. goto ERROR_SC_1;
  959. }
  960. err = w83792d_create_subclient(adapter, new_client,
  961. (val >> 4) & 0x7, &data->lm75[1]);
  962. if (err < 0)
  963. goto ERROR_SC_1;
  964. }
  965. return 0;
  966. /* Undo inits in case of errors */
  967. ERROR_SC_1:
  968. if (data->lm75[0] != NULL) {
  969. i2c_detach_client(data->lm75[0]);
  970. kfree(data->lm75[0]);
  971. }
  972. ERROR_SC_0:
  973. return err;
  974. }
  975. static int
  976. w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
  977. {
  978. int i = 0, val1 = 0, val2;
  979. struct i2c_client *new_client;
  980. struct w83792d_data *data;
  981. int err = 0;
  982. const char *client_name = "";
  983. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  984. goto ERROR0;
  985. }
  986. /* OK. For now, we presume we have a valid client. We now create the
  987. client structure, even though we cannot fill it completely yet.
  988. But it allows us to access w83792d_{read,write}_value. */
  989. if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
  990. err = -ENOMEM;
  991. goto ERROR0;
  992. }
  993. new_client = &data->client;
  994. i2c_set_clientdata(new_client, data);
  995. new_client->addr = address;
  996. new_client->adapter = adapter;
  997. new_client->driver = &w83792d_driver;
  998. new_client->flags = 0;
  999. /* Now, we do the remaining detection. */
  1000. /* The w83792d may be stuck in some other bank than bank 0. This may
  1001. make reading other information impossible. Specify a force=... or
  1002. force_*=... parameter, and the Winbond will be reset to the right
  1003. bank. */
  1004. if (kind < 0) {
  1005. if (w83792d_read_value(new_client, W83792D_REG_CONFIG) & 0x80) {
  1006. dev_warn(&new_client->dev, "Detection failed at step "
  1007. "3\n");
  1008. goto ERROR1;
  1009. }
  1010. val1 = w83792d_read_value(new_client, W83792D_REG_BANK);
  1011. val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
  1012. /* Check for Winbond ID if in bank 0 */
  1013. if (!(val1 & 0x07)) { /* is Bank0 */
  1014. if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
  1015. ((val1 & 0x80) && (val2 != 0x5c))) {
  1016. goto ERROR1;
  1017. }
  1018. }
  1019. /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
  1020. should match */
  1021. if (w83792d_read_value(new_client,
  1022. W83792D_REG_I2C_ADDR) != address) {
  1023. dev_warn(&new_client->dev, "Detection failed "
  1024. "at step 5\n");
  1025. goto ERROR1;
  1026. }
  1027. }
  1028. /* We have either had a force parameter, or we have already detected the
  1029. Winbond. Put it now into bank 0 and Vendor ID High Byte */
  1030. w83792d_write_value(new_client,
  1031. W83792D_REG_BANK,
  1032. (w83792d_read_value(new_client,
  1033. W83792D_REG_BANK) & 0x78) | 0x80);
  1034. /* Determine the chip type. */
  1035. if (kind <= 0) {
  1036. /* get vendor ID */
  1037. val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
  1038. if (val2 != 0x5c) { /* the vendor is NOT Winbond */
  1039. goto ERROR1;
  1040. }
  1041. val1 = w83792d_read_value(new_client, W83792D_REG_WCHIPID);
  1042. if (val1 == 0x7a) {
  1043. kind = w83792d;
  1044. } else {
  1045. if (kind == 0)
  1046. dev_warn(&new_client->dev,
  1047. "w83792d: Ignoring 'force' parameter for"
  1048. " unknown chip at adapter %d, address"
  1049. " 0x%02x\n", i2c_adapter_id(adapter),
  1050. address);
  1051. goto ERROR1;
  1052. }
  1053. }
  1054. if (kind == w83792d) {
  1055. client_name = "w83792d";
  1056. } else {
  1057. dev_err(&new_client->dev, "w83792d: Internal error: unknown"
  1058. " kind (%d)?!?", kind);
  1059. goto ERROR1;
  1060. }
  1061. /* Fill in the remaining client fields and put into the global list */
  1062. strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
  1063. data->type = kind;
  1064. data->valid = 0;
  1065. init_MUTEX(&data->update_lock);
  1066. /* Tell the I2C layer a new client has arrived */
  1067. if ((err = i2c_attach_client(new_client)))
  1068. goto ERROR1;
  1069. if ((err = w83792d_detect_subclients(adapter, address,
  1070. kind, new_client)))
  1071. goto ERROR2;
  1072. /* Initialize the chip */
  1073. w83792d_init_client(new_client);
  1074. /* A few vars need to be filled upon startup */
  1075. for (i = 0; i < 7; i++) {
  1076. data->fan_min[i] = w83792d_read_value(new_client,
  1077. W83792D_REG_FAN_MIN[i]);
  1078. }
  1079. /* Register sysfs hooks */
  1080. data->class_dev = hwmon_device_register(&new_client->dev);
  1081. if (IS_ERR(data->class_dev)) {
  1082. err = PTR_ERR(data->class_dev);
  1083. goto ERROR3;
  1084. }
  1085. device_create_file_in(new_client, 0);
  1086. device_create_file_in(new_client, 1);
  1087. device_create_file_in(new_client, 2);
  1088. device_create_file_in(new_client, 3);
  1089. device_create_file_in(new_client, 4);
  1090. device_create_file_in(new_client, 5);
  1091. device_create_file_in(new_client, 6);
  1092. device_create_file_in(new_client, 7);
  1093. device_create_file_in(new_client, 8);
  1094. device_create_file_fan(new_client, 1);
  1095. device_create_file_fan(new_client, 2);
  1096. device_create_file_fan(new_client, 3);
  1097. /* Read GPIO enable register to check if pins for fan 4,5 are used as
  1098. GPIO */
  1099. val1 = w83792d_read_value(new_client, W83792D_REG_GPIO_EN);
  1100. if (!(val1 & 0x40))
  1101. device_create_file_fan(new_client, 4);
  1102. if (!(val1 & 0x20))
  1103. device_create_file_fan(new_client, 5);
  1104. val1 = w83792d_read_value(new_client, W83792D_REG_PIN);
  1105. if (val1 & 0x40)
  1106. device_create_file_fan(new_client, 6);
  1107. if (val1 & 0x04)
  1108. device_create_file_fan(new_client, 7);
  1109. device_create_file_temp1(new_client); /* Temp1 */
  1110. device_create_file_temp_add(new_client, 2); /* Temp2 */
  1111. device_create_file_temp_add(new_client, 3); /* Temp3 */
  1112. device_create_file_alarms(new_client);
  1113. device_create_file_pwm(new_client, 1);
  1114. device_create_file_pwm(new_client, 2);
  1115. device_create_file_pwm(new_client, 3);
  1116. device_create_file_pwmenable(new_client, 1);
  1117. device_create_file_pwmenable(new_client, 2);
  1118. device_create_file_pwmenable(new_client, 3);
  1119. device_create_file_pwm_mode(new_client, 1);
  1120. device_create_file_pwm_mode(new_client, 2);
  1121. device_create_file_pwm_mode(new_client, 3);
  1122. device_create_file_chassis(new_client);
  1123. device_create_file_chassis_clear(new_client);
  1124. device_create_file_thermal_cruise(new_client, 1);
  1125. device_create_file_thermal_cruise(new_client, 2);
  1126. device_create_file_thermal_cruise(new_client, 3);
  1127. device_create_file_tolerance(new_client, 1);
  1128. device_create_file_tolerance(new_client, 2);
  1129. device_create_file_tolerance(new_client, 3);
  1130. device_create_file_sf2_point(new_client, 1, 1); /* Fan1 */
  1131. device_create_file_sf2_point(new_client, 2, 1); /* Fan1 */
  1132. device_create_file_sf2_point(new_client, 3, 1); /* Fan1 */
  1133. device_create_file_sf2_point(new_client, 4, 1); /* Fan1 */
  1134. device_create_file_sf2_point(new_client, 1, 2); /* Fan2 */
  1135. device_create_file_sf2_point(new_client, 2, 2); /* Fan2 */
  1136. device_create_file_sf2_point(new_client, 3, 2); /* Fan2 */
  1137. device_create_file_sf2_point(new_client, 4, 2); /* Fan2 */
  1138. device_create_file_sf2_point(new_client, 1, 3); /* Fan3 */
  1139. device_create_file_sf2_point(new_client, 2, 3); /* Fan3 */
  1140. device_create_file_sf2_point(new_client, 3, 3); /* Fan3 */
  1141. device_create_file_sf2_point(new_client, 4, 3); /* Fan3 */
  1142. device_create_file_sf2_level(new_client, 1, 1); /* Fan1 */
  1143. device_create_file_sf2_level(new_client, 2, 1); /* Fan1 */
  1144. device_create_file_sf2_level(new_client, 3, 1); /* Fan1 */
  1145. device_create_file_sf2_level(new_client, 1, 2); /* Fan2 */
  1146. device_create_file_sf2_level(new_client, 2, 2); /* Fan2 */
  1147. device_create_file_sf2_level(new_client, 3, 2); /* Fan2 */
  1148. device_create_file_sf2_level(new_client, 1, 3); /* Fan3 */
  1149. device_create_file_sf2_level(new_client, 2, 3); /* Fan3 */
  1150. device_create_file_sf2_level(new_client, 3, 3); /* Fan3 */
  1151. return 0;
  1152. ERROR3:
  1153. if (data->lm75[0] != NULL) {
  1154. i2c_detach_client(data->lm75[0]);
  1155. kfree(data->lm75[0]);
  1156. }
  1157. if (data->lm75[1] != NULL) {
  1158. i2c_detach_client(data->lm75[1]);
  1159. kfree(data->lm75[1]);
  1160. }
  1161. ERROR2:
  1162. i2c_detach_client(new_client);
  1163. ERROR1:
  1164. kfree(data);
  1165. ERROR0:
  1166. return err;
  1167. }
  1168. static int
  1169. w83792d_detach_client(struct i2c_client *client)
  1170. {
  1171. struct w83792d_data *data = i2c_get_clientdata(client);
  1172. int err;
  1173. /* main client */
  1174. if (data)
  1175. hwmon_device_unregister(data->class_dev);
  1176. if ((err = i2c_detach_client(client)))
  1177. return err;
  1178. /* main client */
  1179. if (data)
  1180. kfree(data);
  1181. /* subclient */
  1182. else
  1183. kfree(client);
  1184. return 0;
  1185. }
  1186. /* The SMBus locks itself. The Winbond W83792D chip has a bank register,
  1187. but the driver only accesses registers in bank 0, so we don't have
  1188. to switch banks and lock access between switches. */
  1189. static int w83792d_read_value(struct i2c_client *client, u8 reg)
  1190. {
  1191. return i2c_smbus_read_byte_data(client, reg);
  1192. }
  1193. static int w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
  1194. {
  1195. return i2c_smbus_write_byte_data(client, reg, value);
  1196. }
  1197. static void
  1198. w83792d_init_client(struct i2c_client *client)
  1199. {
  1200. u8 temp2_cfg, temp3_cfg, vid_in_b;
  1201. if (init) {
  1202. w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
  1203. }
  1204. /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
  1205. W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
  1206. vin0/vin1 can be modified by user;
  1207. W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
  1208. vin0/vin1 auto-updated, can NOT be modified by user. */
  1209. vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
  1210. w83792d_write_value(client, W83792D_REG_VID_IN_B,
  1211. vid_in_b & 0xbf);
  1212. temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
  1213. temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
  1214. w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
  1215. temp2_cfg & 0xe6);
  1216. w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
  1217. temp3_cfg & 0xe6);
  1218. /* Start monitoring */
  1219. w83792d_write_value(client, W83792D_REG_CONFIG,
  1220. (w83792d_read_value(client,
  1221. W83792D_REG_CONFIG) & 0xf7)
  1222. | 0x01);
  1223. }
  1224. static struct w83792d_data *w83792d_update_device(struct device *dev)
  1225. {
  1226. struct i2c_client *client = to_i2c_client(dev);
  1227. struct w83792d_data *data = i2c_get_clientdata(client);
  1228. int i, j;
  1229. u8 reg_array_tmp[4], pwm_array_tmp[7], reg_tmp;
  1230. down(&data->update_lock);
  1231. if (time_after
  1232. (jiffies - data->last_updated, (unsigned long) (HZ * 3))
  1233. || time_before(jiffies, data->last_updated) || !data->valid) {
  1234. dev_dbg(dev, "Starting device update\n");
  1235. /* Update the voltages measured value and limits */
  1236. for (i = 0; i < 9; i++) {
  1237. data->in[i] = w83792d_read_value(client,
  1238. W83792D_REG_IN[i]);
  1239. data->in_max[i] = w83792d_read_value(client,
  1240. W83792D_REG_IN_MAX[i]);
  1241. data->in_min[i] = w83792d_read_value(client,
  1242. W83792D_REG_IN_MIN[i]);
  1243. }
  1244. data->low_bits = w83792d_read_value(client,
  1245. W83792D_REG_LOW_BITS1) +
  1246. (w83792d_read_value(client,
  1247. W83792D_REG_LOW_BITS2) << 8);
  1248. for (i = 0; i < 7; i++) {
  1249. /* Update the Fan measured value and limits */
  1250. data->fan[i] = w83792d_read_value(client,
  1251. W83792D_REG_FAN[i]);
  1252. data->fan_min[i] = w83792d_read_value(client,
  1253. W83792D_REG_FAN_MIN[i]);
  1254. /* Update the PWM/DC Value and PWM/DC flag */
  1255. pwm_array_tmp[i] = w83792d_read_value(client,
  1256. W83792D_REG_PWM[i]);
  1257. data->pwm[i] = pwm_array_tmp[i] & 0x0f;
  1258. data->pwm_mode[i] = pwm_array_tmp[i] >> 7;
  1259. }
  1260. reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
  1261. data->pwmenable[0] = reg_tmp & 0x03;
  1262. data->pwmenable[1] = (reg_tmp>>2) & 0x03;
  1263. data->pwmenable[2] = (reg_tmp>>4) & 0x03;
  1264. for (i = 0; i < 3; i++) {
  1265. data->temp1[i] = w83792d_read_value(client,
  1266. W83792D_REG_TEMP1[i]);
  1267. }
  1268. for (i = 0; i < 2; i++) {
  1269. for (j = 0; j < 6; j++) {
  1270. data->temp_add[i][j] = w83792d_read_value(
  1271. client,W83792D_REG_TEMP_ADD[i][j]);
  1272. }
  1273. }
  1274. /* Update the Fan Divisor */
  1275. for (i = 0; i < 4; i++) {
  1276. reg_array_tmp[i] = w83792d_read_value(client,
  1277. W83792D_REG_FAN_DIV[i]);
  1278. }
  1279. data->fan_div[0] = reg_array_tmp[0] & 0x07;
  1280. data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
  1281. data->fan_div[2] = reg_array_tmp[1] & 0x07;
  1282. data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
  1283. data->fan_div[4] = reg_array_tmp[2] & 0x07;
  1284. data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
  1285. data->fan_div[6] = reg_array_tmp[3] & 0x07;
  1286. /* Update the realtime status */
  1287. data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
  1288. (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
  1289. (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
  1290. /* Update CaseOpen status and it's CLR_CHS. */
  1291. data->chassis = (w83792d_read_value(client,
  1292. W83792D_REG_CHASSIS) >> 5) & 0x01;
  1293. data->chassis_clear = (w83792d_read_value(client,
  1294. W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
  1295. /* Update Thermal Cruise/Smart Fan I target value */
  1296. for (i = 0; i < 3; i++) {
  1297. data->thermal_cruise[i] =
  1298. w83792d_read_value(client,
  1299. W83792D_REG_THERMAL[i]) & 0x7f;
  1300. }
  1301. /* Update Smart Fan I/II tolerance */
  1302. reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
  1303. data->tolerance[0] = reg_tmp & 0x0f;
  1304. data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
  1305. data->tolerance[2] = w83792d_read_value(client,
  1306. W83792D_REG_TOLERANCE[2]) & 0x0f;
  1307. /* Update Smart Fan II temperature points */
  1308. for (i = 0; i < 3; i++) {
  1309. for (j = 0; j < 4; j++) {
  1310. data->sf2_points[i][j] = w83792d_read_value(
  1311. client,W83792D_REG_POINTS[i][j]) & 0x7f;
  1312. }
  1313. }
  1314. /* Update Smart Fan II duty cycle levels */
  1315. for (i = 0; i < 3; i++) {
  1316. reg_tmp = w83792d_read_value(client,
  1317. W83792D_REG_LEVELS[i][0]);
  1318. data->sf2_levels[i][0] = reg_tmp & 0x0f;
  1319. data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
  1320. reg_tmp = w83792d_read_value(client,
  1321. W83792D_REG_LEVELS[i][2]);
  1322. data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
  1323. data->sf2_levels[i][3] = reg_tmp & 0x0f;
  1324. }
  1325. data->last_updated = jiffies;
  1326. data->valid = 1;
  1327. }
  1328. up(&data->update_lock);
  1329. #ifdef DEBUG
  1330. w83792d_print_debug(data, dev);
  1331. #endif
  1332. return data;
  1333. }
  1334. #ifdef DEBUG
  1335. static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
  1336. {
  1337. int i=0, j=0;
  1338. dev_dbg(dev, "==========The following is the debug message...========\n");
  1339. dev_dbg(dev, "9 set of Voltages: =====>\n");
  1340. for (i=0; i<9; i++) {
  1341. dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
  1342. dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
  1343. dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
  1344. }
  1345. dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
  1346. dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
  1347. dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
  1348. for (i=0; i<7; i++) {
  1349. dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
  1350. dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
  1351. dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
  1352. dev_dbg(dev, "pwm_mode[%d] is: 0x%x\n", i, data->pwm_mode[i]);
  1353. }
  1354. dev_dbg(dev, "3 set of Temperatures: =====>\n");
  1355. for (i=0; i<3; i++) {
  1356. dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
  1357. }
  1358. for (i=0; i<2; i++) {
  1359. for (j=0; j<6; j++) {
  1360. dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
  1361. data->temp_add[i][j]);
  1362. }
  1363. }
  1364. for (i=0; i<7; i++) {
  1365. dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
  1366. }
  1367. dev_dbg(dev, "==========End of the debug message...==================\n");
  1368. dev_dbg(dev, "\n");
  1369. }
  1370. #endif
  1371. static int __init
  1372. sensors_w83792d_init(void)
  1373. {
  1374. return i2c_add_driver(&w83792d_driver);
  1375. }
  1376. static void __exit
  1377. sensors_w83792d_exit(void)
  1378. {
  1379. i2c_del_driver(&w83792d_driver);
  1380. }
  1381. MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
  1382. MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
  1383. MODULE_LICENSE("GPL");
  1384. module_init(sensors_w83792d_init);
  1385. module_exit(sensors_w83792d_exit);