swiotlb.c 26 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. * 08/12/11 beckyb Add highmem support
  18. */
  19. #include <linux/cache.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/module.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/pfn.h>
  27. #include <linux/types.h>
  28. #include <linux/ctype.h>
  29. #include <linux/highmem.h>
  30. #include <linux/gfp.h>
  31. #include <asm/io.h>
  32. #include <asm/dma.h>
  33. #include <asm/scatterlist.h>
  34. #include <linux/init.h>
  35. #include <linux/bootmem.h>
  36. #include <linux/iommu-helper.h>
  37. #define OFFSET(val,align) ((unsigned long) \
  38. ( (val) & ( (align) - 1)))
  39. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  40. /*
  41. * Minimum IO TLB size to bother booting with. Systems with mainly
  42. * 64bit capable cards will only lightly use the swiotlb. If we can't
  43. * allocate a contiguous 1MB, we're probably in trouble anyway.
  44. */
  45. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  46. int swiotlb_force;
  47. /*
  48. * Used to do a quick range check in swiotlb_tbl_unmap_single and
  49. * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
  50. * API.
  51. */
  52. static char *io_tlb_start, *io_tlb_end;
  53. /*
  54. * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
  55. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  56. */
  57. static unsigned long io_tlb_nslabs;
  58. /*
  59. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  60. */
  61. static unsigned long io_tlb_overflow = 32*1024;
  62. static void *io_tlb_overflow_buffer;
  63. /*
  64. * This is a free list describing the number of free entries available from
  65. * each index
  66. */
  67. static unsigned int *io_tlb_list;
  68. static unsigned int io_tlb_index;
  69. /*
  70. * We need to save away the original address corresponding to a mapped entry
  71. * for the sync operations.
  72. */
  73. static phys_addr_t *io_tlb_orig_addr;
  74. /*
  75. * Protect the above data structures in the map and unmap calls
  76. */
  77. static DEFINE_SPINLOCK(io_tlb_lock);
  78. static int late_alloc;
  79. static int __init
  80. setup_io_tlb_npages(char *str)
  81. {
  82. if (isdigit(*str)) {
  83. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  84. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  85. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  86. }
  87. if (*str == ',')
  88. ++str;
  89. if (!strcmp(str, "force"))
  90. swiotlb_force = 1;
  91. return 1;
  92. }
  93. __setup("swiotlb=", setup_io_tlb_npages);
  94. /* make io_tlb_overflow tunable too? */
  95. unsigned long swiotlb_nr_tbl(void)
  96. {
  97. return io_tlb_nslabs;
  98. }
  99. EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
  100. /* Note that this doesn't work with highmem page */
  101. static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
  102. volatile void *address)
  103. {
  104. return phys_to_dma(hwdev, virt_to_phys(address));
  105. }
  106. void swiotlb_print_info(void)
  107. {
  108. unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  109. phys_addr_t pstart, pend;
  110. pstart = virt_to_phys(io_tlb_start);
  111. pend = virt_to_phys(io_tlb_end);
  112. printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
  113. bytes >> 20, io_tlb_start, io_tlb_end);
  114. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
  115. (unsigned long long)pstart,
  116. (unsigned long long)pend);
  117. }
  118. void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
  119. {
  120. unsigned long i, bytes;
  121. bytes = nslabs << IO_TLB_SHIFT;
  122. io_tlb_nslabs = nslabs;
  123. io_tlb_start = tlb;
  124. io_tlb_end = io_tlb_start + bytes;
  125. /*
  126. * Allocate and initialize the free list array. This array is used
  127. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  128. * between io_tlb_start and io_tlb_end.
  129. */
  130. io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
  131. for (i = 0; i < io_tlb_nslabs; i++)
  132. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  133. io_tlb_index = 0;
  134. io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
  135. /*
  136. * Get the overflow emergency buffer
  137. */
  138. io_tlb_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow));
  139. if (!io_tlb_overflow_buffer)
  140. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  141. if (verbose)
  142. swiotlb_print_info();
  143. }
  144. /*
  145. * Statically reserve bounce buffer space and initialize bounce buffer data
  146. * structures for the software IO TLB used to implement the DMA API.
  147. */
  148. void __init
  149. swiotlb_init_with_default_size(size_t default_size, int verbose)
  150. {
  151. unsigned long bytes;
  152. if (!io_tlb_nslabs) {
  153. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  154. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  155. }
  156. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  157. /*
  158. * Get IO TLB memory from the low pages
  159. */
  160. io_tlb_start = alloc_bootmem_low_pages(PAGE_ALIGN(bytes));
  161. if (!io_tlb_start)
  162. panic("Cannot allocate SWIOTLB buffer");
  163. swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
  164. }
  165. void __init
  166. swiotlb_init(int verbose)
  167. {
  168. swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
  169. }
  170. /*
  171. * Systems with larger DMA zones (those that don't support ISA) can
  172. * initialize the swiotlb later using the slab allocator if needed.
  173. * This should be just like above, but with some error catching.
  174. */
  175. int
  176. swiotlb_late_init_with_default_size(size_t default_size)
  177. {
  178. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  179. unsigned int order;
  180. if (!io_tlb_nslabs) {
  181. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  182. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  183. }
  184. /*
  185. * Get IO TLB memory from the low pages
  186. */
  187. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  188. io_tlb_nslabs = SLABS_PER_PAGE << order;
  189. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  190. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  191. io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  192. order);
  193. if (io_tlb_start)
  194. break;
  195. order--;
  196. }
  197. if (!io_tlb_start)
  198. goto cleanup1;
  199. if (order != get_order(bytes)) {
  200. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  201. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  202. io_tlb_nslabs = SLABS_PER_PAGE << order;
  203. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  204. }
  205. io_tlb_end = io_tlb_start + bytes;
  206. memset(io_tlb_start, 0, bytes);
  207. /*
  208. * Allocate and initialize the free list array. This array is used
  209. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  210. * between io_tlb_start and io_tlb_end.
  211. */
  212. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  213. get_order(io_tlb_nslabs * sizeof(int)));
  214. if (!io_tlb_list)
  215. goto cleanup2;
  216. for (i = 0; i < io_tlb_nslabs; i++)
  217. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  218. io_tlb_index = 0;
  219. io_tlb_orig_addr = (phys_addr_t *)
  220. __get_free_pages(GFP_KERNEL,
  221. get_order(io_tlb_nslabs *
  222. sizeof(phys_addr_t)));
  223. if (!io_tlb_orig_addr)
  224. goto cleanup3;
  225. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
  226. /*
  227. * Get the overflow emergency buffer
  228. */
  229. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  230. get_order(io_tlb_overflow));
  231. if (!io_tlb_overflow_buffer)
  232. goto cleanup4;
  233. swiotlb_print_info();
  234. late_alloc = 1;
  235. return 0;
  236. cleanup4:
  237. free_pages((unsigned long)io_tlb_orig_addr,
  238. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  239. io_tlb_orig_addr = NULL;
  240. cleanup3:
  241. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  242. sizeof(int)));
  243. io_tlb_list = NULL;
  244. cleanup2:
  245. io_tlb_end = NULL;
  246. free_pages((unsigned long)io_tlb_start, order);
  247. io_tlb_start = NULL;
  248. cleanup1:
  249. io_tlb_nslabs = req_nslabs;
  250. return -ENOMEM;
  251. }
  252. void __init swiotlb_free(void)
  253. {
  254. if (!io_tlb_overflow_buffer)
  255. return;
  256. if (late_alloc) {
  257. free_pages((unsigned long)io_tlb_overflow_buffer,
  258. get_order(io_tlb_overflow));
  259. free_pages((unsigned long)io_tlb_orig_addr,
  260. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  261. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  262. sizeof(int)));
  263. free_pages((unsigned long)io_tlb_start,
  264. get_order(io_tlb_nslabs << IO_TLB_SHIFT));
  265. } else {
  266. free_bootmem_late(__pa(io_tlb_overflow_buffer),
  267. PAGE_ALIGN(io_tlb_overflow));
  268. free_bootmem_late(__pa(io_tlb_orig_addr),
  269. PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
  270. free_bootmem_late(__pa(io_tlb_list),
  271. PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
  272. free_bootmem_late(__pa(io_tlb_start),
  273. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  274. }
  275. io_tlb_nslabs = 0;
  276. }
  277. static int is_swiotlb_buffer(phys_addr_t paddr)
  278. {
  279. return paddr >= virt_to_phys(io_tlb_start) &&
  280. paddr < virt_to_phys(io_tlb_end);
  281. }
  282. /*
  283. * Bounce: copy the swiotlb buffer back to the original dma location
  284. */
  285. void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
  286. enum dma_data_direction dir)
  287. {
  288. unsigned long pfn = PFN_DOWN(phys);
  289. if (PageHighMem(pfn_to_page(pfn))) {
  290. /* The buffer does not have a mapping. Map it in and copy */
  291. unsigned int offset = phys & ~PAGE_MASK;
  292. char *buffer;
  293. unsigned int sz = 0;
  294. unsigned long flags;
  295. while (size) {
  296. sz = min_t(size_t, PAGE_SIZE - offset, size);
  297. local_irq_save(flags);
  298. buffer = kmap_atomic(pfn_to_page(pfn),
  299. KM_BOUNCE_READ);
  300. if (dir == DMA_TO_DEVICE)
  301. memcpy(dma_addr, buffer + offset, sz);
  302. else
  303. memcpy(buffer + offset, dma_addr, sz);
  304. kunmap_atomic(buffer, KM_BOUNCE_READ);
  305. local_irq_restore(flags);
  306. size -= sz;
  307. pfn++;
  308. dma_addr += sz;
  309. offset = 0;
  310. }
  311. } else {
  312. if (dir == DMA_TO_DEVICE)
  313. memcpy(dma_addr, phys_to_virt(phys), size);
  314. else
  315. memcpy(phys_to_virt(phys), dma_addr, size);
  316. }
  317. }
  318. EXPORT_SYMBOL_GPL(swiotlb_bounce);
  319. void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
  320. phys_addr_t phys, size_t size,
  321. enum dma_data_direction dir)
  322. {
  323. unsigned long flags;
  324. char *dma_addr;
  325. unsigned int nslots, stride, index, wrap;
  326. int i;
  327. unsigned long mask;
  328. unsigned long offset_slots;
  329. unsigned long max_slots;
  330. mask = dma_get_seg_boundary(hwdev);
  331. tbl_dma_addr &= mask;
  332. offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  333. /*
  334. * Carefully handle integer overflow which can occur when mask == ~0UL.
  335. */
  336. max_slots = mask + 1
  337. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  338. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  339. /*
  340. * For mappings greater than a page, we limit the stride (and
  341. * hence alignment) to a page size.
  342. */
  343. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  344. if (size > PAGE_SIZE)
  345. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  346. else
  347. stride = 1;
  348. BUG_ON(!nslots);
  349. /*
  350. * Find suitable number of IO TLB entries size that will fit this
  351. * request and allocate a buffer from that IO TLB pool.
  352. */
  353. spin_lock_irqsave(&io_tlb_lock, flags);
  354. index = ALIGN(io_tlb_index, stride);
  355. if (index >= io_tlb_nslabs)
  356. index = 0;
  357. wrap = index;
  358. do {
  359. while (iommu_is_span_boundary(index, nslots, offset_slots,
  360. max_slots)) {
  361. index += stride;
  362. if (index >= io_tlb_nslabs)
  363. index = 0;
  364. if (index == wrap)
  365. goto not_found;
  366. }
  367. /*
  368. * If we find a slot that indicates we have 'nslots' number of
  369. * contiguous buffers, we allocate the buffers from that slot
  370. * and mark the entries as '0' indicating unavailable.
  371. */
  372. if (io_tlb_list[index] >= nslots) {
  373. int count = 0;
  374. for (i = index; i < (int) (index + nslots); i++)
  375. io_tlb_list[i] = 0;
  376. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  377. io_tlb_list[i] = ++count;
  378. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  379. /*
  380. * Update the indices to avoid searching in the next
  381. * round.
  382. */
  383. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  384. ? (index + nslots) : 0);
  385. goto found;
  386. }
  387. index += stride;
  388. if (index >= io_tlb_nslabs)
  389. index = 0;
  390. } while (index != wrap);
  391. not_found:
  392. spin_unlock_irqrestore(&io_tlb_lock, flags);
  393. return NULL;
  394. found:
  395. spin_unlock_irqrestore(&io_tlb_lock, flags);
  396. /*
  397. * Save away the mapping from the original address to the DMA address.
  398. * This is needed when we sync the memory. Then we sync the buffer if
  399. * needed.
  400. */
  401. for (i = 0; i < nslots; i++)
  402. io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
  403. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  404. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  405. return dma_addr;
  406. }
  407. EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
  408. /*
  409. * Allocates bounce buffer and returns its kernel virtual address.
  410. */
  411. static void *
  412. map_single(struct device *hwdev, phys_addr_t phys, size_t size,
  413. enum dma_data_direction dir)
  414. {
  415. dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
  416. return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
  417. }
  418. /*
  419. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  420. */
  421. void
  422. swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
  423. enum dma_data_direction dir)
  424. {
  425. unsigned long flags;
  426. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  427. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  428. phys_addr_t phys = io_tlb_orig_addr[index];
  429. /*
  430. * First, sync the memory before unmapping the entry
  431. */
  432. if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  433. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  434. /*
  435. * Return the buffer to the free list by setting the corresponding
  436. * entries to indicate the number of contiguous entries available.
  437. * While returning the entries to the free list, we merge the entries
  438. * with slots below and above the pool being returned.
  439. */
  440. spin_lock_irqsave(&io_tlb_lock, flags);
  441. {
  442. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  443. io_tlb_list[index + nslots] : 0);
  444. /*
  445. * Step 1: return the slots to the free list, merging the
  446. * slots with superceeding slots
  447. */
  448. for (i = index + nslots - 1; i >= index; i--)
  449. io_tlb_list[i] = ++count;
  450. /*
  451. * Step 2: merge the returned slots with the preceding slots,
  452. * if available (non zero)
  453. */
  454. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  455. io_tlb_list[i] = ++count;
  456. }
  457. spin_unlock_irqrestore(&io_tlb_lock, flags);
  458. }
  459. EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
  460. void
  461. swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
  462. enum dma_data_direction dir,
  463. enum dma_sync_target target)
  464. {
  465. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  466. phys_addr_t phys = io_tlb_orig_addr[index];
  467. phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  468. switch (target) {
  469. case SYNC_FOR_CPU:
  470. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  471. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  472. else
  473. BUG_ON(dir != DMA_TO_DEVICE);
  474. break;
  475. case SYNC_FOR_DEVICE:
  476. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  477. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  478. else
  479. BUG_ON(dir != DMA_FROM_DEVICE);
  480. break;
  481. default:
  482. BUG();
  483. }
  484. }
  485. EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
  486. void *
  487. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  488. dma_addr_t *dma_handle, gfp_t flags)
  489. {
  490. dma_addr_t dev_addr;
  491. void *ret;
  492. int order = get_order(size);
  493. u64 dma_mask = DMA_BIT_MASK(32);
  494. if (hwdev && hwdev->coherent_dma_mask)
  495. dma_mask = hwdev->coherent_dma_mask;
  496. ret = (void *)__get_free_pages(flags, order);
  497. if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
  498. /*
  499. * The allocated memory isn't reachable by the device.
  500. */
  501. free_pages((unsigned long) ret, order);
  502. ret = NULL;
  503. }
  504. if (!ret) {
  505. /*
  506. * We are either out of memory or the device can't DMA to
  507. * GFP_DMA memory; fall back on map_single(), which
  508. * will grab memory from the lowest available address range.
  509. */
  510. ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
  511. if (!ret)
  512. return NULL;
  513. }
  514. memset(ret, 0, size);
  515. dev_addr = swiotlb_virt_to_bus(hwdev, ret);
  516. /* Confirm address can be DMA'd by device */
  517. if (dev_addr + size - 1 > dma_mask) {
  518. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  519. (unsigned long long)dma_mask,
  520. (unsigned long long)dev_addr);
  521. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  522. swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  523. return NULL;
  524. }
  525. *dma_handle = dev_addr;
  526. return ret;
  527. }
  528. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  529. void
  530. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  531. dma_addr_t dev_addr)
  532. {
  533. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  534. WARN_ON(irqs_disabled());
  535. if (!is_swiotlb_buffer(paddr))
  536. free_pages((unsigned long)vaddr, get_order(size));
  537. else
  538. /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
  539. swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  540. }
  541. EXPORT_SYMBOL(swiotlb_free_coherent);
  542. static void
  543. swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
  544. int do_panic)
  545. {
  546. /*
  547. * Ran out of IOMMU space for this operation. This is very bad.
  548. * Unfortunately the drivers cannot handle this operation properly.
  549. * unless they check for dma_mapping_error (most don't)
  550. * When the mapping is small enough return a static buffer to limit
  551. * the damage, or panic when the transfer is too big.
  552. */
  553. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  554. "device %s\n", size, dev ? dev_name(dev) : "?");
  555. if (size <= io_tlb_overflow || !do_panic)
  556. return;
  557. if (dir == DMA_BIDIRECTIONAL)
  558. panic("DMA: Random memory could be DMA accessed\n");
  559. if (dir == DMA_FROM_DEVICE)
  560. panic("DMA: Random memory could be DMA written\n");
  561. if (dir == DMA_TO_DEVICE)
  562. panic("DMA: Random memory could be DMA read\n");
  563. }
  564. /*
  565. * Map a single buffer of the indicated size for DMA in streaming mode. The
  566. * physical address to use is returned.
  567. *
  568. * Once the device is given the dma address, the device owns this memory until
  569. * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
  570. */
  571. dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
  572. unsigned long offset, size_t size,
  573. enum dma_data_direction dir,
  574. struct dma_attrs *attrs)
  575. {
  576. phys_addr_t phys = page_to_phys(page) + offset;
  577. dma_addr_t dev_addr = phys_to_dma(dev, phys);
  578. void *map;
  579. BUG_ON(dir == DMA_NONE);
  580. /*
  581. * If the address happens to be in the device's DMA window,
  582. * we can safely return the device addr and not worry about bounce
  583. * buffering it.
  584. */
  585. if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
  586. return dev_addr;
  587. /*
  588. * Oh well, have to allocate and map a bounce buffer.
  589. */
  590. map = map_single(dev, phys, size, dir);
  591. if (!map) {
  592. swiotlb_full(dev, size, dir, 1);
  593. map = io_tlb_overflow_buffer;
  594. }
  595. dev_addr = swiotlb_virt_to_bus(dev, map);
  596. /*
  597. * Ensure that the address returned is DMA'ble
  598. */
  599. if (!dma_capable(dev, dev_addr, size)) {
  600. swiotlb_tbl_unmap_single(dev, map, size, dir);
  601. dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer);
  602. }
  603. return dev_addr;
  604. }
  605. EXPORT_SYMBOL_GPL(swiotlb_map_page);
  606. /*
  607. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  608. * match what was provided for in a previous swiotlb_map_page call. All
  609. * other usages are undefined.
  610. *
  611. * After this call, reads by the cpu to the buffer are guaranteed to see
  612. * whatever the device wrote there.
  613. */
  614. static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
  615. size_t size, enum dma_data_direction dir)
  616. {
  617. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  618. BUG_ON(dir == DMA_NONE);
  619. if (is_swiotlb_buffer(paddr)) {
  620. swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
  621. return;
  622. }
  623. if (dir != DMA_FROM_DEVICE)
  624. return;
  625. /*
  626. * phys_to_virt doesn't work with hihgmem page but we could
  627. * call dma_mark_clean() with hihgmem page here. However, we
  628. * are fine since dma_mark_clean() is null on POWERPC. We can
  629. * make dma_mark_clean() take a physical address if necessary.
  630. */
  631. dma_mark_clean(phys_to_virt(paddr), size);
  632. }
  633. void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  634. size_t size, enum dma_data_direction dir,
  635. struct dma_attrs *attrs)
  636. {
  637. unmap_single(hwdev, dev_addr, size, dir);
  638. }
  639. EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
  640. /*
  641. * Make physical memory consistent for a single streaming mode DMA translation
  642. * after a transfer.
  643. *
  644. * If you perform a swiotlb_map_page() but wish to interrogate the buffer
  645. * using the cpu, yet do not wish to teardown the dma mapping, you must
  646. * call this function before doing so. At the next point you give the dma
  647. * address back to the card, you must first perform a
  648. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  649. */
  650. static void
  651. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  652. size_t size, enum dma_data_direction dir,
  653. enum dma_sync_target target)
  654. {
  655. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  656. BUG_ON(dir == DMA_NONE);
  657. if (is_swiotlb_buffer(paddr)) {
  658. swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
  659. target);
  660. return;
  661. }
  662. if (dir != DMA_FROM_DEVICE)
  663. return;
  664. dma_mark_clean(phys_to_virt(paddr), size);
  665. }
  666. void
  667. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  668. size_t size, enum dma_data_direction dir)
  669. {
  670. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  671. }
  672. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  673. void
  674. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  675. size_t size, enum dma_data_direction dir)
  676. {
  677. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  678. }
  679. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  680. /*
  681. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  682. * This is the scatter-gather version of the above swiotlb_map_page
  683. * interface. Here the scatter gather list elements are each tagged with the
  684. * appropriate dma address and length. They are obtained via
  685. * sg_dma_{address,length}(SG).
  686. *
  687. * NOTE: An implementation may be able to use a smaller number of
  688. * DMA address/length pairs than there are SG table elements.
  689. * (for example via virtual mapping capabilities)
  690. * The routine returns the number of addr/length pairs actually
  691. * used, at most nents.
  692. *
  693. * Device ownership issues as mentioned above for swiotlb_map_page are the
  694. * same here.
  695. */
  696. int
  697. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  698. enum dma_data_direction dir, struct dma_attrs *attrs)
  699. {
  700. struct scatterlist *sg;
  701. int i;
  702. BUG_ON(dir == DMA_NONE);
  703. for_each_sg(sgl, sg, nelems, i) {
  704. phys_addr_t paddr = sg_phys(sg);
  705. dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
  706. if (swiotlb_force ||
  707. !dma_capable(hwdev, dev_addr, sg->length)) {
  708. void *map = map_single(hwdev, sg_phys(sg),
  709. sg->length, dir);
  710. if (!map) {
  711. /* Don't panic here, we expect map_sg users
  712. to do proper error handling. */
  713. swiotlb_full(hwdev, sg->length, dir, 0);
  714. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  715. attrs);
  716. sgl[0].dma_length = 0;
  717. return 0;
  718. }
  719. sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
  720. } else
  721. sg->dma_address = dev_addr;
  722. sg->dma_length = sg->length;
  723. }
  724. return nelems;
  725. }
  726. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  727. int
  728. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  729. enum dma_data_direction dir)
  730. {
  731. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  732. }
  733. EXPORT_SYMBOL(swiotlb_map_sg);
  734. /*
  735. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  736. * concerning calls here are the same as for swiotlb_unmap_page() above.
  737. */
  738. void
  739. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  740. int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
  741. {
  742. struct scatterlist *sg;
  743. int i;
  744. BUG_ON(dir == DMA_NONE);
  745. for_each_sg(sgl, sg, nelems, i)
  746. unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
  747. }
  748. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  749. void
  750. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  751. enum dma_data_direction dir)
  752. {
  753. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  754. }
  755. EXPORT_SYMBOL(swiotlb_unmap_sg);
  756. /*
  757. * Make physical memory consistent for a set of streaming mode DMA translations
  758. * after a transfer.
  759. *
  760. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  761. * and usage.
  762. */
  763. static void
  764. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  765. int nelems, enum dma_data_direction dir,
  766. enum dma_sync_target target)
  767. {
  768. struct scatterlist *sg;
  769. int i;
  770. for_each_sg(sgl, sg, nelems, i)
  771. swiotlb_sync_single(hwdev, sg->dma_address,
  772. sg->dma_length, dir, target);
  773. }
  774. void
  775. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  776. int nelems, enum dma_data_direction dir)
  777. {
  778. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  779. }
  780. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  781. void
  782. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  783. int nelems, enum dma_data_direction dir)
  784. {
  785. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  786. }
  787. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  788. int
  789. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  790. {
  791. return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
  792. }
  793. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  794. /*
  795. * Return whether the given device DMA address mask can be supported
  796. * properly. For example, if your device can only drive the low 24-bits
  797. * during bus mastering, then you would pass 0x00ffffff as the mask to
  798. * this function.
  799. */
  800. int
  801. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  802. {
  803. return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
  804. }
  805. EXPORT_SYMBOL(swiotlb_dma_supported);