imx53-mba53.dts 3.9 KB

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  1. /*
  2. * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  3. * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. #include "imx53-tqma53.dtsi"
  14. / {
  15. model = "TQ MBa53 starter kit";
  16. compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
  17. reg_backlight: fixed@0 {
  18. compatible = "regulator-fixed";
  19. regulator-name = "lcd-supply";
  20. gpio = <&gpio2 5 0>;
  21. startup-delay-us = <5000>;
  22. enable-active-low;
  23. };
  24. backlight {
  25. compatible = "pwm-backlight";
  26. pwms = <&pwm2 0 50000 0 0>;
  27. brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
  28. default-brightness-level = <10>;
  29. enable-gpios = <&gpio7 7 0>;
  30. power-supply = <&reg_backlight>;
  31. };
  32. disp1: display@disp1 {
  33. compatible = "fsl,imx-parallel-display";
  34. pinctrl-names = "default";
  35. pinctrl-0 = <&pinctrl_disp1_1>;
  36. crtcs = <&ipu 1>;
  37. interface-pix-fmt = "rgb24";
  38. status = "disabled";
  39. };
  40. };
  41. &ldb {
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&pinctrl_lvds1_1>;
  44. status = "disabled";
  45. };
  46. &iomuxc {
  47. lvds1 {
  48. pinctrl_lvds1_1: lvds1-grp1 {
  49. fsl,pins = <
  50. MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x10000
  51. MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x10000
  52. MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x10000
  53. MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x10000
  54. MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x10000
  55. >;
  56. };
  57. pinctrl_lvds1_2: lvds1-grp2 {
  58. fsl,pins = <
  59. MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x10000
  60. MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x10000
  61. MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x10000
  62. MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x10000
  63. MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x10000
  64. >;
  65. };
  66. };
  67. disp1 {
  68. pinctrl_disp1_1: disp1-grp1 {
  69. fsl,pins = <
  70. MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x10000 /* DISP1_DRDY */
  71. MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x10000 /* DISP1_HSYNC */
  72. MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x10000 /* DISP1_VSYNC */
  73. MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x10000
  74. MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x10000
  75. MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x10000
  76. MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x10000
  77. MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x10000
  78. MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x10000
  79. MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x10000
  80. MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x10000
  81. MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x10000
  82. MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x10000
  83. MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x10000
  84. MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x10000
  85. MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x10000
  86. MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x10000
  87. MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x10000
  88. MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x10000
  89. MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x10000
  90. MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x10000
  91. MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x10000
  92. MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x10000
  93. MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x10000
  94. MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x10000
  95. MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x10000
  96. MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x10000
  97. >;
  98. };
  99. };
  100. };
  101. &cspi {
  102. status = "okay";
  103. };
  104. &i2c2 {
  105. codec: sgtl5000@a {
  106. compatible = "fsl,sgtl5000";
  107. reg = <0x0a>;
  108. };
  109. expander: pca9554@20 {
  110. compatible = "pca9554";
  111. reg = <0x20>;
  112. interrupts = <109>;
  113. };
  114. sensor2: lm75@49 {
  115. compatible = "lm75";
  116. reg = <0x49>;
  117. };
  118. };
  119. &fec {
  120. status = "okay";
  121. };
  122. &esdhc2 {
  123. status = "okay";
  124. };
  125. &uart3 {
  126. status = "okay";
  127. };
  128. &ecspi1 {
  129. status = "okay";
  130. };
  131. &usbotg {
  132. dr_mode = "host";
  133. status = "okay";
  134. };
  135. &usbh1 {
  136. status = "okay";
  137. };
  138. &uart1 {
  139. status = "okay";
  140. };
  141. &uart2 {
  142. status = "okay";
  143. };
  144. &can1 {
  145. status = "okay";
  146. };
  147. &can2 {
  148. status = "okay";
  149. };
  150. &i2c3 {
  151. status = "okay";
  152. };